LM4928
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SNAS330E – DECEMBER 2005 – REVISED APRIL 2013
LM4928 Boomer™ Audio Power Amplifier Series 1.2 Watt Stereo Fully Differential Audio
Amplifier with RF Suppression and Shutdown Low
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FEATURES
DESCRIPTION
•
•
•
The LM4928 is an stereo fully differential stereo audio
power amplifier primarily designed for demanding
applications in mobile phones and other portable
communication devices. It is capable of delivering 1.2
watts of continuous average power to a 8Ω load with
less than 1% distortion (THD+N) from a 5VDC power
supply.
1
23
•
•
•
•
•
RF Suppression Circuitry
Fully Differential Amplification
Available in Space-Saving DSBGA and WSON
Packages
Ultra Low Current Shutdown Mode
Can Drive Capacitive Loads up to 100pF
Improved Pop & Click Circuitry Eliminates
Noises During Turn-On and Turn-Off
Transitions
2.4 - 5.5V Operation
No Output Coupling Capacitors, Snubber
Networks or Bootstrap Capacitors Required
APPLICATIONS
•
•
•
Mobile Phones
PDAs
Portable Electronic Devices and Accessories
KEY SPECIFICATIONS
•
•
•
•
Improved PSRR at 217Hz, 90dB (Typ)
Output Power at 5.0V @ 1% THD+N (8Ω),
1.2W (Typ)
Output Power at 3.0V @ 1% THD+N (8Ω),
400mW (Typ)
Shutdown Current, 0.1µA (Typ)
Boomer audio power amplifiers were designed
specifically to provide high quality output power with a
minimal amount of external components. The
LM4928 does not require output coupling capacitors
or bootstrap capacitors, and therefore is ideally suited
for mobile phone and other low voltage applications
where minimal power consumption is a primary
requirement.
The LM4928 features a low-power consumption
shutdown mode. To facilitate this, shutdown may be
enabled by logic low. Additionally, the LM4928
features an internal thermal shutdown protection
mechanism.
The LM4928 contains advanced pop & click circuitry
which eliminates noises which would otherwise occur
during turn-on and turn-off transitions.
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Boomer is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2013, Texas Instruments Incorporated
LM4928
SNAS330E – DECEMBER 2005 – REVISED APRIL 2013
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Typical Application
Rf
Rf
VDD
CS +
1 PF
-IN
-L
Input
-
VO2+
Ri
RL
Common
Mode
8:
VO1-
+IN
+L
Input
+
Ri
SD
BYP
Bias
+
CB
-IN
-R
Input
-
VO2+
Ri
RL
Common
Mode
8:
VO1-
+IN
+R
Input
+
Ri
GND
Rf
Rf
Figure 1. Typical Audio Amplifier Application Circuit
Connection Diagram
IN2+
1
14
VDD
IN2-
2
13
OUT2-
SHUTDOWN
3
12
GND
BYPASS
4
11
OUT2+
IN1-
5
10
OUT1+
IN1+
6
9
GND
VDD
7
8
OUT1-
Figure 2. WSON Package
Top View
See Package Number NHK0014A
2
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Top View
4
3
2
1
A
B
C
D
Figure 3. DSBGA Package
Top View
See Package Number YZR0016
LM4928TL PIN DESCRIPTIONS
A1
IN1+
B1
IN1–
C1
IN2–
D1
IN2+
A2
VDD
B2
BYPASS
C2
SHUTDOWN
D2
VDD
A3
OUT1–
B3
OUT1+
C3
OUT2+
D3
OUT2–
A4
GND
B4
NC
C4
NC
D4
GND
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Absolute Maximum Ratings (1) (2)
Supply Voltage
6.0V
−65°C to +150°C
Storage Temperature
−0.3V to VDD +0.3V
Input Voltage
Power Dissipation (3) (4)
ESD Susceptibility
Internally Limited
(5)
2000V
ESD Susceptibility (6)
200V
Junction Temperature
150°C
Thermal Resistance
Soldering Information
(1)
(2)
(3)
(4)
(5)
(6)
θJA (WSON)
50°C/W
θJA (DSBGA)
74°C/W
See AN-1187 (SNOA401)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature
TA. The maximum allowable power dissipation is PDMAX = (TJMAX – TA) / θJA or the number given in Absolute Maximum Ratings,
whichever is lower. For the LM4928, see power derating curve for additional information.
Maximum Power Dissipation (PDMAX) in the device occurs at an output power level significantly below full output power. PDMAX can be
calculated using Equation 4 shown in the Application section. It may also be obtained from the Power Dissipation graphs.
Human body model, 100pF discharged through a 1.5kΩ resistor.
Machine Model, 220pF – 240pF discharged through all pins.
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
−40°C ≤ TA ≤ 85°C
2.4V ≤ VDD ≤ 5.5V
Supply Voltage
4
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Electrical Characteristics VDD = 5V (1) (2)
The following specifications apply for VDD = 5V, AV = 1, and 8Ω load unless otherwise specified. Limits apply for TA = 25°C.
Symbol
IDD
Parameter
Quiescent Power Supply Current
Conditions
LM4928
Typical
(3)
Limit (4)
Units
(Limits)
VIN = 0V, no load
VIN = 0V, RL = 8Ω
(Both amplifiers)
4
4
7.5
mA (max)
0.1
1.0
µA (max)
1.0
W
ISD
Shutdown Current
VSHUTDOWN = GND
(Both amplifiers)
Po
Output Power
THD = 1% (max); f = 1 kHz
LM4928SD, RL = 4Ω (5)
RL = 8Ω
1.8
1.2
THD = 10% (max); f = 1 kHz
LM4928SD, RL = 4Ω (5)
RL = 8Ω
2.2
1.5
W
Po = 1 Wrms; f = 1kHz
0.04
%
THD+N
Total Harmonic Distortion + Noise
Vripple = 200mV sine p-p
PSRR
Power Supply Rejection Ratio
f = 217Hz (6)
f = 1kHz
(6)
90
dB
90
CMRR
Common-Mode Rejection Ratio
f = 217Hz, VCM = 200mVpp
70
50
dB (min)
VOS
Output Offset
VIN = 0V
4
18
mV (max)
VSDIH
Shutdown Voltage Input High
1.4
V
VSDIL
Shutdown Voltage Input Low
0.4
SNR
Signal-to-Noise Ratio
PO = 1W, f = 1kHz
105
dB
TWU
Wake-up time from Shutdown
Cbypass = 1μF
13
ms
(1)
(2)
(3)
(4)
(5)
(6)
V
All voltages are measured with respect to the ground pin, unless otherwise specified.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
Typicals are measured at 25°C and represent the parametric norm.
Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level).
When driving 4Ω loads from a 5V power supply, the LM4928SD must be mounted to a circuit board with the exposed-DAP area
soldered down to at least 4in2 plane of 1oz, copper.
Inputs are AC terminated to GND.
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Electrical Characteristics VDD = 3V (1) (2)
The following specifications apply for VDD = 3V, AV = 1, and 8Ω load unless otherwise specified. Limits apply for TA = 25°C.
Symbol
IDD
Parameter
Quiescent Power Supply Current
ISD
Shutdown Current
Po
Output Power
THD+N
LM4928
Conditions
Total Harmonic Distortion + Noise
Typical
VIN = 0V, no load
VIN = 0V, RL = 8Ω
(Both amplifiers)
3.5
3.5
VSHUTDOWN = GND
(Both amplifiers)
0.1
(3)
Limit (4)
Units
(Limits)
mA
1
µA (max)
THD = 1% (max); f = 1 kHz
RL = 4Ω
RL = 8Ω
0.55
0.40
W
THD = 10% (max); f = 1 kHz
RL = 4Ω
RL = 8Ω
0.68
0.50
W
Po = 0.25Wrms; f = 1kHz
0.05
%
Vripple = 200mV sine p-p
PSRR
Power Supply Rejection Ratio
f = 217Hz (5)
f = 1kHz
90
(5)
dB
90
CMRR
Common-Mode Rejection Ratio
f = 217Hz, VCM = 200mVpp
70
50
dB (min)
VOS
Output Offset
VIN = 0V
4
18
mV (max)
VSDIH
Shutdown Voltage Input High
1.4
V
VSDIL
Shutdown Voltage Input Low
0.4
SNR
Signal-to-Noise Ratio
PO = 0.4W, f = 1kHz
TWU
Wake-up time from Shutdown
Cbypass = 1μF
(1)
(2)
(3)
(4)
(5)
V
105
dB
9
ms
All voltages are measured with respect to the ground pin, unless otherwise specified.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
Typicals are measured at 25°C and represent the parametric norm.
Limits are specified to Texas Instruments' AOQL (Average Outgoing Quality Level).
Inputs are AC terminated to GND.
External Components Description
(See Figure 1)
Components
6
Functional Description
1.
CS
Supply bypass capacitor which provides power supply filtering. Refer to the POWER SUPPLY BYPASSING section for
information concerning proper placement and selection of the supply bypass capacitor.
2.
CB
Bypass pin capacitor which provides half-supply filtering. Refer to the POWER SUPPLY BYPASSING section for
information concerning proper placement and selection of CB.
3.
Ri
Inverting input resistance which sets the closed-loop gain in conjunction with Rf.
4.
Rf
External feedback resistance which sets the closed-loop gain in conjunction with Ri.
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Typical Performance Characteristics (1)
10
THD+N vs Frequency
VDD = 2.6V, RL = 4Ω, PO = 150mW
10
1
THD+N (%)
1
THD+N (%)
THD+N vs Frequency
VDD = 2.6V, RL = 8Ω, PO = 150mW
0.1
0.01
0.1
0.01
0.001
0.001
20
100
1k
10k 20k
20
100
FREQUENCY (Hz)
Figure 5.
10
10
1
1
THD+N (%)
THD+N (%)
THD+N vs Frequency
VDD = 3V, RL = 4Ω, PO = 250mW
0.1
THD+N vs Frequency
VDD = 3V, RL = 8Ω, PO = 250mW
0.1
0.01
0.01
0.001
0.001
20
100
1k
10k 20k
20
100
10
1k
10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 6.
Figure 7.
THD+N vs Frequency
VDD = 5V, RL = 4Ω, PO = 1W
THD+N vs Frequency
VDD = 5V, RL = 8Ω, PO = 1W
10
1
1
THD+N (%)
THD+N (%)
10k 20k
FREQUENCY (Hz)
Figure 4.
0.1
0.01
0.1
0.01
0.001
20
100
1k
10k 20k
0.001
FREQUENCY (Hz)
20
100
1k
10k 20k
FREQUENCY (Hz)
Figure 8.
(1)
1k
Figure 9.
Data taken with BW = 80kHz and AV = 1 except where specified.
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Typical Performance Characteristics(1) (continued)
THD+N vs Output Power
VDD = 2.6V, RL = 4Ω
THD+N vs Output Power
VDD = 2.6V, RL = 8Ω
10
10
10 kHz
1
THD+N (%)
THD+N (%)
1
1 kHz
0.1
10 kHz
1 kHz
0.1
20 Hz
0.01
0.001
10m
20 Hz
0.01
0.001
10m
1
100m
OUTPUT POWER (W)
Figure 10.
Figure 11.
THD+N vs Output Power
VDD = 3V, RL = 4Ω
THD+N vs Output Power
VDD = 3V, RL = 8Ω
10
10
1
10 kHz
10 kHz
THD+N (%)
THD+N (%)
1
1 kHz
0.1
20 Hz
1 kHz
0.1
20 Hz
0.01
0.001
10m
0.01
0.001
10m
1
100m
OUTPUT POWER (W)
Figure 12.
Figure 13.
THD+N vs Output Power
VDD = 5V, RL = 4Ω
THD+N vs Output Power
VDD = 5V, RL = 8Ω
10
1
10 kHz
THD+N (%)
THD+N (%)
1
100m
OUTPUT POWER (W)
10
1
1
100m
OUTPUT POWER (W)
1 kHz
0.1
10 kHz
0.1
1 kHz
0.01
20 Hz
20 Hz
0.01
0.001
10m
100m
1
3
0.001
10m
OUTPUT POWER (W)
Figure 14.
8
100m
1
2
OUTPUT POWER (W)
Figure 15.
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Typical Performance Characteristics(1) (continued)
PSRR vs Common Mode Voltage
VDD = 5V, RL = 8Ω, f = 217Hz
0
0
-10
-10
-20
-20
-30
-30
PSRR (dB)
PSRR (dB)
PSRR vs Common Mode Voltage
VDD = 3V, RL = 8Ω, f = 217Hz
-40
-50
-60
-40
-50
-60
-70
-70
-80
-80
-90
-90
-100
0.5
0
1
1.5
2
2.5
-100
3
0
1
3
4
5
DC COMMON-MODE VOLTAGE (V)
Figure 17.
PSRR vs Frequency
VDD = 3V, RL = 8Ω
Input Terminated to GND, BW = 500kHz
PSRR vs Frequency
VDD = 5V, RL = 8Ω
Input Terminated to GND, BW = 500kHz
0
0
-10
-10
-20
-20
-30
-30
-40
-50
-60
-40
-50
-60
-70
-70
-80
-80
-90
-90
-100
20
-100
20
100
1k
10k
60k
100
1k
10k
60k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 18.
Figure 19.
Output Power vs Supply Voltage
RL = 4Ω
Output Power vs Supply Voltage
RL = 8Ω
3
2.8
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
1
800m
600m
400m
200m
0
2.4
2
1.8
1.6
OUTPUT POWER (W)
OUTPUT POWER (W)
2
Figure 16.
PSRR (dB)
PSRR (dB)
DC COMMON-MODE VOLTAGE (V)
10% THD+N
1% THD+N
1.4
1.2
10% THD+N
1
800m
1% THD+N
600m
400m
200m
3
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE (V)
0
2.4
3
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE (V)
Figure 20.
Figure 21.
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Typical Performance Characteristics(1) (continued)
CMRR vs Frequency
VDD = 3V, RL = 8Ω
CMRR vs Frequency
VDD = 5V, RL = 8Ω
0
-10
-10
-20
-20
-30
-30
CMRR (dB)
CMRR (dB)
0
-40
-50
-60
-40
-50
-60
-70
-70
-80
-80
-90
-90
-100
20
100
1k
10k 20k
-100
20
1k
100
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 23.
Crosstalk vs Frequency
VDD = 5V, RL = 8Ω, PO = 1W
Top = Vin Left driven, Vout Right measured
Bot = Vin Right driven, Vout Left measured
Crosstalk vs Frequency
VDD = 5V, RL = 4Ω, PO = 1W
Top = Vin Left driven, Vout Right measured
Bot = Vin Right driven, Vout Left measured
0
0
-10
-10
-20
-20
-30
-30
CROSSTALK (dB)
CROSSTALK (dB)
Figure 22.
-40
-50
-60
-70
-80
-40
-50
-60
-70
-80
-90
-90
-100
20
-100
20
100
1k
10k 20k
100
1k
10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 24.
Figure 25.
Crosstalk vs Frequency
VDD = 3V, RL = 4Ω, PO = 500mW
Top = Vin Left driven, Vout Right measured
Bot = Vin Right driven, Vout Left measured
Crosstalk vs Frequency
VDD = 3V, RL = 8Ω, PO = 250mW
Top = Vin Left driven, Vout Right measured
Bot = Vin Right driven, Vout Left measured
0
-10
-10
-20
-20
-30
-30
CROSSTALK (dB)
CROSSTALK (dB)
0
-40
-50
-60
-70
-80
-40
-50
-60
-70
-80
-90
-90
-100
20
-100
20
100
1k
10k 20k
100
1k
10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 26.
10
10k 20k
Figure 27.
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Typical Performance Characteristics(1) (continued)
Power Dissipation vs Output Power
VDD = 3V
Power Dissipation vs Output Power
VDD = 5V
3.0
0.9
TOTAL POWER DISSIPATION (W)
TOTAL POWER DISSIPATION (W)
1.0
RL = 4:
0.8
0.7
0.6
0.5
0.4
RL = 8:
0.3
0.2
0.1
0
0
0.1
0.2
0.3
0.4
0.5
0.6
2.5
RL = 4:
2.0
1.5
RL = 8:
1.0
0.5
0
0.7
0
OUTPUT POWER PER CHANNEL
1.0
1.5
2.0
2.5
OUTPUT POWER PER CHANNEL
Figure 28.
Figure 29.
Noise Floor
VDD = 3V
Noise Floor
VDD = 5V
100P
100P
OUTPUT NOISE VOLTAGE (V)
OUTPUT NOISE VOLTAGE (V)
0.5
Vo1+Vo2
10P
Shutdown On
1P
100n
20
100
Shutdown On
1P
100n
20
10k 20k
1k
Vo1+Vo2
10P
100
10k 20k
1k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 30.
Figure 31.
Output Power vs Load Resistance
Clipping Voltage vs Supply Voltage
0.8
2.5
0.7
OUTPUT POWER (W)
DROPOUT VOLTAGE (V)
5V, 10% THD+N
2.0
5V, 1% THD+N
1.5
3V, 10% THD+N
3V, 1% THD+N
1.0
0.5
RL = 4: Top
0.6
RL = 4: Bottom
0.5
0.4
0.3
RL = 8: Top
0.2
RL = 8: Bottom
0.1
0
4
8
12
16
20
24
28
32
LOAD RESISTANCE (:)
0
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
SUPPLY VOLTAGE (V)
Figure 32.
Figure 33.
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Typical Performance Characteristics(1) (continued)
Power Derating Curve (SD Package)
fin = 1kHz, RL = 8Ω
3.0
Note 11
1.2
1.0
4 in2
0.8
1 in2
0.6
0.4
0.2
2.5
2.0
4 in2
1.5
1 in2
1.0
0.5
0
0
20
40
60
80
Power Derating Curve (SD Package)
fin = 1kHz, RL = 4Ω
Note 11
TOTAL POWER DISSIPATION (W)
TOTAL POWER DISSIPATION (W)
1.4
0
-30
100 120 140 160
0
AMBIENT TEMPRATURE (°C)
30
60
90
120
150
180
AMBIENT TEMPRATURE (°C)
Figure 34.
Figure 35.
TOTAL POWER DISSIPATION (W)
1.4
Power Derating Curve (TL Package)
fin = 1kHz, RL = 8Ω
Note 11
1.2
4 in2
1.0
200 mm2
0.8
0.6
0 in2
0.4
0.2
0
0
20
40
60
80
100 120 140 160
AMBIENT TEMPRATURE (°C)
Figure 36.
12
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APPLICATION INFORMATION
DIFFERENTIAL AMPLIFIER EXPLANATION
The LM4928 is a fully differential audio amplifier that features differential input and output stages. Internally this is
accomplished by two circuits: a differential amplifier and a common mode feedback amplifier that adjusts the
output voltages so that the average value remains VDD / 2. When setting the differential gain, the amplifier can be
considered to have "halves". Each half uses an input and feedback resistor (Ri1 and RF1) to set its respective
closed-loop gain (see Figure 1). With Ri1 = Ri2 and RF1 = RF2, the gain is set at -RF / Ri for each half per channel.
This results in a differential gain of
AVD = -RF/Ri
(1)
It is extremely important to match the input resistors to each other, as well as the feedback resistors to each
other for best amplifier performance. See the PROPER SELECTION OF EXTERNAL COMPONENTS section for
more information. A differential amplifier works in a manner where the difference between the two input signals is
amplified. In most applications, this would require input signals that are 180° out of phase with each other. The
LM4928 can be used, however, as a single ended input amplifier while still retaining its fully differential benefits.
In fact, completely unrelated signals may be placed on the input pins. The LM4928 simply amplifies the
difference between them.
All of these applications provide what is known as a "bridged mode" output (bridge-tied-load, BTL). This results in
output signals at Vo1 and Vo2 that are 180° out of phase with respect to each other. Bridged mode operation is
different from the single-ended amplifier configuration that connects the load between the amplifier output and
ground. A bridged amplifier design has distinct advantages over the single-ended configuration: it provides
differential drive to the load, thus doubling maximum possible output swing for a specific supply voltage. Four
times the output power is possible compared with a single-ended amplifier under the same conditions. This
increase in attainable output power assumes that the amplifier is not current limited or clipped. In order to choose
an amplifier's closed-loop gain without causing excess clipping, please refer to the Audio Power Amplifier
Design section.
A bridged configuration, such as the one used in the LM4928, also creates a second advantage over singleended amplifiers. Since the differential outputs, Vo1 and Vo2, are biased at half-supply, no net DC voltage exists
across the load. This assumes that the input resistor pair and the feedback resistor pair are properly matched
(see PROPER SELECTION OF EXTERNAL COMPONENTS). BTL configuration eliminates the output coupling
capacitor required in single-supply, single-ended amplifier configurations. If an output coupling capacitor is not
used in a single-ended output configuration, the half-supply bias across the load would result in both increased
internal IC power dissipation as well as permanent loudspeaker damage. Further advantages of bridged mode
operation specific to fully differential amplifiers like the LM4928 include increased power supply rejection ratio,
common-mode noise reduction, and click and pop reduction.
EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS
The LM4928's exposed-DAP (die attach paddle) package (WSON) provide a low thermal resistance between the
die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the
surrounding PCB copper traces, ground plane and, finally, surrounding air. Failing to optimize thermal design
may compromise the LM4928's high power performance and activate unwanted, though necessary, thermal
shutdown protection. The WSON package must have its DAP soldered to a copper pad on the PCB. The DAP's
PCB copper pad is connected to a large plane of continuous unbroken copper. This plane forms a thermal mass
and heat sink and radiation area. Place the heat sink area on either outside plane in the case of a two-sided
PCB, or on an inner layer of a board with more than two layers. Connect the DAP copper pad to the inner layer
or backside copper heat sink area with at least 4 vias thermal via. The via diameter should be 0.012in - 0.013in.
Ensure efficient thermal conductivity by plating-through and solder-filling the vias.
Best thermal performance is achieved with the largest practical copper heat sink area. In all circumstances and
conditions, the junction temperature must be held below 150°C to prevent activating the LM4928's thermal
shutdown protection. The LM4928's power de-rating curve in the Typical Performance Characteristics shows the
maximum power dissipation versus temperature. Example PCB layouts are shown in the Demonstration Board
Layout section. Further detailed and specific information concerning PCB layout, fabrication, and mounting an
WSON package is available from Texas Instruments' package Engineering Group under application note AN1187 (SNOA401).
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PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 4Ω LOADS
Power dissipated by a load is a function of the voltage swing across the load and the load's impedance. As load
impedance decreases, load dissipation becomes increasingly dependent on the interconnect (PCB trace and
wire) resistance between the amplifier output pins and the load's connections. Residual trace resistance causes
a voltage drop, which results in power dissipated in the trace and not in the load as desired. This problem of
decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load
dissipation and widest output voltage swing, PCB traces that connect the output pins to a load must be as wide
as possible.
Poor power supply regulation adversely affects maximum output power. A poorly regulated supply's output
voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output
signal clipping, and reduced output power. Even with tightly regulated supplies, trace resistance creates the
same effects as poor supply regulation. Therefore, making the power supply traces as wide as possible helps
maintain full output voltage swing.
POWER DISSIPATION
Power dissipation is a major concern when designing a successful amplifer, whether the amplifier is bridged or
single-ended. Equation 2 states the maximum power dissipation point for a single-ended amplifier operating at a
given supply voltage and driving a specified output load.
PDMAX = (VDD)2 / (2π2RL) Single-Ended
(2)
However, a direct consequence of the increased power delivered to the load by a bridge amplifier is an increase
in internal power dissipation versus a single-ended amplifier operating at the same conditions.
PDMAX = 4(VDD)2/(2π2RL) Bridge Mode per channel
PDMAX = 8(VDD)2/(2π2RL) Bridge Mode both channel
(3)
(4)
Since the LM4928 has bridged outputs, the maximum internal power dissipation is 4 times that of a single-ended
amplifier. Even with this substantial increase in power dissipation, the LM4928 does not require additional
heatsinking under most operating conditions and output loading. From Equation 3, assuming a 5V power supply
and an 8Ω load, the maximum power dissipation point is 625mW per channel. Then multiply by two or use
Equation 4 to get 1.25W total power dissipation for both channels. The maximum power dissipation point
obtained from Equation 4 must not be greater than the power dissipation results from Equation 5:
PDMAX = (TJMAX - TA) / θJA
(5)
Depending on the ambient temperature, TA, of the system surroundings, Equation 5 can be used to find the
maximum internal power dissipation supported by the IC packaging. If the result of Equation 4 is greater than
that of Equation 5, then either the supply voltage must be decreased, the load impedance increased, the ambient
temperature reduced, or the θJA reduced with heatsinking. In many cases, larger traces near the output, VDD, and
GND pins can be used to lower the θJA. The larger areas of copper provide a form of heatsinking allowing higher
power dissipation. For the typical application of a 5V power supply, with an 8Ω load in the WSON package, the
maximum ambient temperature possible without violating the maximum junction temperature is approximately
85°C provided that device operation is around the maximum power dissipation point. Recall that internal power
dissipation is a function of output power. If typical operation is not around the maximum power dissipation point,
the LM4928 can operate at higher ambient temperatures. Refer to the Typical Performance Characteristics
curves for power dissipation information.
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection ratio (PSRR). The capacitor location on both the bypass and power supply pins should be as close to
the device as possible. A larger half-supply bypass capacitor improves PSRR because it increases half-supply
stability. Typical applications employ a 5V regulator with 10µF and 0.1µF bypass capacitors that increase supply
stability. This, however, does not eliminate the need for bypassing the supply nodes of the LM4928. The LM4928
will operate without the bypass capacitor CB, although the PSRR may decrease. A 1µF capacitor is
recommended for CB. This value maximizes PSRR performance. Lesser values may be used, but PSRR
decreases at frequencies below 1kHz. The issue of CB selection is thus dependant upon desired PSRR and click
and pop performance.
14
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OPTIMIZING RF IMMUNITY
The internal circuitry of the LM4928 suppresses the amount of RF signal that is coupled into the chip. However,
certain external factors, such as output trace length, output trace orientation, distance between the chip and the
antenna, antenna strength, speaker type, and type of RF signal, may affect the RF immunity of the LM4928. In
general, the RF immunity of the LM4928 is application specific. Nevertheless, optimal RF immunity can be
achieved by using short output traces and increasing the distance between the LM4928 and the antenna.
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the LM4928 contains shutdown circuitry that is used to
turn off the amplifier's bias circuitry. The device may then be placed into shutdown mode by toggling the
Shutdown Select pin to logic low. The trigger point for shutdown is shown as a typical value in the Supply
Current vs Shutdown Voltage graphs in the Typical Performance Characteristics section. It is best to switch
between ground and supply for maximum performance. While the device may be disabled with shutdown
voltages in between ground and supply, the idle current may be greater than the typical value of 0.1µA. In either
case, the shutdown pin should be tied to a definite voltage to avoid unwanted state changes.
In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry, which
provides a quick, smooth transition to shutdown. Another solution is to use a single-throw switch in conjunction
with an external pull-up resistor. This scheme ensures that the shutdown pin will not float, thus preventing
unwanted state changes.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using integrated power amplifiers is critical when
optimizing device and system performance. Although the LM4928 is tolerant to a variety of external component
combinations, consideration of component values must be made when maximizing overall system quality.
The LM4928 is unity-gain stable, giving the designer maximum system flexibility. The LM4928 should be used in
low closed-loop gain configurations to minimize THD+N values and maximize signal to noise ratio. Low gain
configurations require large input signals to obtain a given output power. Input signals equal to or greater than
1Vrms are available from sources such as audio codecs. Please refer to the Audio Power Amplifier Design
section for a more complete explanation of proper gain selection. When used in its typical application as a fully
differential power amplifier the LM4928 does not require input coupling capacitors for input sources with DC
common-mode voltages of less than VDD. Exact allowable input common-mode voltage levels are actually a
function of VDD, Ri, and Rf and may be determined by Equation 6:
VCMi < (VDD-1.2)(Ri+Rf)/Rf-VDD/2(Ri/Rf)
(6)
Special care must be taken to match the values of the input resistors (Ri1 and Ri2) and (Rf1 and Rf2) to each
other. Because of the balanced nature of differential amplifiers, resistor matching differences can result in net DC
currents across the load. This DC current can increase power consumption, internal IC power dissipation, reduce
PSRR, CMRR, and possibly damaging the loudspeaker. The chart below demonstrates this problem by showing
the effects of differing values between the input resistors while assuming that the feedback resistors are perfectly
matched. The results below apply to the application circuit shown in Figure 1, and assumes that VDD = 5V, RL =
8Ω, and the system has DC coupled inputs tied to ground.
Tolerance
Ri1
Ri2
V02 - V01
ILOAD
20%
0.8R
1.2R
-0.500V
62.5mA
10%
0.9R
1.1R
-0.250V
31.25mA
5%
0.95R
1.05R
-0.125V
15.63mA
1%
0.99R
1.01R
-0.025V
3.125mA
0%
R
R
0
0
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Similar results would occur if the feedback resistors were not carefully matched. Adding input coupling resistors
in between the signal source and the input resistors will eliminate this problem, however. To achieve best
performance with minimum component count, it is highly recommended that both the feedback and input
resistors matched to 1% tolerance or better for best performance.
AUDIO POWER AMPLIFIER DESIGN
Design a 1W/8Ω Audio Amplifier
Given:
Power Output
1Wrms
Load Impedance
8Ω
Maximum Input Level
1Vrms
Maximum Input Impedance
20kΩ
Bandwidth
100Hz–20kHz ± 0.25dB
A designer must first determine the minimum supply rail to obtain the specified output power. The supply rail can
easily be found by extrapolating from the Output Power vs Supply Voltage graphs in the Typical Performance
Characteristics section. A second way to determine the minimum supply rail is to calculate the required VOPEAK
using Equation 7 and add the dropout voltages. Using this method, the minimum supply voltage is (Vopeak +
(VDO TOP + VDO BOT), where VDO BOT and VDO TOP are extrapolated from the Dropout Voltage vs Supply Voltage
curve in the Typical Performance Characteristics section.
(7)
Using the Output Power vs Supply Voltage graph for an 8Ω load, the minimum supply rail just about 4.5V. Extra
supply voltage creates headroom that allows the LM4928 to reproduce peaks in excess of 1W without producing
audible distortion. At this time, the designer must make sure that the power supply choice along with the output
impedance does not violate the conditions explained in the POWER DISSIPATION section. Once the power
dissipation equations have been addressed, the required differential gain can be determined from Equation 8.
(8)
(9)
Rf / Ri = AVD
From Equation 8, the minimum AVD is 2.83. With Rf = 40kΩ, a ratio of Rf to Ri of 2.83 gives Ri = 14kΩ. The final
design step is to address the bandwidth requirement which must be stated as a single -3dB frequency point. Five
times away from a -3dB point is 0.17dB down from passband response which is better than the required ±0.25dB
specified.
fH = 20kHz * 5 = 100kHz
(10)
The high frequency pole is determined by the product of the desired frequency pole, fH , and the differential gain,
AVD . With a AVD = 2.83 and fH = 100kHz, the resulting GBWP = 283kHz which is much smaller than the LM4928
GBWP of 10MHz. This figure displays that if a designer has a need to design an amplifier with a higher
differential gain, the LM4928 can still be used without running into bandwidth limitations.
16
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SNAS330E – DECEMBER 2005 – REVISED APRIL 2013
LM4928 Demo Board Schematic
Rf1+
Rf1-
VDD
Cs1,2 +
1 PF
JP4
-IN
IN1Ci1-
-
VO2+
Ri1RL
Common
Mode
8:
JP5
VO1+IN
IN1+
Ci1+
+
Ri1+
VDD
SD
JP7
BYP
Rpd
Bias
+
CB
JP3
-IN
IN2Ci2-
-
VO2+
Ri2RL
Common
Mode
8:
JP2
VO1+IN
IN2+
Ci2+
+
Ri2+
GND
Rf2-
Rf2+
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LM4928
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LM4928 WSON Demo Board Artwork
Top Silkscreen
Top Layer
Bottom Layer and Ground Plane
18
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LM4928 DSBGA Board Artwork
Top Silkscreen
Top Layer
Middle Layer
Bottom Layer and Ground Plane
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Revision History
20
Rev
Date
Description
1.0
7/13/05
Input first set of edits.
1.1
10/3/05
More edits input.
1.2
10/10/05
Input few text edits.
1.3
10/25/04
Added the Typ Perf section.
1.4
11/02/05
Added the X1, X2, and X3 values on the
NHK0014A mktg outline.
1.5
11/15/05
Added 3 more curves (66, 67, and 68) and
some texts edits.
1.6
11/16/05
Texts edits.
1.7
12/13/05
Added 4 more curves (69, 70, 71, and 72) and
did some texts edits.
1.8
12/14/05
First WEB released (per Kashif).
1.9
12/16/05
Coded the LM4928TL ( Future Product ) for it
will be released soon ( early January, 2006) per
Kashif.
Re-released D/S to the WEB.
2.0
01/04/06
Released the TL package to the WEB.
2.1
01/09/06
Edited B7 and B8 (now 73), then re-released
D/S to the WEB (per Kashif).
2.2
02/01/06
Text edits, then re-released D/S to the WEB.
E
04/05/13
Changed layout of National Data Sheet to TI
format
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LM4928SD/NOPB
ACTIVE
WSON
NHK
14
1000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 85
L4928
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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