LM4951SDBD

LM4951 www.ti.com SNAS244N – AUGUST 2004 – REVISED MAY 2013 LM4951 Wide Voltage Range 1.8 Watt Audio Amplifier Check for Samples: LM4951 FEATURES DESCRIPTION • The LM4951 is an audio power amplifier primarily designed for demanding applications in Portable Handheld devices. It is capable of delivering 1.8W mono BTL to an 8Ω load, continuous average power, with less than 1% distortion (THD+N) from a 7.5VDC power supply. 1 2 • • • • • Click and Pop Circuitry Eliminates Noise during Turn-On and Turn-Off Transitions Low Current, Active-Low Shutdown Mode Low Quiescent Current Thermal Shutdown Protection Unity-Gain Stable External Gain Configuration Capability APPLICATIONS • • • Portable Handheld Devices up to 9V Cell Phone PDA KEY SPECIFICATIONS • • • • • Wide Voltage Range: 2.7V to 9 V Quiescent Power Supply Current (VDD = 7.5V): 2.5mA (typ) Power Output BTL at 7.5V, 1% THD: 1.8 W (typ) Shutdown Current: 0.01µA (typ) Fast Turn on Time: 25ms (typ) Boomer audio power amplifiers were designed specifically to provide high quality output power with a minimal amount of external components. The LM4951 does not require bootstrap capacitors, or snubber circuits. The LM4951 features a low-power consumption active-low shutdown mode. Additionally, the LM4951 features an internal thermal shutdown protection mechanism. The LM4951 contains advanced click and pop circuitry that eliminates noises which would otherwise occur during turn-on and turn-off transitions. The LM4951 is unity-gain stable and can be configured by external gain-setting resistors. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2013, Texas Instruments Incorporated LM4951 SNAS244N – AUGUST 2004 – REVISED MAY 2013 www.ti.com Typical Application Rf VDD Cs 1.0 PF VDD Ri 20k Ci 0.39 PF VIN - Vo- AMPA 1k Rc CBYPASS VIH 1.0 PF + CCHG 20k Control Bias Bypass 8: VIL Shutdown control 20k Shutdown + AMPB Vo+ GND * RC is needed for over/under voltage protection. If inputs are less than VDD +0.3V and greater than –0.3V, and if inputs are disabled when in shutdown mode, then RC may be shorted. Figure 1. Typical Bridge-Tied-Load (BTL) Audio Amplifier Application Circuit Connection Diagram + Bypass 1 10 VO Shutdown 2 9 VDD CCHG 3 8 NC NC 4 7 GND VIN 5 6 VO - Figure 2. DPR Package (Top View) See Package Number DPR0010A Vo VIN A Cchg GND B VDD GND SHUTDOWN BYPASS C 1 A. 2 Vo + 3 * DAP can either be soldered to GND or left floating. Figure 3. 9 Bump DSBGA Package (Top View) See Package Number YZR0009AAA 2 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 LM4951 www.ti.com SNAS244N – AUGUST 2004 – REVISED MAY 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) (3) Supply Voltage 9.5V −65°C to +150°C Storage Temperature −0.3V to VDD + 0.3V Input Voltage (4) Internally limited ESD Susceptibility (5) 2000V ESD Susceptibility (6) 200V Power Dissipation Junction Temperature 150°C Thermal Resistance θJA (WSON) (4) 52°C/W See AN-1187 'Leadless Leadframe Packaging (WSON)' (Literature Number SNOA401) (1) (2) (3) (4) (5) (6) All voltages are measured with respect to the GND pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication of device performance. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature, TA. The maximum allowable power dissipation is P DMAX = (TJMAX − TA) / θJA or the given in Absolute Maximum Ratings, whichever is lower. For the LM4951 typical application (shown in Figure 1) with VDD = 7.5V, RL = 8Ω mono-BTL operation the max power dissipation is 1.42W. θJA = 73°C/W. Human body model, 100pF discharged through a 1.5kΩ resistor. Machine Model, 220pF–240pF discharged through all pins. Operating Ratings Temperature Range TMIN ≤ TA ≤ TMAX −40°C ≤ T A ≤ +85°C 2.7V ≤ VDD ≤ 9V Supply Voltage Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 3 LM4951 SNAS244N – AUGUST 2004 – REVISED MAY 2013 www.ti.com Electrical Characteristics VDD = 7.5V (1) (2) The following specifications apply for VDD = 7.5V, AV-BTL = 6dB, RL = 8Ω unless otherwise specified. Limits apply for TA = 25°C. Symbol Parameter Conditions LM4951 Typical (3) Limit (4) (5) Units (Limits) IDD Quiescent Power Supply Current VIN = 0V, IO = 0A,RL = 8Ω 2.5 4.5 ISD Shutdown Current VSHUTDOWN = GND (6) 0.01 5 mA (max) µA (max) VOS Offset Voltage 5 30 mV (max) VSDIH Shutdown Voltage Input High 1.2 V (min) VSDIL Shutdown Voltage Input Low Rpulldown Pulldown Resistor on S/D TWU Wake-up Time CB = 1.0µF Tsd Shutdown time CB = 1.0µF 0.4 V (max) 75 45 kΩ (min) 25 35 ms 10 ms (max) 170 150 190 °C (min) °C (max) TSD Thermal Shutdown Temperature PO Output Power THD = 1% (max); f = 1kHz RL = 8Ω Mono BTL 1.8 1.5 W (min) THD+N Total Harmomic Distortion + Noise PO = 600mWrms; f = 1kHz AV-BTL = 6dB 0.07 0.5 % (max) THD+N Total Harmomic Distortion + Noise PO = 600mWrms; f = 1kHz AV-BTL = 26dB 0.35 % εOS Output Noise A-Weighted Filter, Ri = Rf = 20kΩ Input Referred, Note 10 10 µV PSRR Power Supply Rejection Ratio VRIPPLE = 200mVp-p, f = 217Hz, CB = 1.0μF, Input Referred 66 (1) (2) (3) (4) (5) (6) 4 56 dB (min) All voltages are measured with respect to the GND pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Limits are specified to AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are specified by design, test, or statistical analysis. Shutdown current is measured in a normal room environment. The Shutdown pin should be driven as close as possible to GND for minimum shutdown current. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 LM4951 www.ti.com SNAS244N – AUGUST 2004 – REVISED MAY 2013 Electrical Characteristics VDD = 3.3V (1) (2) The following specifications apply for VDD = 3.3V, AV-BTL = 6dB, RL = 8Ω unless otherwise specified. Limits apply for TA = 25°C. Symbol Parameter Conditions LM4951 Typical (3) Limit (4) (5) Units (Limits) IDD Quiescent Power Supply Current VIN = 0V, IO = 0A,RL = 8Ω 2.5 4.5 ISD Shutdown Current VSHUTDOWN = GND (6) 0.01 2 µA (max) VOS Offset Voltage 3 30 mV (max) VSDIH Shutdown Voltage Input High 1.2 V (min) VSDIL Shutdown Voltage Input Low TWU Wake-up Time CB = 1.0µF Tsd Shutdown time CB = 1.0µF PO Output Power THD = 1% (max); f = 1kHz RL = 8Ω Mono BTL THD+N Total Harmomic Distortion + Noise1 THD+N 0.4 25 mA (max) V (max) ms (max) 10 ms (max) 280 230 mW (min) PO = 100mWrms; f = 1kHz AV-BTL = 6dB 0.07 0.5 % (max) Total Harmomic Distortion + Noise1 PO = 100mWrms; f = 1kHz AV-BTL = 26dB 0.35 % εOS Output Noise A-Weighted Filter, Ri = Rf = 20kΩ Input Referred, Note 10 10 µV PSRR Power Supply Rejection Ratio VRIPPLE = 200mVp-p, f = 217Hz, CB = 1μF, Input Referred 71 (1) (2) (3) (4) (5) (6) 61 dB (min) All voltages are measured with respect to the GND pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25°C and represent the parametric norm. Limits are specified to AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are specified by design, test, or statistical analysis. Shutdown current is measured in a normal room environment. The Shutdown pin should be driven as close as possible to GND for minimum shutdown current. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 5 LM4951 SNAS244N – AUGUST 2004 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics 10 THD+N vs Frequency VDD = 3.3V, PO = 100mW, AV = 6dB 10 THD+N vs Frequency VDD = 3.3V, PO = 100mW, AV = 26dB 5 2 1 THD+N (%) THD+N (%) 1 0.5 0.2 0.1 0.1 0.05 0.02 0.01 20 200 2k 0.01 20 20k Figure 5. THD+N vs Frequency VDD = 5V, PO = 400mW, AV = 6dB THD+N vs Frequency VDD = 5V, PO = 400mW, AV = 26dB 10 5 5 2 2 1 1 0.5 0.2 0.5 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 20 50 100 200 500 1k 2k 0.01 20 5k 10k 20k FREQUENCY (Hz) 10 5k 10k 20k Figure 4. THD+N (%) THD+N (%) 10 50 100 200 500 1k 2k FREQUENCY (Hz) FREQUENCY (Hz) 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) Figure 6. Figure 7. THD+N vs Frequency VDD = 7.5V, PO = 600mW, AV = 6dB THD+N vs Frequency VDD = 7.5V, PO = 600mW, AV = 26dB 10 5 5 2 THD+N (%) THD+N (%) 1 0.5 0.2 0.1 2 1 0.5 0.05 0.2 0.02 0.01 20 0.1 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) 200 2k 20k FREQUENCY (Hz) Figure 8. 6 20 Figure 9. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 LM4951 www.ti.com SNAS244N – AUGUST 2004 – REVISED MAY 2013 Typical Performance Characteristics (continued) 10 THD+N vs Output Power VDD = 3.3V, f = 1kHz, AV = 6dB THD+N vs Output Power VDD = 3.3V, f = 1kHz, AV = 26dB 10 1 THD+N (%) THD+N (%) 5 0.1 2 1 0.5 0.2 0.01 30m 10m 0.1 10m 500m 100m 20m OUTPUT POWER (W) 30m 50m 70m 100m 300m 500m 40m 60m 80m 200m 400m OUTPUT POWER (W) 10 Figure 10. Figure 11. THD+N vs Output Power VDD = 5V, f = 1kHz, AV = 6dB THD+N vs Output Power VDD = 5V, f = 1kHz, AV = 26dB 10 5 5 2 THD+N (%) THD+N (%) 1 0.5 0.2 0.1 2 1 0.5 0.05 0.2 0.02 0.01 10m 20m 50m 100m 200m 500m 0.1 10m 20m 1 OUTPUT POWER (W) 10 50m 100m 200m 500m 1 OUTPUT POWER (W) Figure 12. Figure 13. THD+N vs Output Power VDD = 7.5V, f = 1kHz, AV = 6dB THD+N vs Output Power VDD = 7.5V, f = 1kHz, AV = 26dB 10 5 5 1 THD+N (%) THD+N (%) 2 0.5 0.2 0.1 2 1 0.5 0.05 0.2 0.02 0.01 10m 20m 50m 100m 200m 500m 1 2 3 0.1 10m 20m 50m 100m 200m 500m 1 2 3 OUTPUT POWER (W) OUTPUT POWER (W) Figure 14. Figure 15. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 7 LM4951 SNAS244N – AUGUST 2004 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) Power Supply Rejection vs Frequency VDD = 3.3V, AV = 6dB, VRIPPLE = 200mVP-P Input Terminated into 10Ω Power Supply Rejection vs Frequency VDD = 3.3V, AV = 26dB, VRIPPLE = 200mVP-P Input Terminated into 10Ω +0 -10 -20 PSRR (dB) PSRR (dB) -30 -40 -50 -60 -70 -80 -90 -100 20 50 100 200 500 1k 2k +0 -2.5 -5 -7.5 -10 -12.5 -15 -17.5 -20 -22.5 -25 -27.5 -30 -32.5 -35 -37.5 -40 -42.5 -45 -47.5 -50 -52.5 -55 -57.5 -60 20 5k 10k 20k Figure 16. Figure 17. Power Supply Rejection vs Frequency VDD = 5V, AV = 6dB, VRIPPLE = 200mVP-P Input Terminated into 10Ω Power Supply Rejection vs Frequency VDD = 5V, AV = 26dB, VRIPPLE = 200mVP-P Input Terminated into 10Ω +0 -10 -20 PSRR (dB) PSRR (dB) -30 -40 -50 -60 -70 -80 -90 -100 20 50 100 200 500 1k 2k +0 -2.5 -5 -7.5 -10 -12.5 -15 -17.5 -20 -22.5 -25 -27.5 -30 -32.5 -35 -37.5 -40 -42.5 -45 -47.5 -50 -52.5 -55 -57.5 -60 20 5k 10k 20k 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 18. Figure 19. Power Supply Rejection vs Frequency VDD = 7.5V, AV = 6dB, VRIPPLE = 200mVP-P Input Terminated into 10Ω Power Supply Rejection vs Frequency VDD = 7.5V, AV = 26dB, VRIPPLE = 200mVP-P Input Terminated into 10Ω +0 -10 -20 PSRR (dB) -30 PSRR (dB) 5k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) -40 -50 -60 -70 -80 -90 -100 20 50 100 200 500 1k 2k 5k 10k 20k +0 -2.5 -5 -7.5 -10 -12.5 -15 -17.5 -20 -22.5 -25 -27.5 -30 -32.5 -35 -37.5 -40 -42.5 -45 -47.5 -50 -52.5 -55 -57.5 -60 20 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 20. 8 50 100 200 500 1k 2k Figure 21. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 LM4951 www.ti.com SNAS244N – AUGUST 2004 – REVISED MAY 2013 Typical Performance Characteristics (continued) Noise Floor VDD = 3.3V, AV = 6dB, Ri = Rf = 20kΩ BW < 80kHz, A-weighted Noise Floor VDD = 3V, AV = 26dB, Ri = 20kΩ, Rf = 200kΩ BW < 80kHz, A-weighted 30P OUTPUT NOISE VOLTAGE (V) OUTPUT NOISE VOLTAGE (V) 50P 40P 20P 10P 9P 8P 7P 6P 5P 4P 3P 2P 150P 120P 100P 95P 90P 85P 82P 75P 72P 65P 62P 55P 52P 50P 1P 20 50 100 200 500 1k 2k 20 5k 10k 20k 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 22. Figure 23. Noise Floor VDD = 5V, AV = 6dB, Ri = Rf = 20kΩ BW < 80kHz, A-weighted Noise Floor VDD = 5V, AV = 26dB, Ri = 20kΩ, Rf = 200kΩ BW < 80kHz, A-weighted 30P OUTPUT NOISE VOLTAGE (V) OUTPUT NOISE VOLTAGE (V) 50P 40P 20P 10P 9P 8P 7P 6P 5P 4P 3P 2P 120P 100P 95P 90P 85P 82P 75P 72P 65P 62P 55P 52P 50P 1P 20 150P 50 100 200 500 1k 2k 20 5k 10k 20k 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 24. Figure 25. Noise Floor VDD = 7.5V, AV = 6dB, Ri = Rf = 20kΩ BW < 80kHz, A-weighted Noise Floor VDD = 7.5V, AV = 26dB, Ri = 20kΩ, Rf = 200kΩ BW < 80kHz, A-weighted 30P OUTPUT NOISE VOLTAGE (V) OUTPUT NOISE VOLTAGE (V) 50P 40P 20P 10P 9P 8P 7P 6P 5P 4P 3P 2P 120P 100P 95P 90P 85P 82P 75P 72P 65P 62P 55P 52P 50P 1P 20 150P 50 100 200 500 1k 2k 5k 10k 20k 20 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 26. Figure 27. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 9 LM4951 SNAS244N – AUGUST 2004 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) Power Dissipation vs Output Power VDD = 3.3V, RL = 8Ω, f = 1kHz Power Dissipation vs Output Power VDD = 7.5V, RL = 8Ω, f = 1kHz 1600 300 POWER DISSIPATION (mW) POWER DISSIPATION (mW) 1400 250 200 150 100 1200 1000 800 600 400 200 50 0 0 0 0 50 100 150 200 250 200 400 600 800 1000 1200 1400 OUTPUT POWER (mW) 300 OUTPUT POWER (mW) Figure 28. Figure . Supply Current vs Supply Voltage RL = 8Ω, VIN = 0V, Rsource = 50Ω Clipping Voltage vs Supply Voltage RL = 8Ω, from top to bottom: Negative Voltage Swing; Positive Voltage Swing 1.4 2.5 DROPOUT VOPLTAGE (V) SUPPLY CURRENT (mA) 1.2 2 1.5 1 0.5 1 0.8 0.6 0.4 0.2 0 0 2 3 4 5 6 7 8 9 0 10 2 SUPPLY VOLTAGE (V) 6 8 10 Figure 30. Output Power vs Supply Voltage RL = 8Ω, from top to bottom: THD+N = 10%, THD+N = 1% Output Power vs Load Resistance VDD = 3.3V, f = 1kHz from top to bottom: THD+N = 10%, THD+N = 1% 4 450 3.5 400 OUTPUT POWER (mW) OUTPUT POWER (mW) Figure 29. 3 2.5 2 1.5 1 0.5 350 300 250 200 150 100 50 0 0 2.7 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9 0 20 40 60 80 100 LOAD RESISTANCE (W) SUPPLY VOLTAGE (V) Figure 31. 10 4 SUPPLY VOLTAGE (V) Figure 32. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 LM4951 www.ti.com SNAS244N – AUGUST 2004 – REVISED MAY 2013 Typical Performance Characteristics (continued) Output Power vs Load Resistance VDD = 7.5V, f = 1kHz from top to bottom: THD+N = 10%, THD+N = 1% Frequency Response vs Input Capacitor Size RL = 8Ω from top to bottom: Ci = 1.0µF, Ci = 0.39µF, Ci = 0.039µF 3000 20 2500 12 OUTPUT LEVEL (dB) OUTPUT POWER (mW) 16 2000 1500 1000 8 4 0 -4 -8 -12 -16 -20 500 -24 -28 0 8 16 32 48 64 80 20 96 112 LOAD RESISTANCE (W) 50 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) Figure 33. Figure 34. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 11 LM4951 SNAS244N – AUGUST 2004 – REVISED MAY 2013 www.ti.com APPLICATION INFORMATION HIGH VOLTAGE BOOMER Unlike previous 5V Boomer amplifiers, the LM4951 is designed to operate over a power supply voltages range of 2.7V to 9V. Operating on a 7.5V power supply, the LM4951 will deliver 1.8W into an 8Ω BTL load with no more than 1% THD+N. BRIDGE CONFIGURATION EXPLANATION As shown in Figure 1, the LM4951 consists of two operational amplifiers that drive a speaker connected between their outputs. The value of input and feedback resistors determine the gain of each amplifier. External resistors Ri and Rf set the closed-loop gain of AMPA, whereas two 20kΩ internal resistors set AMPB's gain to -1. The LM4951 drives a load, such as a speaker, connected between the two amplifier outputs, VO+ and VO -. Figure 1 shows that AMPA's output serves as AMPB's input. This results in both amplifiers producing signals identical in magnitude, but 180° out of phase. Taking advantage of this phase difference, a load is placed between AMPA and AMPB and driven differentially (commonly referred to as "bridge mode"). This results in a differential, or BTL, gain of AVD = 2(Rf/ Ri) (1) Bridge mode amplifiers are different from single-ended amplifiers that drive loads connected between a single amplifier's output and ground. For a given supply voltage, bridge mode has a distinct advantage over the singleended configuration: its differential output doubles the voltage swing across the load. Theoretically, this produces four times the output power when compared to a single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not current limited and that the output signal is not clipped. To ensure minimum output signal clipping when choosing an amplifier's closed-loop gain, refer to the AUDIO POWER AMPLIFIER DESIGN section. Under rare conditions, with unique combinations of high power supply voltage and high closed loop gain settings, the LM4951 may exhibit low frequency oscillations. Another advantage of the differential bridge output is no net DC voltage across the load. This is accomplished by biasing AMP1's and AMP2's outputs at half-supply. This eliminates the coupling capacitor that single supply, single-ended amplifiers require. Eliminating an output coupling capacitor in a typical single-ended configuration forces a single-supply amplifier's half-supply bias voltage across the load. This increases internal IC power dissipation and may permanently damage loads such as speakers. POWER DISSIPATION Power dissipation is a major concern when designing a successful bridged amplifier. The LM4951's dissipation when driving a BTL load is given by Equation (2). For a 7.5V supply and a single 8Ω BTL load, the dissipation is 1.42W. PDMAX-MONOBTL = 4(VDD) 2/ 2π2RL: Bridge Mode (2) The maximum power dissipation point given by Equation (2) must not exceed the power dissipation given by Equation (3): PDMAX' = (TJMAX - TA) / θJA (3) The LM4951's TJMAX = 150°C. In the DPR package, the LM4951's θJA is 73°C/W when the metal tab is soldered to a copper plane of at least 1in2. This plane can be split between the top and bottom layers of a two-sided PCB. Connect the two layers together under the tab with an array of vias. At any given ambient temperature TA, use Equation (3) to find the maximum internal power dissipation supported by the IC packaging. Rearranging Equation (3) and substituting PDMAX for PDMAX' results in Equation (4). This equation gives the maximum ambient temperature that still allows maximum stereo power dissipation without violating the LM4951's maximum junction temperature. TA = TJMAX - PDMAX-MONOBTLθJA (4) For a typical application with a 7.5V power supply and a BTL 8Ω load, the maximum ambient temperature that allows maximum stereo power dissipation without exceeding the maximum junction temperature is approximately 46°C for the TS package. 12 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 LM4951 www.ti.com SNAS244N – AUGUST 2004 – REVISED MAY 2013 TJMAX = PDMAX-MONOBTLθJA + TA (5) Equation (5) gives the maximum junction temperature TJMAX. If the result violates the LM4951's 150°C, reduce the maximum junction temperature by reducing the power supply voltage or increasing the load resistance. Further allowance should be made for increased ambient temperatures. The above examples assume that a device is operating around the maximum power dissipation point. Since internal power dissipation is a function of output power, higher ambient temperatures are allowed as output power or duty cycle decreases. If the result of Equation 2 is greater than that of Equation (3), then decrease the supply voltage, increase the load impedance, or reduce the ambient temperature. Further, ensure that speakers rated at a nominal 8Ω do not fall below 6Ω. If these measures are insufficient, a heat sink can be added to reduce θJA. The heat sink can be created using additional copper area around the package, with connections to the ground pins, supply pin and amplifier output pins. Refer to the Typical Performance Characteristics curves for power dissipation information at lower output power levels. POWER SUPPLY VOLTAGE LIMITS Continuous proper operation is ensured by never exceeding the voltage applied to any pin, with respect to ground, as listed in the Absolute Maximum Ratings section. POWER SUPPLY BYPASSING As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. Applications that employ a voltage regulator typically use a 10µF in parallel with a 0.1µF filter capacitors to stabilize the regulator's output, reduce noise on the supply line, and improve the supply's transient response. However, their presence does not eliminate the need for a local 1.0µF tantalum bypass capacitance connected between the LM4951's supply pins and ground. Do not substitute a ceramic capacitor for the tantalum. Doing so may cause oscillation. Keep the length of leads and traces that connect capacitors between the LM4951's power supply pin and ground as short as possible. Connecting a larger capacitor, CBYPASS, between the BYPASS pin and ground improves the internal bias voltage's stability and improves the amplifier's PSRR. The PSRR improvements increase as the bypass pin capacitor value increases. Too large, however, increases turn-on time and can compromise the amplifier's click and pop performance. The selection of bypass capacitor values, especially CBYPASS, depends on desired PSRR requirements, click and pop performance (as explained in the section, SELECTING EXTERNAL COMPONENTS), system cost, and size constraints. MICRO-POWER SHUTDOWN The LM4951 features an active-low micro-power shutdown mode. When active, the LM4951's micro-power shutdown feature turns off the amplifier's bias circuitry, reducing the supply current. The low 0.01µA typical shutdown current is achieved by applying a voltage to the SHUTDOWN pin that is as near to GND as possible. A voltage that is greater than GND may increase the shutdown current. There are a few methods to control the micro-power shutdown. These include using a single-pole, single-throw switch (SPST), a microprocessor, or a microcontroller. When using a switch, connect the SPST switch between the shutdown pin and VDD. Select normal amplifier operation by closing the switch. Opening the switch applies GND to the SHUTDOWN pin activating micro-power shutdwon.The switch and internal pull-down resistor ensures that the SHUTDOWN pin will not float. This prevents unwanted state changes. In a system with a microprocessor or a microcontroller, use a digital output to apply the active-state voltage to the SHUTDOWN pin. SELECTING EXTERNAL COMPONENTS Input Capacitor Value Selection Two quantities determine the value of the input coupling capacitor: the lowest audio frequency that requires amplification and desired output transient suppression. As shown in Figure 1, the input resistor (Ri) and the input capacitor (Ci) produce a high pass filter cutoff frequency that is found using Equation 6. fc = 1/2πRiCi (6) Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 13 LM4951 SNAS244N – AUGUST 2004 – REVISED MAY 2013 www.ti.com As an example when using a speaker with a low frequency limit of 50Hz, Ci, using Equation (6) is 0.159µF. The 0.39µF CINA shown in Figure 1 allows the LM4951 to drive high efficiency, full range speaker whose response extends below 30Hz. Selecting Value For RC The LM4951 is designed for very fast turn on time. The Cchg pin allows the input capacitors (CinA and CinB) to charge quickly to improve click/pop performance. Rchg1 and Rchg2 protect the Cchg pins from any over/under voltage conditions caused by excessive input signal or an active input signal when the device is in shutdown. The recommended value for Rchg1 and Rchg2 is 1kΩ. If the input signal is less than VDD+0.3V and greater than -0.3V, and if the input signal is disabled when in shutdown mode, Rchg1 and Rchg2 may be shorted out. OPTIMIZING CLICK AND POP REDUCTION PERFORMANCE The LM4951 contains circuitry that eliminates turn-on and shutdown transients ("clicks and pops"). For this discussion, turn-on refers to either applying the power supply voltage or when the micro-power shutdown mode is deactivated. As the VDD/2 voltage present at the BYPASS pin ramps to its final value, the LM4951's internal amplifiers are configured as unity gain buffers. An internal current source charges the capacitor connected between the BYPASS pin and GND in a controlled manner. Ideally, the input and outputs track the voltage applied to the BYPASS pin. The gain of the internal amplifiers remains unity until the voltage on the bypass pin reaches VDD/2. As soon as the voltage on the bypass pin is stable, there is a delay to prevent undesirable output transients (“click and pops”). After this delay, the device becomes fully functional. AUDIO POWER AMPLIFIER DESIGN Audio Amplifier Design: Driving 1.8W into an 8Ω BTL The following are the desired operational parameters: Power Output 1.8WRMS Load Impedance 8Ω Input Level 0.3VRMS (max) Input Impedance 20kΩ Bandwidth 50Hz–20kHz ± 0.25dB The design begins by specifying the minimum supply voltage necessary to obtain the specified output power. One way to find the minimum supply voltage is to use the Equation (7) curve in the Typical Performance Characteristics section. Another way, using Equation 7, is to calculate the peak output voltage necessary to achieve the desired output power for a given load impedance. To account for the amplifier's dropout voltage, two additional voltages, based on the Figure 30 in the Typical Performance Characteristics curves, must be added to the result obtained by Equation (7). The result is Equation (8). (7) (8) VDD = VOUTPEAK + VODTOP + VODBOT The commonly used 7.5V supply voltage easily meets this. The additional voltage creates the benefit of headroom, allowing the LM4951 to produce peak output power in excess of 1.8W without clipping or other audible distortion. The choice of supply voltage must also not create a situation that violates of maximum power dissipation as explained above in the POWER DISSIPATION section. After satisfying the LM4951's power dissipation requirements, the minimum differential gain needed to achieve 1.8W dissipation in an 8Ω BTL load is found using Equation (9). (9) Thus, a minimum gain of 12.6 allows the LM4951's to reach full output swing and maintain low noise and THD+N performance. For this example, let AV-BTL = 13. The amplifier's overall BTL gain is set using the input (Ri) and feedback (Rf) resistors of the first amplifier in the series BTL configuration. Additionaly, AV-BTL is twice the gain set by the first amplifier's Ri and Rf. With the desired input impedance set at 20kΩ, the feedback resistor is found using Equation (10). 14 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 LM4951 www.ti.com SNAS244N – AUGUST 2004 – REVISED MAY 2013 Rf/ Ri = AV-BTL/ 2 (10) The value of Rf is 130kΩ (choose 191kΩ, the closest value). The nominal output power is 1.8W. The last step in this design example is setting the amplifier's -3dB frequency bandwidth. To achieve the desired ±0.25dB pass band magnitude variation limit, the low frequency response must extend to at least one-fifth the lower bandwidth limit and the high frequency response must extend to at least five times the upper bandwidth limit. The gain variation for both response limits is 0.17dB, well within the ±0.25dB-desired limit. The results are an fL = 50Hz / 5 = 10Hz (11) and an fL = 20kHz x 5 = 100kHz (12) As mentioned in the SELECTING EXTERNAL COMPONENTS section, Ri and Ci create a highpass filter that sets the amplifier's lower bandpass frequency limit. Find the coupling capacitor's value using Equation (13). Ci = 1 / 2πRifL (13) The result is 1 / (2πx20kΩx10Hz) = 0.795µF (14) Use a 0.82µF capacitor, the closest standard value. The product of the desired high frequency cutoff (100kHz in this example) and the differential gain AVD, determines the upper passband response limit. With AVD = 7 and fH = 100kHz, the closed-loop gain bandwidth product (GBWP) is 700kHz. This is less than the LM4951's 3.5MHz GBWP. With this margin, the amplifier can be used in designs that require more differential gain while avoiding performance restricting bandwidth limitations. RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT Figures 6-8 show the recommended two-layer PC board layout that is optimized for the DPR0010A. This circuit is designed for use with an external 7.5V supply 8Ω (min) speakers. These circuit boards are easy to use. Apply 7.5V and ground to the board's VDD and GND pads, respectively. Connect a speaker between the board's OUTA and OUTB outputs. Demonstration Board Layout Figure 35. Recommended TS SE PCB Layout: Top Silkscreen Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 15 LM4951 SNAS244N – AUGUST 2004 – REVISED MAY 2013 www.ti.com Figure 36. Recommended TS SE PCB Layout: Top Layer Figure 37. Recommended TS SE PCB Layout: Bottom Layer Revision History 16 Rev Date 1.0 8/25/04 Initial WEB. 1.1 10/19/05 Added the DSBGA pkg, then WEB. Submit Documentation Feedback Description Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 LM4951 www.ti.com SNAS244N – AUGUST 2004 – REVISED MAY 2013 Rev Date Description 1.2 08/30/06 Added the Limit value (=35) on the Twu (7.5V Elect Char table), then WEB. 1.3 09/11/06 Added the “Selecting Value For Rc, then WEB. 1.4 05/21/07 Fixed a typo ( X3 value = 0.600±0.075) instead of (X3 = 0.600±0.75). 1.5 03/18/09 Text edits. N 05/03/13 Changed layout of National Data Sheet to TI format. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM4951 17 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LM4951SD/NOPB ACTIVE WSON DPR 10 1000 RoHS & Green SN Level-1-260C-UNLIM L4951SD LM4951SDX/NOPB ACTIVE WSON DPR 10 4500 RoHS & Green SN Level-1-260C-UNLIM L4951SD (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of