LM4961, LM4961LQBD
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SNAS242K – AUGUST 2004 – REVISED MAY 2013
LM4961
Ceramic Speaker Driver
Check for Samples: LM4961, LM4961LQBD
FEATURES
DESCRIPTION
•
The LM4961 is an audio power amplifier primarily
designed for driving Ceramic Speaker for applications
in Cell Phone and PDAs. It integrates a boost
converter, with variable output voltage, with an audio
power amplifier. It is capable of driving 15Vp-p in BTL
mode to 2uF+ 30 ohms load, continuous average
power, with less than 1% distortion (THD+N) from a
3.2VDC power supply.
1
2
•
•
•
•
•
•
•
•
Click and Pop Circuitry Eliminates Noise
During Turn-On and Turn-Off Transitions
Low Current Shutdown Mode
Low Quiescent Current
Mono 15Vp-p BTL Output, RL = 2μF+30Ω, f =
1kHz
Thermal Shutdown Protection
Unity-Gain Stable
External Gain Configuration Capability
Including Band Exchange SW
Including Leakage Cut SW
Boomer audio power amplifiers were designed
specifically to provide high quality output power with a
minimal number of external components. The
LM4961 does not require bootstrap capacitors, or
snubber circuits therefore it is ideally suited for
portable applications requiring high voltage output to
drive capacitive loads like Ceramic Speakers. The
LM4961 features a low-power consumption shutdown
mode. Additionally, the LM4961 features an internal
thermal shutdown protection mechanism.
APPLICATIONS
•
•
Cellphone
PDA
The LM4961 contains advanced pop & click circuitry
that eliminates noises which would otherwise occur
during turn-on and turn-off transitions.
KEY SPECIFICATIONS
•
•
•
Quiescent Power Supply Current: 7mA (typ)
Voltage Swing in BTL at 1% THD: 15Vp-p (typ)
Shutdown current: 0.1μA (typ)
The LM4961 is unity-gain stable and can be
configured by external gain-setting resistors.
NC
GND
Vout-
NC
Vout+
Vamp
GND
Connection Diagram
28 27 26 25 24 23 22
21
BW2
Bypass
2
20
BW1
Shutdown 2
3
19
Band-SW
VDD
4
18
VIN
NC
5
17
CCHG
Shutdown 1
6
16
NC
GND
7
15
NC
NC
NC
SW
GND
9 10 11 12 13 14
NC
8
FB
1
NC
SW-OUT
Figure 1. LM4961LQ (5x5) (Top View)
See Package Number NJB0028A
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2013, Texas Instruments Incorporated
LM4961, LM4961LQBD
SNAS242K – AUGUST 2004 – REVISED MAY 2013
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Typical Application
VDD
D1
L1
VI = VFB(1 + R2/(R3 + 170))**
10 PH
CS1
4.7 PF
4
12
6
Shutdown 1
19
3
Shutdown 2
2
CBYPASS
GND
68k
FB
R3
13k
Shutdown 1
Band-SW
SW GND
20k
Audio In
0.1 PF
Ci
28
VI
Bypass
VO2
18
1
26
Shutdown 2
GND
17
8
GND
1.0 PF
*Rc
1k
4.7 PF
CO
SW
SW-Out
Band-SW
R2
470 pF
11
VDD
7
CF
CS2
4.7 PF
24
27
15
Cchg
VIN
VO1
23
15
Ceramic
2 PF
Ri
Load
BW1 BW2
20
21
RF1
20k
RF2
200k
82 pF
CF1
* RC is needed for over/under voltage protection. If inputs are less than VDD +0.3V and greater than –0.3V, and if
inputs are disabled when in shutdown mode, then RC can be shorted.
** VFB = 1.23V
Figure 2. Typical Audio Amplifier Application Circuit
Shutdown 1
Shutdown 2
Band-SW
Receiver Mode (BW2)
—
high
low
Ringer Mode (BW1)
high
high
high
Shutdown
low
low
low
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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Absolute Maximum Ratings (1) (2) (3)
Supply Voltage (Vdd)
6.0V
Amplifier Supply Voltage (V1)
9.5V
−65°C to +150°C
Storage Temperature
−0.3V to VDD + 0.3V
Input Voltage
(4)
Internally limited
ESD Susceptibility (5)
2000V
ESD Susceptibility (6)
200V
Junction Temperature
150°C
Power Dissipation
Thermal Resistance
θJA (WQFN)
(1)
(2)
66°C/W
All voltages are measured with respect to the GND pin, unless otherwise specified.
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature,
TA. The maximum allowable power dissipation is PDMAX = (TJMAX − TA) / θJA or the given in Absolute Maximum Ratings, whichever is
lower. For the LM4961 typical application (shown in Figure 2) with VDD = 4.2V, RL = 2μF+30Ω mono BTL operation the maximum power
dissipation is 232mW. θJA = 66°C/W.
Human body model, 100pF discharged through a 1.5kΩ resistor.
Machine Model, 220pF–240pF discharged through all pins.
(3)
(4)
(5)
(6)
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
−40°C ≤ TA ≤ +85°C
Supply Voltage (VDD)
3.0V < VDD < 5.0V
Amplifier Supply Voltage (V1)
2.7V < V1 < 9.0V
Electrical Characteristics VDD = 4.2V
The following specifications apply for VDD = 4.2V, AV-BTL = 26dB, RL = 2µF+30Ω, Cb = 1.0μF, Band-SW = VDD unless
otherwise specified. Limits apply for TA = 25°C.
Symbol
Parameter
Conditions
LM4961
Typical (1)
Limit (2) (3)
Units
(Limits)
IDD
Quiescent Power Supply Current
VIN = 0V, No Load
Band-SW = VDD
7
14
mA (max)
Iddrcv
Iq in receiver mode
VIN = 0V, No Load
Band-SW = GND
2
4
mA (max)
ISD
Shutdown Current
VSHUTDOWN1 = VSHUTDOWN2 = GND
Band-SW = GND (Note 9)
0.1
2.0
µA (max)
VLH
Logic High Threshold Voltage
For Shutdown 1, Shutdown 2, and
Band-SW
1.5
V (min)
VLL
Logic Low Threshold Voltage
For Shutdown 1, Shutdown 2, and
Band-SW
0.4
V (max)
RPULLDOWN
Pulldown Resistor
For Shutdown 2 and Band-SW
50k
Ω (min)
TSD
Thermal Shutdown Temperature
125
°C (min)
15
14
Vp-p (min)
1.0
% (max)
70k
Vout
Output Voltage Swing
THD = 1%, f = 1kHz
RL = 2μF+30Ω Mono BTL
THD+N
Total Harmomic Distortion + Noise
Vout = 14Vp-p, f = 1kHz
0.05
εOS
Output Noise
A-Weighted Filter, VIN = 0V (Note 10)
115
(1)
(2)
(3)
µV
Typicals are measured at 25°C and represent the parametric norm.
Limits are specified to AOQL (Average Outgoing Quality Level).
Datasheet min/max specification limits are specified by design, test, or statistical analysis.
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Electrical Characteristics VDD = 4.2V (continued)
The following specifications apply for VDD = 4.2V, AV-BTL = 26dB, RL = 2µF+30Ω, Cb = 1.0μF, Band-SW = VDD unless
otherwise specified. Limits apply for TA = 25°C.
Symbol
Parameter
Conditions
LM4961
Typical (1)
Units
(Limits)
Limit (2) (3)
PSRR
Power Supply Rejection Ratio
VRIPPLE = 200mVp-p, f = 100Hz
80
65
dB (min)
Ron-sw-out
On Resistance on SW-Out
Band SW “High” Isink = 100µA
(Between pin 1 and pin 28)
170
220
Ω (max)
TWUA
Amplifier Wake-up Time
CB = 1μF
25
35
ms (max)
Electrical Characteristics VDD = 3.2V
The following specifications apply for VDD = 3.2V, AV-BTL = 26dB, RL = 2µF+30Ω, Cb = 1.0μF, Band-SW = VDD unless
otherwise specified. Limits apply for TA = 25°C.
Symbol
Parameter
Conditions
LM4961
Typical (1)
Limit (2) (3)
Units
(Limits)
IDD
Quiescent Power Supply Current
VIN = 0V, No Load
Band-SW = VDD
9
15
mA (max)
Iddrcv
Iq in receiver mode
VIN = 0V, No Load
Band-SW = GND
2
4
mA (max)
ISD
Shutdown Current
VSHUTDOWN1 = VSHUTDOWN2 = GND
Band-SW = GND (Note 9)
0.1
2.0
µA (max)
VLH
Logic High Threshold Voltage
For Shutdown 1, Shutdown 2, and
Band-SW
1.5
V (min)
VLL
Logic Low Threshold Voltage
For Shutdown 1, Shutdown 2, and
Band-SW
0.4
V (max)
RPULLDOWN
Pulldown Resistor
For Shutdown 2 and Band-SW
TSD
Thermal Shutdown Temperature
Vout
Output Voltage Swing
THD = 1%, f = 1kHz
RL = 2μF+30Ω Mono BTL
THD+N
Total Harmomic Distortion + Noise
εOS
PSRR
Ron-sw-out
(1)
(2)
(3)
4
50k
Ω (min)
125
°C (min)
15
14
Vp-p (min)
Vout = 14Vp-p, f = 1kHz
0.1
1.0
% (max)
Output Noise
A-Weighted Filter, VIN = 0V (Note 10)
125
Power Supply Rejection Ratio
VRIPPLE = 200mVp-p, f = 100Hz
80
65
dB (min)
On Resistance on SW-Out
Band SW “High” Isink = 100µA
(Between pin 1 and pin 28)
170
220
Ω (max)
70k
µV
Typicals are measured at 25°C and represent the parametric norm.
Limits are specified to AOQL (Average Outgoing Quality Level).
Datasheet min/max specification limits are specified by design, test, or statistical analysis.
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Typical Performance Characteristics
THD+N vs Frequency
VDD = 4.2V, VO = 14VP-P, RL = 2μF+30Ω
THD+N vs Frequency
VDD = 3.2V, VO = 14VP-P, RL = 2μF+30Ω
10
10
5
2
1
THD+N (%)
THD+N (%)
1
0.5
0.2
0.1
0.1
0.05
0.02
0.01
100
200
500
1k
2k
5k
0.01
100
10k
500
Figure 3.
THD+N vs Output Voltage
VDD = 3.2V, RL = 2μF + 30Ω
10
100 Hz
100 Hz
10 kHz
1
THD+N (%)
THD+N (%)
1
0.1
10 kHz
0.1
1 kHz
1 kHz
0.01
0.01
0
5
10
15
20
25
0
5
OUTPUT VOLTAGE (Vp-p)
10
15
20
25
OUTPUT VOLTAGE (Vp-p)
Figure 5.
Figure 6.
PSRR vs Frequency
VDD = 4.2V, RL = 8Ω, VRIPPLE = 200mVP-P
PSRR vs Frequency
VDD = 3.2V, RL = 8Ω, VRIPPLE = 20mVP-P
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
100
PSRR (dB)
PSRR (dB)
10k
Figure 4.
THD+N vs Output Voltage
VDD = 4.2V, RL = 2μF + 30Ω
10
2k
FREQUENCY (Hz)
FREQUENCY (Hz)
200
500
1k
2k
5k
10k
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
100
FREQUENCY (Hz)
200
500
1k
2k
5k
10k
FREQUENCY (Hz)
Figure 7.
Figure 8.
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Typical Performance Characteristics (continued)
Power Dissipation vs Output Power
VDD = 4.2V, RL = 2μF + 30Ω, f = 1kHz
Power Dissipation vs Output Power
VDD = 3.2V, RL = 2μF + 30Ω, f = 1kHz
300
POWER DISSIPATION (mW)
POWER DISSIPATION (mW)
250
200
150
100
50
250
200
150
100
50
0
0
0
1
2
3
4
5
0
6
1
OUTPUT VOLTAGE (V)
2
3
4
5
6
OUTPUT VOLTAGE (V)
Figure 9.
Figure 10.
Supply Current vs Supply Voltage
RL = 2μF + 30Ω, VIN = 0V, RSOURCE = 50Ω
Frequency Response vs Input Capacitor Size
RL = 8Ω
from top to bottom: Ci = 1.0μF, Ci = 0.39μF, Ci = 0.039μF
20
16
12
OUTPUT LEVEL (dB)
12
SUPPLY CURRENT (mA)
10
8
6
8
4
0
-4
-8
-12
-16
4
-20
2
-28
-24
20
50 100 200 500
1k 2k
5k 10k 20k
0
2
2.5
3
3.5
4
4.5
5
FREQUENCY (Hz)
5.5
SUPPLY VOLTAGE (V)
Figure 11.
Figure 12.
Switch Current Limit vs Duty Cycle
Oscillator Frequency vs Temperature
3000
SW CURRENT LIMIT (mA)
2500
OSCILLATOR FREQUENCY (MHz)
1.58
VIN = 5V
2000
VIN = 3.3V
1500
1000
VIN = 2.7V
500
VIN = 3V
0
20
30
40
50
60
70
80
90
100
1.54
1.52
1.48
1.46
1.44
1.42
1.4
-50
-25
0
25
50
75
100 125 150
TEMPERATURE (oC)
Figure 13.
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VIN = 3.3V
1.5
DUTY CYCLE (%) = [1 - EFF*(VIN / VOUT)]
6
VIN = 5V
1.56
Figure 14.
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Typical Performance Characteristics (continued)
Feedback Bias Current vs Temperature
1.231
0.09
1.23
0.08
FEEDBACK BIAS CURRENT (PA)
FEEDBACK VOLTAGE (V)
Feedback Voltage vs Temperature
1.229
1.228
1.227
1.226
1.225
1.224
1.223
1.222
-40
0
-25
25
50
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
-50
75 100 125
0
-25
Figure 15.
50
75 100 125 150
Figure 16.
Max. Duty Cycle vs Temperature - ”X”
RDS (ON) vs Temperature
93
0.5
92.9
0.45
0.4
92.8
Vin = 3.3V
0.35
92.7
92.6
RDS(ON) (:)
MAX DUTY CYCLE (%)
25
TEMPERATURE (oC)
TEMPERATURE (oC)
VIN = 5V
92.5
92.4
0.3
Vin = 5V
0.25
0.2
0.15
VIN = 3.3V
92.3
0.1
92.2
0.05
0
92.1
-50
-25
0
25
50
-40
75 100 125 150
-25
0
25
50
75 100 125
TEMPERATURE (oC)
TEMPERATURE (oC)
Figure 17.
Figure 18.
RDS (ON) vs VDD
350
300
RDS_ON (m:)
250
200
150
100
50
0
2.5
3.5
4.5
5.5
6.5
7.5
8.5
9.5
VIN (V)
Figure 19.
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APPLICATION INFORMATION
BRIDGE CONFIGURATION EXPLANATION
The Audio Amplifier portion of the LM4961 has two internal amplifiers allowing different amplifier configurations.
The first amplifier’s gain is externally configurable, whereas the second amplifier is internally fixed in a unity-gain,
inverting configuration. The closed-loop gain of the first amplifier is set by selecting the ratio of Rf to Ri while the
second amplifier’s gain is fixed by the two internal 20kΩ resistors. Figure 2 shows that the output of amplifier one
serves as the input to amplifier two. This results in both amplifiers producing signals identical in magnitude, but
out of phase by 180°. Consequently, the differential gain for the Audio Amplifier is
AVD = 2 *(Rf/Ri)
(1)
By driving the load differentially through outputs Vo1 and Vo2, an amplifier configuration commonly referred to as
“bridged mode” is established. Bridged mode operation is different from the classic single-ended amplifier
configuration where one side of the load is connected to ground.
A bridge amplifier design has a few distinct advantages over the single-ended configuration. It provides
differential drive to the load, thus doubling the output swing for a specified supply voltage. Four times the output
power is possible as compared to a single-ended amplifier under the same conditions.
The bridge configuration also creates a second advantage over single-ended amplifiers. Since the differential
outputs, Vo1 and Vo2, are biased at half-supply, no net DC voltage exists across the load. This eliminates the
need for an output coupling capacitor which is required in a single supply, single-ended amplifier configuration.
Without an output coupling capacitor, the half-supply bias across the load would result in both increased internal
IC power dissipation and also possible loudspeaker damage.
BOOST CONVERTER POWER DISSIPATION
At higher duty cycles, the increased ON-time of the switch FET means the maximum output current will be
determined by power dissipation within the LM4961 FET switch. The switch power dissipation from ON-time
conduction is calculated by Equation 3.
PD(SWITCH) = DC x IIND(AVE)2 x RDS(ON)
(2)
where DC is the duty cycle.
There will be some switching losses as well, so some derating needs to be applied when calculating IC power
dissipation.
MAXIMUM AMPLIFIER POWER DISSIPATION
Power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or
single-ended. A direct consequence of the increased power delivered to the load by a bridge amplifier is an
increase in internal power dissipation. Since the amplifier portion of the LM4961 has two operational amplifiers,
the maximum internal power dissipation is 4 times that of a single-ended amplifier. The maximum power
dissipation for a given BTL application can be derived from Equation 2.
PDMAX(AMP) = (2VDD2) / (π2RL)
(3)
where
RL = Ro1 + Ro2
(4)
MAXIMUM TOTAL POWER DISSIPATION
The total power dissipation for the LM4961 can be calculated by adding Equation 2 and Equation 3 together to
establish Equation 5:
PDMAX(TOTAL) = (2VDD2) / (π2EFF2RL)
(5)
where
EFF = Efficiency of boost converter
RL = Ro1 + Ro2
The result from Equation 5 must not be greater than the power dissipation that results from Equation 6:
PDMAX = (TJMAX - TA) / θJA
8
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For the NJB0028A, θJA = 66°C/W. TJMAX = 125°C for the LM4961. Depending on the ambient temperature, TA, of
the system surroundings, Equation 6 can be used to find the maximum internal power dissipation supported by
the IC packaging. If the result of Equation 5 is greater than that of Equation 6, then either the supply voltage
must be increased, the load impedance increased or TA reduced. For the typical application of a 4.2V power
supply, with a 2uF+30Ω load, the maximum ambient temperature possible without violating the maximum
junction temperature is approximately 109°C provided that device operation is around the maximum power
dissipation point. Thus, for typical applications, power dissipation is not an issue. Power dissipation is a function
of output power and thus, if typical operation is not around the maximum power dissipation point, the ambient
temperature may be increased accordingly. Refer to the Typical Performance Characteristics curves for power
dissipation information for lower output levels.
EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS
The LM4961’s exposed-DAP (die attach paddle) package (NJB) provides a low thermal resistance between the
die and the PCB to which the part is mounted and soldered. The low thermal resistance allows rapid heat
transfer from the die to the surrounding PCB copper traces, ground plane, and surrounding air. The NJB package
should have its DAP soldered to a copper pad on the PCB. The DAP’s PCB copper pad may be connected to a
large plane of continuous unbroken copper. This plane forms a thermal mass, heat sink, and radiation area.
Further detailed and specific information concerning PCB layout, fabrication, and mounting an NJB (WQFN)
package is found in Texas Instruments Package Engineering Group under application note AN-1187 (Literature
Number SNOA401).
SHUTDOWN FUNCTION
In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry to
provide a quick, smooth transition into shutdown. Another solution is to use a single-pole, single-throw switch
connected between VDD and Shutdown pins.
BAND SWITCH FUNCTION
The LM4961 features a Band Switch function which allows the user to use one amplifier for both receiver
(earpiece) mode and ringer/loudspeaker mode. When a logic high (VDD) is applied to the Band-SW pin (pin 19)
the amplifier is in ringer mode. This enables the boost converter and sets the externally configurable closed loop
gain selection to BW1. If the Band-SW pin has a logic low (GND) applied to its terminal then the device is in
receiver mode. In this mode the boost converter is disabled and the gain selection is switched to BW2. This
allows the amplifier to be powered directly from the battery minus the voltage drop across the Schottky diode.
REDUCING TRANSIENT CURRENT SPIKE
Due to the quick turn-on time of the Boost Converter, a transient supply current spike is observed on shutdown
release. To reduce the rise time of the output voltage (V1), thus reducing the value of the supply current spike,
please refer to application circuit in Figure 20. Using this configuration will allow the user to reduce the transient
supply current spike without the Boost Converter experiencing any stability issues.
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VDD
D1
L1
VI = VFB(1 + R2/(R3 + 170))
10 PH
CO1
4.7 PF
4
12
6
Shutdown 1
R2
470 pF
11
8
GND
C3-1
0.01 PF
RC2-1
4.7
RC3-1
20k
C2-1
4.7 PF
68k
SW
VDD
7
CF
C2
1 PF
FB
R3
13k
GND
Shutdown 1
1
SW-Out
19
Band-SW
3
Shutdown 2
2
CBYPASS
Band-SW
SW GND
Shutdown 2
Vamp
Bypass
GND
1.0 PF
Rc
1k
20k
Audio
In
0.1 PF
Ci
VO2
17
18
28
26
CS2
1.0 PF
24
27
15
Cchg
VIN
VO1
23
15
Ceramic
2 PF
Ri
Load
BW1 BW2
20
21
RF1
RF2
20k
42k
2000 pF
CF1
6800 pF
CF2
RF3
200k
82 pF
CF3
Figure 20. Transient Current Spike Reduction Configuration
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using integrated power amplifiers, and switching DC-DC
converters, is critical for optimizing device and system performance. Consideration to component values must be
used to maximize overall system quality.
The best capacitors for use with the switching converter portion of the LM4961 are multi-layer ceramic
capacitors. They have the lowest ESR (equivalent series resistance) and highest resonance frequency, which
makes them optimum for high frequency switching converters.
When selecting a ceramic capacitor, only X5R and X7R dielectric types should be used. Other types such as
Z5U and Y5F have such severe loss of capacitance due to effects of temperature variation and applied voltage,
they may provide as little as 20% of rated capacitance in many typical applications. Always consult capacitor
manufacturer’s data curves before selecting a capacitor. High-quality ceramic capacitors can be obtained from
Taiyo-Yuden.
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection. The capacitor location on both V1 and VDD pins should be as close to the device as possible.
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SELECTING INPUT CAPACITOR FOR AUDIO AMPLIFIER
One of the major considerations is the closed loop bandwidth of the amplifier. To a large extent, the bandwidth is
dictated by the choice of external components shown in Figure 2. The input coupling capacitor, Ci, forms a first
order high pass filter which limits low frequency response. This value should be chosen based on needed
frequency response for a few distinct reasons.
High value input capacitors are both expensive and space hungry in portable designs. Clearly, a certain value
capacitor is needed to couple in low frequencies without severe attenuation. But ceramic speakers used in
portable systems, whether internal or external, have little ability to reproduce signals below 100Hz to 150Hz.
Thus, using a high value input capacitor may not increase actual system performance.
In addition to system cost and size, click and pop performance is affected by the value of the input coupling
capacitor, Ci. A high value input coupling capacitor requires more charge to reach its quiescent DC voltage
(nominally 1/2 VDD). This charge comes from the output via the feedback and is apt to create pops upon device
enable. Thus, by minimizing the capacitor value based on desired low frequency response, turn-on pops can be
minimized.
SELECTING BYPASS CAPACITOR FOR AUDIO AMPLIFIER
Besides minimizing the input capacitor value, careful consideration should be paid to the bypass capacitor value.
Bypass capacitor, CB, is the most critical component to minimize turn-on pops since it determines how fast the
amplifier turns on. The slower the amplifier’s outputs ramp to their quiescent DC voltage (nominally 1/2 VDD), the
smaller the turn-on pop. Choosing CB equal to 1.0µF along with a small value of Ci (in the range of 0.039µF to
0.39µF), should produce a virtually clickless and popless shutdown function. Although the device will function
properly, (no oscillations or motorboating), with CB equal to 0.1µF, the device will be much more susceptible to
turn-on clicks and pops. Thus, a value of CB equal to 1.0µF is recommended in all but the most cost sensitive
designs.
SELECTING FEEDBACK CAPACITOR FOR AUDIO AMPLIFIER
The LM4961 is unity-gain stable which gives the designer maximum system flexibility. However, to drive ceramic
speakers, a typical application requires a closed-loop differential gain of 10. In this case a feedback capacitor
(Cf2) will be needed as shown in Figure 1 to bandwidth limit the amplifier.
This feedback capacitor creates a low pass filter that eliminates possible high frequency noise. Care should be
taken when calculating the -3dB frequency because an incorrect combination of Rf and Cf2 will cause rolloff
before the desired frequency
SELECTING VALUE FOR RC
The audio power amplifier integrated in the LM4961 is designed for very fast turn on time. The Cchg pin allows
the input capacitors (CinA and CinB) to charge quickly to improve click/pop performance. Rchg1 and Rchg2
protect the Cchg pins from any over/under voltage conditions caused by excessive input signal or an active input
signal when the device is in shutdown. The recommended value for Rchg1 and Rchg2 is 1kΩ. If the input signal
is less than VDD+0.3V and greater than -0.3V, and if the input signal is disabled when in shutdown mode, Rchg1
and Rchg2 may be shorted out.
SELECTING OUTPUT CAPACITOR (CO) FOR BOOST CONVERTER
A single 4.7µF to 10µF ceramic capacitor will provide sufficient output capacitance for most applications. If larger
amounts of capacitance are desired for improved line support and transient response, tantalum capacitors can
be used. Aluminum electrolytics with ultra low ESR such as Sanyo Oscon can be used, but are usually
prohibitively expensive. Typical AI electrolytic capacitors are not suitable for switching frequencies above 500
kHz because of significant ringing and temperature rise due to self-heating from ripple current. An output
capacitor with excessive ESR can also reduce phase margin and cause instability.
In general, if electrolytics are used, we recommended that they be paralleled with ceramic capacitors to reduce
ringing, switching losses, and output voltage ripple.
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SELECTING INPUT CAPACITOR (Cs1) FOR BOOST CONVERTER
An input capacitor is required to serve as an energy reservoir for the current which must flow into the coil each
time the switch turns ON. This capacitor must have extremely low ESR, so ceramic is the best choice. We
recommend a nominal value of 4.7µF, but larger values can be used. Since this capacitor reduces the amount of
voltage ripple seen at the input pin, it also reduces the amount of EMI passed back along that line to other
circuitry.
SETTING THE OUTPUT VOLTAGE (V1) OF BOOST CONVERTER
The output voltage is set using the external resistors R2 and R3 (see Figure 2). A value of approximately 13.3kΩ
is recommended for R3 to establish a divider current of approximately 92µA. R2 is calculated using the formula:
V1 = VFB [1 + R2(R3 + 170)]
(7)
FEED-FORWARD COMPENSATION FOR BOOST CONVERTER
Although the LM4961's internal Boost converter is internally compensated, the external feed-forward capacitor Cf
is required for stability (see Figure 2). Adding this capacitor puts a zero in the loop response of the converter.
The recommended frequency for the zero fz should be approximately 6kHz. Cf1 can be calculated using the
formula:
Cf1 = 1 / (2π x R1 x fz)
(8)
SELECTING DIODES
The external diode used in Figure 2 should be a Schottky diode. A 20V diode such as the MBR0520 from
Fairchild Semiconductor is recommended.
The MBR05XX series of diodes are designed to handle a maximum average current of 0.5A. For applications
exceeding 0.5A average but less than 1A, a Microsemi UPS5817 can be used.
DUTY CYCLE
The maximum duty cycle of the boost converter determines the maximum boost ratio of output-to-input voltage
that the converter can attain in continuous mode of operation. The duty cycle for a given boost application is
defined as:
Duty Cycle = VOUT + VDIODE - VIN/ VOUT + VDIODE - VSW
This applies for continuous mode operation.
INDUCTANCE VALUE
The first question we are usually asked is: “How small can I make the inductor.” (because they are the largest
sized component and usually the most costly). The answer is not simple and involves trade-offs in performance.
Larger inductors mean less inductor ripple current, which typically means less output voltage ripple (for a given
size of output capacitor). Larger inductors also mean more load power can be delivered because the energy
stored during each switching cycle is:
E = L/2 x (lp)2
(9)
Where “lp” is the peak inductor current. An important point to observe is that the LM4961 will limit its switch
current based on peak current. This means that since lp(max) is fixed, increasing L will increase the maximum
amount of power available to the load. Conversely, using too little inductance may limit the amount of load
current which can be drawn from the output.
Best performance is usually obtained when the converter is operated in “continuous” mode at the load current
range of interest, typically giving better load regulation and less output ripple. Continuous operation is defined as
not allowing the inductor current to drop to zero during the cycle. It should be noted that all boost converters shift
over to discontinuous operation as the output load is reduced far enough, but a larger inductor stays “continuous”
over a wider load current range.
To better understand these trade-offs, a typical application circuit (5V to 12V boost with a 10µH inductor) will be
analyzed. We will assume:
VIN = 5V, VOUT = 12V, VDIODE = 0.5V, VSW = 0.5V
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Since the frequency is 1.6MHz (nominal), the period is approximately 0.625µs. The duty cycle will be 62.5%,
which means the ON-time of the switch is 0.390µs. It should be noted that when the switch is ON, the voltage
across the inductor is approximately 4.5V. Using Equation 11:
V = L (di/dt)
(11)
We can then calculate the di/dt rate of the inductor which is found to be 0.45 A/µs during the ON-time. Using
these facts, we can then show what the inductor current will look like during operation:
Figure 21. 10μH Inductor Current
5V - 12V Boost (LM4961X)
During the 0.390µs ON-time, the inductor current ramps up 0.176A and ramps down an equal amount during the
OFF-time. This is defined as the inductor “ripple current”. It can also be seen that if the load current drops to
about 33mA, the inductor current will begin touching the zero axis which means it will be in discontinuous mode.
A similar analysis can be performed on any boost converter, to make sure the ripple current is reasonable and
continuous operation will be maintained at the typical load current values. Taiyo-Yudens NR4012 inductor series
is recommended.
MAXIMUM SWITCH CURRENT
The maximum FET switch current available before the current limiter cuts in is dependent on duty cycle of the
application. This is illustrated in a graph in the typical performance characterization section which shows typical
values of switch current as a function of effective (actual) duty cycle.
CALCULATING OUTPUT CURRENT OF BOOST CONVERTER (IAMP)
As shown in Figure 2 which depicts inductor current, the load current is related to the average inductor current by
the relation:
ILOAD = IIND(AVG) x (1 - DC)
(12)
Where "DC" is the duty cycle of the application. The switch current can be found by:
ISW = IIND(AVG) + 1/2 (IRIPPLE)
(13)
Inductor ripple current is dependent on inductance, duty cycle, input voltage and frequency:
IRIPPLE = DC x (VIN-VSW) / (f x L)
(14)
combining all terms, we can develop an expression which allows the maximum available load current to be
calculated:
ILOAD(max) = (1–DC)x(ISW(max)–DC(VIN-VSW))/2FL
(15)
The equation shown to calculate maximum load current takes into account the losses in the inductor or turn-OFF
switching losses of the FET and diode.
DESIGN PARAMETERS VSW AND ISW
The value of the FET "ON" voltage (referred to as VSW in Equation 12 thru Equation 15) is dependent on load
current. A good approximation can be obtained by multiplying the "ON Resistance" of the FET times the average
inductor current.
FET on resistance increases at VIN values below 5V, since the internal N-FET has less gate voltage in this input
voltage range (see Typical Performance Characteristics curves). Above VIN = 5V, the FET gate voltage is
internally clamped to 5V.
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The maximum peak switch current the device can deliver is dependent on duty cycle. For higher duty cycles, see
Typical Performance Characteristics curves.
INDUCTOR SUPPLIERS
The recommended inductors for the LM4961 is the Taiyo-Yuden NR4012. When selecting an inductor, make
certain that the continuous current rating is high enough to avoid saturation at peak currents. A suitable core type
must be used to minimize core (switching) losses, and wire power losses must be considered when selecting the
current rating.
PCB LAYOUT GUIDELINES
High frequency boost converters require very careful layout of components in order to get stable operation and
low noise. All components must be as close as possible to the LM4961 device. It is recommended that a 4-layer
PCB be used so that internal ground planes are available. See Figures 22-25 for demo board reference
schematic and layout.
Some additional guidelines to be observed:
1. Keep the path between L1, D1, and Co extremely short. Parasitic trace inductance in series with D1 and Co
will increase noise and ringing.
2. The feedback components R1, R2 and Cf 1 must be kept close to the FB pin of U1 to prevent noise injection
on the FB pin trace.
3. If internal ground planes are available (recommended) use vias to connect directly to ground at pin 2 of U1, as
well as the negative sides of capacitors Cs1 and Co.
GENERAL MIXED-SIGNAL LAYOUT RECOMMENDATION
This section provides practical guidelines for mixed signal PCB layout that involves various digital/analog power
and ground traces. Designers should note that these are only "rule-of-thumb" recommendations and the actual
results will depend heavily on the final layout.
Power and Ground Circuits
For 2 layer mixed signal design, it is important to isolate the digital power and ground trace paths from the
analog power and ground trace paths. Star trace routing techniques (bringing individual traces back to a central
point rather than daisy chaining traces together in a serial manner) can have a major impact on low level signal
performance. Star trace routing refers to using individual traces to feed power and ground to each circuit or even
device. This technique will take require a greater amount of design time but will not increase the final price of the
board. The only extra parts required may be some jumpers.
Single-Point Power / Ground Connection
The analog power traces should be connected to the digital traces through a single point (link). A "Pi-filter" can
be helpful in minimizing high frequency noise coupling between the analog and digital sections. It is further
recommended to place digital and analog power traces over the corresponding digital and analog ground traces
to minimize noise coupling.
Placement of Digital and Analog Components
All digital components and high-speed digital signals traces should be located as far away as possible from
analog components and circuit traces.
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces parallel to each other (side-by-side) on the same PCB
layer. When traces must cross over each other do it at 90 degrees. Running digital and analog traces at 90
degrees to each other from the top to the bottom side as much as possible will minimize capacitive noise
coupling and crosstalk.
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Schematic Board Layout
VDD
D2
L1
VI = VFB(1 + R2/(R3 + 170))
10 PH
CS1
4.7 PF
4
7
12
RPU1
6
VDD
R2
470 pF
11
4.7 PF
C2
68k
SW
VDD
VDD
C3
8
GND
FB
R3
13k
GND
Shutdown 1
J3
RPU3
19
VDD
1
Band-SW
SW-Out
J6
SW GND
RPU2
3
J5
2
Cb
Shutdown 2
Vamp
Bypass
GND
1.0 PF
Rc
1k
20k
Audio In
0.1 PF
CINA
VO2
17
18
28
26
CS2
4.7 PF
24
27
15
Cchg
VIN
VO1
23
15
Ceramic
2 PF
RINA
Load
BW1 BW2
20
21
RF2
RFA
20k
42k
2000 pF
CF2
6800 pF
CFA
RFB
200k
82 pF
CFB
Figure 22. Demo Board Schematic
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Demonstration Board Layout
Figure 23. Recommended TS SE PCB Layout: Top Silkscreen
Figure 24. Recommended TS SE PCB Layout: Top Layer
16
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Figure 25. Recommended TS SE PCB Layout: Bottom Layer
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REVISION HISTORY
Rev
Date
Description
1.0
08/25/04
Initial WEB.
1.1
11/14/05
Replaced graphics 83, C4, and C5 with 01, 02, and 03), then WEB.
1.2
08/30/06
Added the TWUA row in the 4.2V Elect. Char table, then released the D/S to the WEB.
1.3
09/11/06
Added the “Selecting Value For Rc” in the Apps section, then released to the WEB.
Changes from Revision J (May 2013) to Revision K
•
18
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 17
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PACKAGE OPTION ADDENDUM
www.ti.com
3-May-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LM4961LQ/NOPB
ACTIVE
WQFN
NJB
28
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
L4961LQ
LM4961LQX/NOPB
ACTIVE
WQFN
NJB
28
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
L4961LQ
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
8-May-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM4961LQ/NOPB
WQFN
NJB
28
1000
178.0
12.4
5.3
5.3
1.3
8.0
12.0
Q1
LM4961LQX/NOPB
WQFN
NJB
28
4500
330.0
12.4
5.3
5.3
1.3
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-May-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM4961LQ/NOPB
WQFN
NJB
28
1000
203.0
190.0
41.0
LM4961LQX/NOPB
WQFN
NJB
28
4500
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
NJB0028A
LQA28A (REV B)
www.ti.com
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