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LM5010EVAL

LM5010EVAL

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    -

  • 描述:

    BOARDEVALUATIONLM5010

  • 数据手册
  • 价格&库存
LM5010EVAL 数据手册
User's Guide SNVA101A – December 2004 – Revised April 2013 AN-1352 LM5010 Evaluation Board 1 Introduction The LM5010EVAL evaluation board provides the design engineer with a fully functional buck regulator, employing the constant on-time (COT) operating principle. This evaluation board provides a 10V output from an input range of 12V - 75V. The circuit provides load currents > 1A, with the current limit set at ≊1.3A. The board’s specification are: • Input Voltage: 12V to 75V • Output Voltage: 10V, ±3% • Maximum Continuous Output current: 1.0A • Current Limit: 1.3A • Measured Efficiency: 93% (VIN = 12V, IOUT = 500 mA) • Switching Frequency: ≊480 kHz • Size: 1.1 in. x 1.875 in. x 0.47 in LM5010 EVALUATION BD NATIONAL SEMICONDUCTOR 55101 2308-001 REV B D1 C2002 OUT2 J3 IN J1 OUT1 C6 GND R2 C3 R3 C5 L1 C4 GND U1 R5 R4 C7 R1 C1 C2 Figure 1. Evaluation Board - Top Side All trademarks are the property of their respective owners. SNVA101A – December 2004 – Revised April 2013 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated AN-1352 LM5010 Evaluation Board 1 Theory of Operation 2 www.ti.com Theory of Operation Refer to the board’s schematic in Figure 4, which contains a simplified block diagram of the LM5010. When the circuit is in regulation, the buck switch is on each cycle for a time determined by R1 and VIN according to the equation: 1.18 x 10-10 x (R1 + 1.4k) tON = + 67 ns VIN - 1.4V (1) The on-time in this evaluation board will range from ≊1750 ns at VIN = 12V, to ≊310 ns at VIN = 75V. At the end of the on-time, the feedback voltage at FB is above 2.5V, and the Minimum Off-Timer ensures the buck switch is off for at least 265 ns. In normal operation, the off-time is longer. During the off-time, the output capacitor (C7) discharges, and when the output voltage falls so that the voltage at FB is below 2.5V, the comparator output switches to initiate a new on-time. As required by the datasheet, this circuit provides a minimum of 25mVp-p ripple at the FB pin. Refer to the LM5010 data sheet for a more detailed block diagram, and a complete description of the various functional blocks. 3 Board Layout and Probing The pictorial in Figure 1 shows the placement of the circuit components. The following should be kept in mind when the board is powered: 1) When operating at high input voltage and/or high load current, forced air flow IS NECESSARY. 2) The LM5010, and the diode D1 will be hot to the touch when operating at high input voltage and/or high load current. 3) Use CAUTION when probing the circuit at high input voltages. 75 volts is enough to produce shocks and sparks. 4) At maximum load current (1A), the wire size and length used to connect the load becomes important. Ensure there is not a significant drop in the wires. 4 Board Connection/Start-up The input connections are made to the J1 connector. The load is normally connected to the OUT1 and GND terminals of the J3 connector. Ensure the wires are adequately sized for the intended load current. Before start-up a voltmeter should be connected to the input terminals, and to the output terminals. The load current should be monitored with an ammeter or a current probe. It is recommended that the input voltage be increased gradually to 8V, at which time the output voltage will be approximately 7V. If that indicates correctly, then increase the input voltage to the minimum operating value of 12V, and proceed with evaluating the circuit. 5 Low Ripple Output The ripple voltage at OUT1 will range from ≊ 120 mVp-p (at VIN = 12V) to ≊ 650 mVp-p (at VIN = 75V). If a low ripple output is desired, connect the load to OUT2. The ripple at this output varies from ≊ 10mVp-p to ≊ 60 mVp-p over the input voltage range. However, the load regulation is not as good at OUT2 as it is at OUT1 due to the presence of R4. 6 Increased Current Limit The evaluation board current limit activates at a load current of ≊1.3A. If it is desired to increase the current limit for a particular application, R5 must be added to the board. Refer to the data sheet to determine the appropriate value for this resistor. 2 AN-1352 LM5010 Evaluation Board SNVA101A – December 2004 – Revised April 2013 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Increased Current Limit www.ti.com 100 VIN = 12V EFFICIENCY (%) 90 _ VIN = 48V 80 _ VIN = 75V 70 _ 60 0 200 400 600 800 1000 LOAD CURRENT (mA) Figure 2. Efficiency vs Load Current 100 EFFICIENCY (%) 90 _ 80 _ 70 Load Current = 500 mA _ 60 0 _ 20 _ 40 _ 60 _ 80 VIN (V) Figure 3. Efficiency vs VIN SNVA101A – December 2004 – Revised April 2013 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated AN-1352 LM5010 Evaluation Board 3 Increased Current Limit www.ti.com 12 - 75V Input VIN C1 2.2 PF C2 2.2 PF R1 150k VCC LM5010 13 12 C3 0.1PF Minimum Off Timer On Timer BST 3 C6 RON/SD 11 C5 0.022 PF 0.022 PF L1 47 PH SW 2 Logic SS 10 C4 0.1 PF 10V R2 3.0k 4 FB 9 VOUT1 D1 ISEN 2.5V R5 R4 1.5 VOUT2 SGND R3 1.0k 5 6 RTN C7 22 PF GND Figure 4. Board Schematic Table 1. Bill of Materials 4 Item Description Mfg. Part Number Package Value C1, 2 Ceramic Capacitor TDK C4532X7R2A225M 1812 2.2 µF, 100V C3 Ceramic Capacitor TDK C2012X7R2A104M 0805 0.1 µF, 100V C4 Ceramic Capacitor TDK C2012X7R1C104M 0805 0.1 µF, 16V C5, 6 Ceramic Capacitor TDK C2012X7R1C223M 0805 0.022 µF, 16V C7 Ceramic Capacitor TDK C4532X7R1E226M 1812 22 µF, 25V D1 Ultra Fast Diode Central Semi CUD6-02C DPAK 200V, 6A, 35 ns L1 Power Inductor TDK SLF12575T-470M2R7 12.5 mm x 12.5 mm 47 µH, 3A R1 Resistor CRCW08051503F 0805 150 kΩ R2 Resistor CRCW08053001F 0805 3.00 kΩ R3 Resistor CRCW08051001F 0805 1.00 kΩ R4 Resistor CRCW08051R50F 0805 1.5Ω R5 Resistor See data sheet 0805 U1 Switching Regulator Texas Instruments LM5010 HTSSOP - 14 AN-1352 LM5010 Evaluation Board SNVA101A – December 2004 – Revised April 2013 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated PCB Layout www.ti.com 7 PCB Layout SNVA101A – December 2004 – Revised April 2013 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated AN-1352 LM5010 Evaluation Board 5 PCB Layout 6 AN-1352 LM5010 Evaluation Board www.ti.com SNVA101A – December 2004 – Revised April 2013 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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