LM5023MMX-2/NOPB

Product Folder Sample & Buy Support & Community Tools & Software Technical Documents Reference Design LM5023 SNVS961E – APRIL 2013 – REVISED JANUARY 2016 LM5023 AC-DC Quasi-Resonant Current Mode PWM Controller 1 Features 3 Description • • • • • The LM5023 is a quasi-resonant pulse width modulated (PWM) controller which contains all of the features needed to implement a highly efficient offline power supply. The LM5023 uses the transformer auxiliary winding for demagnetization detection to ensure critical conduction mode (CrCM) operation. The LM5023 features a hiccup mode for overcurrent protection with an auto restart to reduce the stress on the power components during an overload. A skipcycle mode reduces power consumption at light loads for energy conservation applications (ENERGY STAR®, CEPCP, and so forth). The LM5023 also uses the transformer auxiliary winding for output overvoltage protection (OVP); if an OVP fault is detected the LM5023 latches off the controller. 1 • • • • • • • • • • Critical Conduction Mode Peak-Current Mode Control Skip-Cycle Mode for Low-Standby Power Hiccup Mode for Continuous Overload Protection Cycle-by-Cycle Overcurrent Protection Maintains Accuracy Over the Universal AC Line Line-Voltage Feedforward OVP Protection by Sensing the Auxiliary Winding Integrated 0.7-A Peak Gate Driver Direct Opto-Coupler Interface Leading Edge Blanking of Current Sense Signal Maximum Frequency Clamp 130 kHz Programmable Soft-Start Thermal Shutdown 8-Pin VSSOP Package Create a Custom Design using the LM5023 with the WEBENCH Power Designer Device Information(1) PART NUMBER LM5023 PACKAGE VSSOP (8) BODY SIZE (NOM) 3.00 mm × 3.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 2 Applications • • • • Universal Input AC-to-DC Notebook Adapters from 10 W to 65 W High-Efficiency Housekeeping and Auxiliary Power Supplies Battery Chargers Consumer Electronics (DVD Players, Set-Top Boxes, DTV, Gaming, Printers) Simplified Schematic VOUT 19 V VAC High Voltage Start-Up Depletion Mode FET 1 QR 8 OUT 7 VCC CS LM5023 2 VSD 3 SS 5 Output Voltage Regulation COMP 4 GND 6 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM5023 SNVS961E – APRIL 2013 – REVISED JANUARY 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 5 5 7 Absolute Maximum Ratings ...................................... ESD Ratings ............................................................ Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description .............................................. 8 7.1 Overview ................................................................... 8 7.2 Functional Block Diagram ......................................... 9 7.3 Feature Description................................................. 10 7.4 Device Functional Modes........................................ 18 8 Application and Implementation ........................ 19 8.1 Application Information............................................ 19 8.2 Typical Application .................................................. 19 9 Power Supply Recommendations...................... 29 10 Layout................................................................... 29 10.1 Layout Guidelines ................................................. 29 10.2 Layout Example .................................................... 30 11 Device and Documentation Support ................. 31 11.1 11.2 11.3 11.4 11.5 11.6 Custom Design with WEBENCH Tools................. Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 31 31 31 31 31 31 12 Mechanical, Packaging, and Orderable Information ........................................................... 31 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision D (January 2014) to Revision E • Page Added Pin Configuration and Functions section, ESD Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1 Changes from Revision C (August, 2013) to Revision D Page • Added LM5023 Pin Configuration........................................................................................................................................... 3 • Changed FUNCTIONAL BLOCK DIAGRAM. ......................................................................................................................... 9 • Added VCC < VCC(on) the current consumption................................................................................................................. 11 • Changed IQR equation from ROFFSET to R1.......................................................................................................................... 24 • Changed Current Feed Forward resistor value from 1 kΩ to 6.6 kΩ. .................................................................................. 25 2 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated Product Folder Links: LM5023 LM5023 www.ti.com SNVS961E – APRIL 2013 – REVISED JANUARY 2016 5 Pin Configuration and Functions DGK Package 8-Pin VSSOP Top View QR 1 8 VCC VSD 2 7 OUT SS 3 6 GND COMP 4 5 CS Pin Functions PIN TYPE DESCRIPTION 4 I Control input for the pulse width modulator and skip cycle comparators. COMP pullup is provided by an internal 42-kΩ resistor which may be used to bias an opto-coupler transistor. CS 5 I Current sense input for current-mode control and over-current protection. Current limiting is accomplished using a dedicated current sense comparator. If the CS comparator input exceeds 0.5 V, the OUT pin switches low for cycle-by-cycle current limit. CS is held low for 130 ns after OUT switches high to blank the leading edge current spike. GND 6 G Ground connection return for internal circuits. OUT 7 O High current output to the external MOSFET gate input with source/sink current capability of 0.3 A and 0.7 A respectively. QR 1 I The auxiliary flyback winding of the power transformer is monitored to detect the quasi-resonant operation. The peak-auxiliary voltage is sensed to detect an output overvoltage (OVP) fault and shuts down the controller. SS 3 O An external capacitor and an internal 22-µA current source sets the soft-start ramp. VSD 2 O Connect this pin to the gate of the external start-up circuit FET; it disables the start-up FET after VCC is valid. VCC 8 P VCC provides bias to controller and gate drive sections of the LM5023. An external capacitor must be connected from this pin to ground. NAME NO. COMP Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated Product Folder Links: LM5023 3 LM5023 SNVS961E – APRIL 2013 – REVISED JANUARY 2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) MIN MAX UNIT 4 mA IQR Negative injection current when the QR pin is being driven below ground VSD Maximum voltage IVSD VSD clamp continuous current VIN Voltage range OUT Gate-drive voltage at DRV IOUT Peak OUT current, source IOUT Peak OUT current sink VCC Bias supply voltage –0.3 16 V TJ Operating junction temperature –40 125 ºC Tstg Storage temperature –55 150 °C (1) (2) –0.3 45 V 500 µA 7 V SS, COMP, QR –0.3 CS –0.3 1.25 V –0.3 Self-limiting V 0.3 A 0.7 A Stresses beyond those listed under may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 6.2 ESD Ratings Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 V(ESD) (1) (2) Electrostatic discharge (1) Charged-device model (CDM), per JEDEC specification JESD22C101 (2) VALUE UNIT ±2000 V ±1000 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions MIN MAX VCC Bias supply voltage 8 14 V IVSD VSD Current 2 100 µA IQR QR pin current 1 4 mA TJ Junction temperature –40 125 ºC 4 Submit Documentation Feedback UNIT Copyright © 2013–2016, Texas Instruments Incorporated Product Folder Links: LM5023 LM5023 www.ti.com SNVS961E – APRIL 2013 – REVISED JANUARY 2016 6.4 Thermal Information LM5023 THERMAL METRIC (1) DGK (VSSOP) UNIT 8 PINS RθJA Junction-to-ambient thermal resistance 168.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 59.6 °C/W RθJB Junction-to-board thermal resistance 88.8 °C/W ψJT Junction-to-top characterization parameter 7.1 °C/W ψJB Junction-to-board characterization parameter 87.5 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 6.5 Electrical Characteristics Minimum and maximum apply over the junction temperature range of –40 to +125°C. Minimum and maximum limits are specified through test, design, or statistical correlation. Typical values represent the most likely parametric norm at +25°C, and are provided for reference purposes only. Unless otherwise specified, the following conditions apply: VCC = 10 V, FSW = 100 kHz 50% duty cycle, no load on OUT. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT BIAS SUPPLY INPUT VCCON Controller enable threshold 12 12.8 13.5 V VCCOFF Minimum operating voltage 7 7.5 8 V VRST Internal logic reset (fault latch) VCC falling < VRST 4.5 5 5.5 V ICCST ICC current while in standby mode COMP = 0.5 V, CS = 0 V, no switching 340 420 µA ICCOP Operating supply current COMP = 2.25 V, OUT switching 800 µA 0.1 µA SHUTDOWN CONTROL (VSD PIN) IVSD OFF Off state leakage current VVSD ON1 ON state pulldown voltage at 10 µA After VCCON (IVSD = 10 µA) 0.65 V VVSD_ON2 ON state pulldown voltage at 100 µA After VCCON (IVSD = 100 µA) 0.84 V SKIP CYCLE MODE COMPARATOR VSKIP Skip cycle mode enable threshold VSK-HYS Skip cycle mode hysteresis COMP falling 70 120 170 12 mV mV QR DETECT VOVP Overvoltage comparator threshold 2.85 3 3.17 V TOVP Sample delay for OVP 870 1050 1270 ns VDEM VDEM demagnetization threshold FMAX Maximum frequency 114 130 148 kHz TRST TRESTART 9.4 12 15.7 µs 0.35 V PWM COMPARATORS TPPWM COMP to OUT propagation delay COMP set to 2 V, CS stepped 0 to 0.4 V, time to OUT transition low, CLOAD = 0 DMIN Minimum duty cycle COMP = 0 V GCOMP COMP to PWM comparator gain VCOMP-O COMP open circuit voltage VCOMP-H COMP at maximum VCS ICOMP COMP short circuit current RCOMP R pullup 20 ns 0% 0.33 ICOMP = 20 µA 4.3 COMP = 0 V 41 4.9 5.8 V 2.25 V –132 µA 45 49 kΩ Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated Product Folder Links: LM5023 5 LM5023 SNVS961E – APRIL 2013 – REVISED JANUARY 2016 www.ti.com Electrical Characteristics (continued) Minimum and maximum apply over the junction temperature range of –40 to +125°C. Minimum and maximum limits are specified through test, design, or statistical correlation. Typical values represent the most likely parametric norm at +25°C, and are provided for reference purposes only. Unless otherwise specified, the following conditions apply: VCC = 10 V, FSW = 100 kHz 50% duty cycle, no load on OUT. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 450 500 550 mV CURRENT LIMIT VCS Cycle-by-cycle sense voltage limit threshold TLEB Leading edge blanking time TPCS Current limit to OUT delay RLEB CS blanking sinking impedance GCM Current mirror gain IQR = 2 mA 100 A/A VFF Line-current feedforward IQR = 2 mA 140 mV CS step from 0 to 0.6 V time to onset of OUT transition low, CLOAD = 0 130 ns 22 ns 15 35 Ω HICCUP MODE TOL_10 Over load detection timer IVSD= 10 µA 12 ms TOL_100 Over load detection timer IVSD= 100 µA 1.2 ms OUTPUT GATE DRIVER VOH OUT high saturated IOUT = 50 mA, VCC-OUT 0.3 1.1 V VOL OUT low saturated IOUT = 100 mA 0.3 1 V IPH Peak OUT source current OUT = VCC/2 0.3 IPL Peak OUT sink current OUT = VCC/2 0.7 A tr Rise time CLOAD = 1 nF 25 ns tf Fall time CLOAD = 1 nF 15 ns A SOFT-START ISS Soft-start current 17 22 30 µA THERMAL TSD 6 Thermal shutdown temperature 165 Submit Documentation Feedback ºC Copyright © 2013–2016, Texas Instruments Incorporated Product Folder Links: LM5023 LM5023 www.ti.com SNVS961E – APRIL 2013 – REVISED JANUARY 2016 6.6 Typical Characteristics 7.6 14 7.55 13.5 7.5 VCCOFF (V) VCCON(V) 13 12.5 12 7.45 7.4 7.35 7.3 11.5 7.25 7.2 11 -50 -25 0 25 50 75 100 TEMPERATURE (Cƒ) -50 125 -25 0 25 50 75 100 TEMPERATURE (Cƒ) C001 Figure 2. VCCON vs. Temperature 125 C002 Figure 3. VCCOFF vs. Temperature 5.1 400 390 5.05 380 370 ICCST(µA) VRST(V) 5 4.95 4.9 360 350 340 330 320 4.85 310 4.8 300 -50 -25 0 25 50 75 100 TEMPERATURE (Cƒ) 125 -50 0 25 50 75 100 TEMPERATURE (Cƒ) Figure 4. VRST vs. Temperature 125 C004 Figure 5. ICCST vs. Temperature 800 132 790 131 780 130 FMAX(kHz) ICCOP(µA) -25 C003 770 760 129 128 750 127 740 730 126 -50 -25 0 25 50 75 TEMPERATURE (Cƒ) 100 125 -50 C005 Figure 6. ICCOP vs. Temperature -25 0 25 50 75 100 TEMPERATURE (Cƒ) 125 C006 Figure 7. FMAX vs. Temperature Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated Product Folder Links: LM5023 7 LM5023 SNVS961E – APRIL 2013 – REVISED JANUARY 2016 www.ti.com Typical Characteristics (continued) 550 CS THRESHOLD (mV) 540 530 520 510 500 490 480 470 460 450 -50 -25 0 25 50 75 100 TEMPERATURE (Cƒ) 125 C007 Figure 8. CS Threshold vs. Temperature 7 Detailed Description 7.1 Overview The LM5023 is a quasi-resonant PWM controller which contains all of the features needed to implement a highly efficient off-line power supply. The LM5023 uses the transformer auxiliary winding for demagnetization detection to ensure quasi-resonant operation (valley-switching) to minimize switching losses. For applications that need to meet the ENERGY STAR low standby power requirements, the LM5023 features an extremely low lq current (346 µA) and skip-cycle mode which reduces power consumption at light loads. The LM5023 uses a feedback signal from the output to provide a very accurate output-voltage regulation 1 MΩ, if a lower value is used then the standby power will be higher. Assuming the depletion mode FET charges the VCC capacitor with 2 mA, VCC capacitor is 10 µF. VCCON VCCOFF 12.5 V 7.5 V u CVCC u 10 PF 25ms tCHARGE ICHARGE 2mA 26 Submit Documentation Feedback (59) Copyright © 2013–2016, Texas Instruments Incorporated Product Folder Links: LM5023 LM5023 www.ti.com SNVS961E – APRIL 2013 – REVISED JANUARY 2016 tDISCHARGE tHICCUP VCCON VCCOFF u CVCC ICCST 25ms u 4 145ms u 4 12.5 V 7.5 V u 10 PF 145ms 340 PA (60) 680ms (61) The depletion FET charging current into the VCC cap 2 mA The current consumption of the LM5023 while the OCP flag is set ICCST = 346 PA VCCON 12.5 V VCCAUX 10 V VCCOFF 7.5 V VCCOFF OLDTS OUT VSD SS 25 ms 145 ms Hiccup Mode Figure 17. Hiccup Mode Timing Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated Product Folder Links: LM5023 27 LM5023 SNVS961E – APRIL 2013 – REVISED JANUARY 2016 www.ti.com 8.2.3 Application Curves 0.90 115Vac 230Vac 0.88 Efficiency 0.86 0.84 0.82 0.80 0.78 0.000 0.857 1.713 2.570 3.426 IOUT C001 CH1: OUT, 10 V/div CH3: VCC, 5 V/div Figure 19. 115-V Start-Up, 0.1-A Load Figure 18. LM5023 EVM Efficiency CH1: OUT, 10 V/div CH3: VCC, 5 V/div CH2: SS, 2 V/div CH4: VOUT, 5 V/div CH1: OUT, 10 V/div CH3: VCC, 5 V/div Figure 20. 115-V Start-Up, 3.43-A Load CH1: OUT, 10 V/div CH3: VCC, 5 V/div CH2: SS, 2 V/div CH4: VOUT, 5 V/div Figure 22. 230-V Start-Up, 3.43-A Load 28 CH2: SS, 2 V/div CH4: VOUT, 5 V/div CH2: SS, 2 V/div CH4: VOUT, 5 V/div Figure 21. 230-V Start-Up, 0.1-A Load CH1: OUT, 10 V/div CH2: CS, 200 mV/div CH4: VDS, 100 V/div Figure 23. QR Waveforms VIN 115 VAC, IOUT 3.43 A Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated Product Folder Links: LM5023 LM5023 www.ti.com SNVS961E – APRIL 2013 – REVISED JANUARY 2016 CH1: OUT, 10 V/div CH2: CS, 200 mV/div CH4: VDS, 100 V/div Figure 24. QR Waveforms VIN 230 VAC, IOUT 3.43 A 9 Power Supply Recommendations The LM5023 device is intended for AC-to-DC adapters and power supplies with input voltage range of 85 VAC(rms) to 265 VAC(rms) using the flyback topology. It can also be used in other applications and convertor topologies with different input voltages. Be sure that all voltages and currents are within the recommended operating conditions and absolute maximum ratings of the device. 10 Layout 10.1 Layout Guidelines TI recommends all high-current loops be kept as short as possible. Keep all high-current and high-frequency traces away from other traces in the design. If necessary, high-frequency and high-current traces should be perpendicular to signal traces, not parallel to them. It is good practice to shield signal traces with ground traces to help reduce noise pick up. The ground reference for components connected to the signal pins should be a kelvin connection to the VCC bypass capacitor and GND pin. Always consider appropriate clearances between highvoltage nets and low-voltage nets. Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated Product Folder Links: LM5023 29 LM5023 SNVS961E – APRIL 2013 – REVISED JANUARY 2016 www.ti.com 10.2 Layout Example To Optocoupler C CVCC R VCC QR OUT VSD G R R RG LM5023 GND SS CS D COMP Primary Winding CCS C RCS R S R C PGND To Bulk Capacitor+ AUX Winding R BULK AUX To Bulk Capacitor± Figure 25. LM5023 Layout Example 30 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated Product Folder Links: LM5023 LM5023 www.ti.com SNVS961E – APRIL 2013 – REVISED JANUARY 2016 11 Device and Documentation Support 11.1 Custom Design with WEBENCH Tools Click here to create a custom design using the LM5023 device with the WEBENCH® Power Designer. 1. Start by entering your VIN, VOUT and IOUT requirements. 2. Optimize your design for key parameters like efficiency, footprint and cost using the optimizer dial and compare this design with other possible solutions from Texas Instruments. 3. WEBENCH Power Designer provides you with a customized schematic along with a list of materials with real time pricing and component availability. 4. In most cases, you will also be able to: – Run electrical simulations to see important waveforms and circuit performance, – Run thermal simulations to understand the thermal performance of your board, – Export your customized schematic and layout into popular CAD formats, – Print PDF reports for the design, and share your design with colleagues. 5. Get more information about WEBENCH tools at www.ti.com/webench. 11.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 11.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.4 Trademarks E2E is a trademark of Texas Instruments. WEBENCH is a registered trademark of Texas Instruments. ENERGY STAR is a registered trademark of EPA. All other trademarks are the property of their respective owners. 11.5 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated Product Folder Links: LM5023 31 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LM5023MM-2/NOPB ACTIVE VSSOP DGK 8 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 SK9B LM5023MMX-2/NOPB ACTIVE VSSOP DGK 8 3500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 SK9B (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of