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LM5056APMHE/NOPB

LM5056APMHE/NOPB

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    TSSOP28_9.7X4.4MM_EP

  • 描述:

    IC SUPERVISORY/SYS MGMT 28HTSSOP

  • 数据手册
  • 价格&库存
LM5056APMHE/NOPB 数据手册
LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 High-Voltage System Power Management Device with PMBus™ Check for Samples: LM5056, LM5056A FEATURES APPLICATIONS • • • • • 1 2 • • • • • • • • • Input Voltage Range: 10 V to 80 V Real-Time Monitoring of VIN, IIN, PIN, VOUT, and VAUX with 12-bit resolution, 1-kHz sampling rate True input Power Measurement using simultaneous sampling of Vin and Iin Remote Temperature Sensing with programmable warning thresholds Power Measurement Accuracy – LM5056A: ±1.75% – LM5056: ±2.25% Current Measurement Accuracy – LM5056A: ±1.25% – LM5056: ±1.5% Voltage Measurement Accuracy: ±1.0% Averaging of VIN, IIN, PIN, and VOUT with Programmable Interval Ranging from 0.001 s to 4 s Programmable WARN and FAULT Thresholds with SMBA Notification Black-Box Capture of Telemetry Measurements and Device Status Triggered by WARN or FAULT Condition I2C/SMBus Interface and PMBus Compliant Command Structure Server Backplane Systems Base Station Power Distribution Systems Industrial Telemetry Applications DESCRIPTION The LM5056/LM5056A combines high-performance analog and digital technology with a PMBus™ compliant SMBus™ and I2C interface to accurately measure the electrical operating conditions of systems connected to a backplane power bus. The LM5056/LM5056A continuously supplies real-time power, voltage, current, temperature and fault data to the system management host via the SMBus interface. The LM5056/LM5056A monitoring block computes both the real time and average values of subsystem operating parameters (VIN, IIN, PIN, VOUT) as well as the peak power. Accurate power averaging is accomplished by averaging the product of the input voltage and current. A black-box (telemetry and fault snapshot) function captures and stores telemetry data and device status in the event of a warning or a fault. SPACER BETWEEN APPLICATION DIAGRAM 2 COLUMN AND 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PMBus is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2012–2013, Texas Instruments Incorporated LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com TYPICAL APPLICATION DIAGRAM LOAD RS +48V VOUT VIN VIN VIN_K SENSE OUT VAUX NC ADR2 NC ADR1 NC ADR0 DIODE LM5056/LM5056A MMBT3904 VREF CVREF SMBA SMBus Interface SDAI CL SDAO SCL VDD DGND 5.0V AGND CVDD 2 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE UNIT VIN, VIN_K, SENSE, OUT to AGND/DGND -0.3 to 100 SMBA, SCL, SDAI, SDAO, CL, ADR0, ADR1, ADR2, VDD, VAUX, DIODE to AGND/DGND -0.3 to 6.0 VIN to VIN_K, AGND to DGND -0.3 to 0.3 VIN_K to SENSE -3.0 to 3.0 HBM Human body model ESD rating (2) TSTG Storage temperature -65 to 150 TJ Junction temperature 150 (1) (2) V 2.0 kV °C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and conditions see Electrical Characteristics Table. The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) (1) MIN VIN, VIN_K,SENSE, OUT 10 VDD 4.5 VAUX (1) NOM MAX 5.0 5.5 UNIT 80 0 V 2.97 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and conditions see the Electrical Characteristics Table. THERMAL INFORMATION LM5056 THERMAL METRIC (1) PWP UNITS 28 PINS θJA Junction-to-ambient thermal resistance (2) 35.6 θJCtop Junction-to-case (top) thermal resistance (3) 19.9 (4) θJB Junction-to-board thermal resistance ψJT Junction-to-top characterization parameter (5) 0.5 ψJB Junction-to-board characterization parameter (6) 16.7 θJCbot Junction-to-case (bottom) thermal resistance (7) 2.9 (1) (2) (3) (4) (5) (6) (7) 16.8 °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a. The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDECstandard test exists, but a close description can be found in the ANSI SEMI standard G30-88. The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8. The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7). The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7). The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. Spacer Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 3 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com ELECTRICAL CHARACTERISTICS Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to 125°C unless otherwise stated. Minimum and maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 48 V and VDD = 5.0 V. See (1) and (2). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Input (VIN Pin) IVIN VIN input current POREN Power on reset threshold at VIN to enable VIN increasing all functions POREN_HY S VIN = 48 V POREN hysteresis 7.5 VIN decreasing 0.9 1.4 mA 8.7 9.7 V 150 mV VDD Regulator (VDD pin) VDDPOR VDD power on reset voltage threshold VDD rising 3.8 4.5 V IDD VDD pin input current VDD = 5.5 V 3.0 6.1 6.8 mA 90 OUT, SENSE, VIN_K, VAUX Pins IOUT OUT bias current OUT = VIN, normal operation 79 ISENSE SENSE bias current SENSE = VIN, normal operation 11 IVIN_K VIN_K bias current VIN_K = VIN, normal operation 110 IVAUX VAUXH bias current VAUX = 2.97 V μA 1.0 Internal Reference VREF Reference voltage IREF = 0 mA 2.94 2.97 3.0 V ADC and MUX ADCRES Resolution INL Integral non-linearity ADC only 12 bits ±4 LSB tRR Acquisition round-robin time Cycle all channels 1 ms TA = 25°C to 85°C 2 °C 9 bits Remote Diode Temperature Sensor TACC Temperature accuracy using local diode Remote diode resolution IDIODE External diode current source DRATIO Diode current ratio (1) (2) 4 High level 250 Low level 9.4 μA 25.9 Current out of a pin is indicated as a negative value. All limits are ensured. All electrical characteristics having room temperature limits are tested during production at TA = 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical process control. Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 ELECTRICAL CHARACTERISTICS (continued) Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to 125°C unless otherwise stated. Minimum and maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 48 V and VDD = 5.0 V. See (1) and(2). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Telemetry Accuracy IINFSR Current input full scale range IINLSB Current input LSB CL = GND 54.4 CL = VDD 27.0 CL = GND 13.3 0 CL = VDD 6.70 μV 2.96 6 V VAUX input LSB 724 μV Input voltage full scale range 88.9 V 21.7 mV VAUXFSR VAUX input full scale range VAUXLSB VINFSR VINLSB Input voltage LSB VIN_K – SENSE_K = 22 mV, CL = VDD (80% IINFSR), TJ = 0°C to 85°C IINACC mV -1.5 1.5 % -1.25 1.25 % VIN_K – SENSE_K = 5.5 mV, CL = VDD (20% IINFSR), TJ = 0°C to 85°C -5.5 5.5 % VIN_K – SENSE_K = 44 mV, CL = GND (80% IINFSR), TJ = 0°C to 85°C -3.5 3.5 % VIN_K – SENSE_K = 22 mV, CL = VDD (80% IINFSR), LM5056A TJ = 0°C to 85°C Input current accuracy VIN VIN accuracy VIN = 48 V, TJ = 0°C to 85°C -1 1 % VOUT VOUT accuracy VOUT = 48 V, TJ = 0°C to 85°C -1 1 % VAUX VAUX accuracy VAUX = 2.8 V, TJ = 0°C to 85°C -1.3 1.3 % VIN = 48 V, VIN_K – SENSE_K = 22 mV, CL = VDD, TJ = 0°C to 85°C -2.25 2.25 % VIN = 48 V, VIN_K – SENSE_K = 22 mV, LM5056A CL = VDD, TJ = 0°C to 85°C -1.75 1.75 % -3.6 3.6 % PINACC Input power accuracy VIN = 48 V, VIN_K – SENSE_K = 44 mV, CL = GND, TJ = 0°C to 85°C PMBus Pin Thresholds (SMBA, SDAI, SDAO, SCL) VIL SDAI, SCL input low voltage 0.9 VIH SDAI, SCL input high voltage VOL SDAO output low voltage ISINK = 3 mA ILEAK Input leakage current SDAI, SMBA, SCL = 5 V 2.1 V 0.4 1 μA CL Pin VIH Threshold voltage ILEAK Input leakage current 3 CL = 5 V V 10 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A μA 5 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com TYPICAL CHARACTERISTICS Unless otherwise specified the following conditions apply: TJ = 25°C, VIN, VIN_K, SENSE, and OUT = 48 V and VDD = 5.0 V. All graphs show junction temperature. 6.5 6.25 1100 VDD Quiescent Current (mA) VIN Quiescent Current (µA) 1200 VIN = 80V 1000 900 800 VIN = 48V 700 600 VIN = 9V 500 6 VDD = 5.5V 5.75 5.5 5.25 5 VDD = 5.0V 4.75 4.5 VDD = 4.5V 4.25 400 4 -50 -25 0 25 50 75 100 125 150 ±50 ±25 -XQFWLRQ 7HPSHUDWXUH Û& 0 25 50 75 100 125 150 -XQFWLRQ 7HPSHUDWXUH Û& C010 C001 Figure 1. VIN Pin Current Figure 2. VDD Quiescent Current 11.50 SENSE Pin Bias Current (µA) VIN_K Bias Current (µA) 114 112 110 108 106 104 11.45 11.40 11.35 11.30 11.25 11.20 11.15 11.10 11.05 102 ±50 ±25 ±50 ±25 0 25 50 75 100 125 150 -XQFWLRQ 7HPSHUDWXUH Û& 0 25 50 75 -XQFWLRQ 7HPSHUDWXUH 100 125 150 Û& C002 C009 Figure 4. SENSE Pin Current 79.1 100 79.05 50 79 VAUX Bias Current (nA) OUT Bias Current (µA) Figure 3. VIN_K Pin Current 78.95 78.9 78.85 78.8 78.75 78.7 0 -50 -100 -150 -200 -250 78.65 78.6 -300 -50 -25 0 25 50 75 100 125 150 -50 -XQFWLRQ 7HPSHUDWXUH Û& 6 0 25 50 75 100 125 150 -XQFWLRQ 7HPSHUDWXUH Û& C011 Figure 5. OUT Pin Current -25 C012 Figure 6. VAUX Pin Current (VAUX = 2.97 V) Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 TYPICAL CHARACTERISTICS (continued) Unless otherwise specified the following conditions apply: TJ = 25°C, VIN, VIN_K, SENSE, and OUT = 48 V and VDD = 5.0 V. All graphs show junction temperature. 2.973 0.10 0.08 0.06 2.971 0.04 VIN Error (%) Reference Voltage (V) 2.972 2.970 2.969 0.02 0.00 ±0.02 ±0.04 2.968 ±0.06 2.967 ±0.08 2.966 ±0.10 ±50 ±25 0 25 50 75 100 125 150 -50 -25 -XQFWLRQ 7HPSHUDWXUH Û& 0 25 50 75 100 125 150 -XQFWLRQ 7HPSHUDWXUH Û& C008 C005 Figure 7. VREF Voltage Figure 8. VIN Measurement Error 0.25 0.10 0.20 0.15 POWER Error (%) Input Current Error (%) 0.05 0.00 ±0.05 ±0.10 0.10 0.05 0.00 ±0.05 ±0.10 ±0.15 ±0.15 ±0.20 ±0.25 ±0.20 ±50 ±25 0 25 50 75 -50 100 125 150 -25 0 25 50 75 100 125 150 -XQFWLRQ 7HPSHUDWXUH Û& -XQFWLRQ 7HPSHUDWXUH Û& C006 C007 Figure 10. PIN Measurement Error (VIN_K - SENSE = 22 mV) 0.10 0.10 0.08 0.08 0.06 0.06 0.04 0.04 VAUX Error (%) VOUT Error (%) Figure 9. IIN Measurement Accuracy (VIN_K - SENSE = 22 mV) 0.02 0.00 ±0.02 ±0.04 0.02 0.00 ±0.02 ±0.04 ±0.06 ±0.06 ±0.08 ±0.08 ±0.10 ±0.10 -50 -25 0 25 50 75 100 125 150 -50 -XQFWLRQ 7HPSHUDWXUH Û& -25 0 25 50 75 100 125 150 -XQFWLRQ 7HPSHUDWXUH Û& C004 Figure 11. VOUT Measurement Error C003 Figure 12. VAUX Measurment Error (VAUX = 2.80 V) Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 7 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com DEVICE INFORMATION HTSSOP Package 28 Pin (Top View) OUT 1 28 NC NC 2 27 NC SENSE 3 26 NC VIN_K 4 25 NC VIN 5 24 NC 23 NC Exposed Pad NC 6 NC 7 22 CL NC 8 21 VDD AGND 9 20 ADR0 DGND 10 19 ADR1 SDAI 11 18 ADR2 SDAO 12 17 VAUX SCL 13 16 DIODE SMBA 14 15 VREF TERMINAL FUNCTIONS TERMINAL NAME NO. Exposed Pad Pad I/O DESCRIPTION Exposed pad of HTSSOP package. Solder to the ground plane to reduce thermal resistance. OUT 1 I Output voltage telemetry input. The OUT pin is an auxiliary high-voltage input to the ADC. Use this pin to measure the output voltage or other system voltages up to 80 V. NC 2 - No connect. Not bonded to the die. Can be connected to the ground plane. SENSE 3 I Negative input to the current sense amplifier. The voltage across the current sense resistor (RS) is measured from VIN_K to SENSE. VIN_K 4 I Positive input to the current sense amplifier. The voltage across the current sense resistor (RS) is measured from VIN_K to SENSE. VIN 5 I Positive supply input. VIN is the input supply connection for the device. The input voltage is measured between this pin and AGND. A small bypass capacitor can be connected from VIN to AGND/DGND in noisy environments. NC 6 - No connect. Not bonded to the die. Connect to the ground plane. NC 7 - No connect. Not bonded to the die. Connect to the ground plane. NC 8 - No connect. Not bonded to the die. Connect to the ground plane. AGND 9 - Analog ground. Connect analog ground to digital ground and then to a quiet system ground. Be sure to avoid high current return paths. DGND 10 - Digital ground. Connect analog ground to digital ground and then to a clean system ground. Be sure to avoid high current return paths. SDAI 11 I SMBus data input. Data input pin for SMBus. Connect to SDAO if the application does not require unidirectional isolation devices. SDAO 12 O SMBus data output. Data output pin for SMBus. Connect to SDAI if the application does not require unidirectional isolation devices. SCL 13 I SMBus clock input. Clock pin for SMBus. SMBA 14 O SMBus alert line. Alert pin for SMBus, active low. VREF 15 O Internal voltage reference. Internally generated precision 2.97V voltage reference used for analog to digital conversion. Connect a 1 μF capacitor from this pin to AGND for bypassing. DIODE 16 O External temperature diode pin. Connect DIODE to a diode-configured MMBT3904 NPN transistor for temperature monitoring. The diode return path should be closley coupled with AGND. A small bypass capacitance on the order of 1 nF is recommended for extra noise immunity. VAUX 17 I Auxiliary low voltage input. The Auxiliary pin allows voltage telemetry from an external source. Full scale input of 2.966 V. ADR2 18 I SMBUS address line 2. Tri-state address line. Should be connected to DGND, VDD, or left floating. 8 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 TERMINAL FUNCTIONS (continued) TERMINAL I/O DESCRIPTION 19 I SMBUS address line 1. Tri-state address line. Should be connected to DGND, VDD, or left floating. 20 I SMBUS address line 0. Tri-state address line. Should be connected to DGND, VDD, or left floating. VDD 21 I VDD input to internal digital circuitry. Provide a 5.0-V (±10% allowable) voltage supply to VDD to power the internal digital circuitry. Connect a 1 μF capacitor on this pin to AGND for bypassing. CL 22 O Current range select pin. Connecting this pin to VDD or DGND selects between a full-scale current sense voltage range of 27.0 mV and 54.4 mV respectively. NC 23 - Bonded to die for testing purposes. Connect to the ground plane. NC 24 - Bonded to die for testing purposes. Connect to the ground plane. NC 25 - No connect. Not bonded to the die. Connect to the ground plane. NC 26 - No connect. Not bonded to the die. Connect to the ground plane. NC 27 - No connect. Not bonded to the die. Connect to the ground plane. NC 28 - No connect. Not bonded to the die. Connect to the ground plane. NAME NO. ADR1 ADR0 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 9 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com FUNCTIONAL BLOCK DIAGRAM VDD 5.0V DIGITAL LM5056/LM5056A 0V to 80V ANALOG OUT VIN SENSE VIN_K 10V to 80V MEASUREMENT/ AVERAGING/ WARN/ REGISTERS VREF 2.97 V REF VAUX DIODE S/ H 12 bit ADC AMUX 1/30 SCL SDAI 1/30 TELEMETRY STATE MACHINE SMBUS INTERFACE SDAO SMBA 0V ± 2.966V ADDRESS DECODER DIODE TEMP SENSE ADR0 CL ADR1 Cl = VDD, CURRENT SENSE FSR = 27.0 mV Cl = GND, CURRENT SENSE FSR = 54.4 mV ADR2 AGND 10 DGND Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 FUNCTIONAL DESCRIPTION The LM5056/LM5056A provides intelligent monitoring of the input voltage, output voltage, input current, input power, temperature, and an auxiliary input. The LM5056/LM5056A also provides a peak capture of the input power and programmable hardware averaging of the input voltage, current, power, temperature, and output voltage. Warning thresholds which trigger the SMBA pin may be programmed for input voltage, current, power, output voltage, and temperature via the PMBus interface. Powering The LM5056/LM5056A The LM5056/LM5056A is enabled by increasing the input voltage on VIN above the POREN threshold voltage, typically 8.7 V. There exists a VDD power on reset (VDDPOR) threshold on VDD of 3.8 V. The VDDPOR threshold must be surpassed to ensure proper telemetry readings. VDD must be powered externally by a 5 V power supply with an allowable tolerance of ±10%.The SMBus address of the LM5056/LM5056A is captured based on the states of the ADR0, ADR1, and ADR2 pins (GND, NC, VDD) during turn on and is latched into a volatile register once VDD has exceeded its POR threshold of 3.8 V. Reassigning or postponing the address capture is accomplished by holding the VREF pin to AGND. Pulling the VREF pin low also resets the logic and erases the volatile memory of the LM5056/LM5056A. Once released, the VREF pin charges up to its final value and the address is latched into a volatile register when the voltage at the VREF exceeds 2.55 V. VDD As mentioned in the previous paragraph, the LM5056/LM5056A VDD pin must be externally powered by a 5.0 V, ±10% supply. The required current is typically 6.1 mA. The pull-up voltage for the CL, ADR2, ADR1 and ADR0 pins should be the same as the voltage applied to VDD if they are to be tied high. It may also be used as the pull-up supply for the SMBus signals (SDAI/O, SCL, SMBA). It is recommended to connect a ceramic bypass capacitance having a value of 1 μF or greater as close to the VDD pin as the PCB layout allows. Remote Temperature Sensing The LM5056/LM5056A is designed to measure temperature remotely using an MMBT3904 NPN transistor. The base and collector of the MMBT3904 should be connected to the DIODE pin and the emitter to the LM5056/LM5056A AGND. Place the MMBT3904 near the device that requires temperature sensing. The temperature is measured by means of a change in the diode voltage in response to a step in current supplied by the DIODE pin. The DIODE pin sources a constant 9.4 µA but pulses 250 µA once every millisecond in order to measure the diode temperature. Care must be taken in the PCB layout to keep the parasitic resistance between the DIODE pin and the MMBT3904 low as to not degrade the measurement. Additionally, a small 1 nF bypass capacitor should be placed in parallel with the MMBT3904 to reduce the effects of noise. The temperature can be read using the READ_TEMPERATURE_1 PMBus command (8Dh). The default limits of the LM5056/LM5056A causes SMBA pin to be pulled low if the measured temperature exceeds 150°C. These thresholds can be reprogrammed via the PMBus interface using the OT_WARN_LIMIT (51h) and OT_FAULT_LIMIT (4Fh) commands. If the temperature measurement and protection capability of the LM5056/LM5056A are not used, the DIODE pin should be connected to the ground plane. Erroneous temperature measurements may result when the device input voltage is below the minimum operating voltage (10 V), due to VREF dropping out below the nominal voltage (2.97 V). Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 11 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com APPLICATION INFORMATION DESIGN-IN PROCEDURE Refer to Figure 13 for the Typical Application Circuit diagram. The following is the step-by-step procedure for hardware design of the LM5056/LM5056A. This procedure refers to section numbers that provide detailed information on the following design steps. The recommended design-in procedure is as follows: LOAD RS +48V VOUT VIN CS CVIN VIN VIN_K SENSE OUT VAUX NC ADR2 NC ADR1 NC ADR0 DIODE LM5056/ LM5056A VREF MMBT3904 CVREF SMBA SMBus Interface CD SDAI CL SDAO VDD SCL DGND 5.0V AGND CVDD Figure 13. Typical Application Circuit CURRENT Range (Selecting RS) The LM5056/LM5056A monitors the input current by measuring the voltage across the sense resistor (RS), connected from VIN_K to SENSE. The required resistor value is calculated from: V RS= I S FS where • IFS is the expected full scale current and VS is the current sense voltage range based on the current select range setting (CL). (1) If the voltage across RS reaches VS, the current measurement reaches the full-scale measurement. As mentioned before, it is important to limit the current to the full-scale reading. While there is internal circuitry intended to maintain the integrity of the other readings in the telemetry, the ADC and MUX are shared so overranging an input may compromise the integrity of the other readings. VS can be set to either 27.0 mV or 54.4 mV through software commands or the CL pin. This setting defaults to the sense voltage set at the CL pin during start-up. The value can be set via the PMBus with the DEVICE_SETUP (D9h) command, which defaults to the 27.0 mV setting. Once the full scale current, IFS is known and the VS range is chosen, the sense resistor can be calculated. The maximum load current in normal operation can be used to determine the required power rating for the sense resistor RS. Connections from RS to the LM5056/LM5056A should be made using Kelvin techniques. In the suggested layout of Figure 14 the small pads at the lower corners of the sense resistor connect only to the sense resistor terminals, and not to the traces carrying the high current. With this technique, only the voltage across the sense resistor is applied to VIN_K and SENSE, eliminating the voltage drop across the high-current solder connections. 12 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 HIGH CURRENT PATH FROM SYSTEM INPUT VOLTAGE SENSE RESISTOR TO LOAD RS VIN VIN_K SENSE Figure 14. Sense Resistor Connections, Edge Sensed If the PCB layout and resistor pads allow for it, the connection shown in Figure 15 gives optimal kelvin sensing performance. HIGH CURRENT PATH SENSE RESISTOR FROM SYSTEM INPUT VOLTAGE VIN RS VIN_K TO LOAD SENSE Figure 15. Sense Resistor Connections, Centered Sensed CVIN, CD, CVREF, CS, and CVDD Using ceramic bypass capacitors can improve performance in noise heavy environments. Not every pin of the LM5056/LM5056A is the same when it comes to placing bypass capacitors. • CVIN: This capacitor is not required but can improve VIN telemetry performance in noisy situations. Typical values for the VIN bypass capacitor can range from 1 nF to 100 nF to effectivly reduce input noise. The voltage on CVIN is high, so a 100 V or higher voltage capacitor will work. • CD:The CD capacitor is recommended if the diode is placed far from the LM5056/LM5056A DIODE pin. Too large of a capacitance will corrupt the voltage waveform across the diode used to measure the absolute temperature. A typical value of capacitance for CD is 1 nF. The voltage on CD is low, so a 6.3 V or higher voltage capacitor will work. • CVREF: CVREF is required since it is placed on the output of the internal votlage reference. This capacitor should be a 1 μF ceramic. The voltage on CVREF is low, so a 6.3 V or higher voltage capacitor will work. • CS: The current sense amplifier is designed to amplifiy small voltages. Using a bypass capacitor across the current sense amplifier input pins (VIN_K and SENSE) will facilitate accurate current telemetry. Functional values of CS can range from 10 nF to 1 μF. The voltage on CS is low, so a 6.3 V or higher voltage capacitor will work. • CVDD: CVDD is required because it provides bypassing from the 5.0 V rail for the internal digital circuitry. This capacitor should be a 1-μF ceramic. The voltage on CVDD is low, so a 6.3 V or higher voltage capacitor will work. Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 13 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com PC Board Guidelines The following guidelines should be followed when designing the PC board for the LM5056/LM5056A: • Place a 1-μF ceramic capacitor as close as possible to VREF pin and AGND. • Place a 1-μF ceramic capacitor as close as possible to VDD pin and AGND. • Minimize the inductance between the VIN and VIN_K pins. There are anti-parallel diodes between these pins so any voltage greater than 0.3 V in either polarity causes significant current flow through the diodes, which can result in device failure. Do not place any resistors between these two nodes. • Minimize the voltage between the VIN_K and SENSE pins. There are anti-parallel diodes between these pins so any voltage greater than 3.0 V in either polarity causes significant current flow through the diodes. Internal series resistors limit the current in these pins and provide a limited level of protection in the event of a voltage transient. • The sense resistor (RS) should be placed close to the LM5056/LM5056A. Connect RS using the Kelvin techniques shown in Figure 14 or Figure 15. • The high-current path from the board’s input to the load and the return path, should be parallel and close to each other to minimize loop inductance. • The AGND and DGND connections should be connected at the pins of the device. The return connections for the various components around the LM5056/LM5056A should be connected directly to each other, and to the LM5056/LM5056A’s DGND and AGND pin connections, and then connected to the system ground at one point. Do not connect the various component return pads to each other through the high current ground line. 14 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A PGND Primary power supply Voltage output SCL SDAO SDAI SMBA ADR0 SMBus Interface ADR1 NC ADR2 NC VDD CIN VIN SENSE DGND AGND LM5056/ LM5056A VIN_K RS OUT VDD CL VREF VAUX DIODE CVDD CVREF Sense Luminosity LED Fault +5.0V Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A B A RTHM2 RTHM1 CVCC AGND RFB2 RDHC CFLT CTHM RDMIN2 RDMIN1 CDHC GD4 SE4 GD3 SE3 GD2 SE2 GD1 SE1 DR1 DR2 DR3 DR4 VIN AGND AGND PGND PGND Thermal_Cap DMIN SYNC LM5056/ LM5056A Thermal VCC Faultb DIM VDHC FAULT_CAP EN OutP VLedFB CDHC Q4 PGND RISNS4 Q3 PGND RISNS3 Q2 PGND RISNS2 PGND RISNS1 Q1 NTC thermistor couple to LED arrays Luminosity Sensor B A To thermal sensor terminals www.ti.com To NTC thermal sensor IN OUT TPS71401 GND RP VDD Voltage feedback pin of PSU RFB1 MMBT3904 Temperature Sensor High Power LED Arrays LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 Applications Circuit Power, voltage, current, fault, temperature, and LED luminosity telemetry for LED street lamps. Figure 16. LED Street Lamp Telemetry Submit Documentation Feedback 15 16 SMBus Interface ADR0 NC Submit Documentation Feedback Product Folder Links: LM5056 LM5056A SCL SDAO SDAI SMBA ADR1 ADR2 NC VDD CIN VIN SENSE DGND AGND LM5056/ LM5056A VIN_K RS OUT VDD CL VREF VAUX DIODE VIN CVDD +5.0V System Bias CVREF AUXILIARY TELEMETRY 1 SMBus Interface POWER STAGE TEMP SENSE AMBIENT/CHASSIS TEMP SENSE TPS40170 MMBT3904 +48V VAUX VS- LM5056/ LM5056A VS+ VREF SMBA +5.0V System SDA Bias Telemetry SCL VDD DGND AGND ADR 0/1/2 DIODE VIN CVDD CVREF AUXILIARY TELEMETRY 2 +5.0V System Bias +48V LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com Applications Circuit Telemetry of input rail and 5-V bias rail output current and voltage. Figure 17. 48-V Input Rail and 5-V Bias Rail Telemetry Copyright © 2012–2013, Texas Instruments Incorporated LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 PMBus™ Command Support The device features an SMBus interface that allows the use of PMBus commands to set warn levels, error masks, and get telemetry on VIN, VOUT, IIN, VAUX, and PIN. The supported PMBus commands are shown in Table 1. Table 1. PMBus™ Command Support CODE NAME 03h CLEAR_FAULTS 19h CAPABILITY FUNCTION Clears the status registers and re-arms the black box registers for updating. Retrieves the device capability. R/W NUMBER OF DATA BYTES Send Byte 0 DEFAULT VALUE R 1 B0h Retrieves or stores output under-voltage, warn-limit threshold. R and W 2 0000h 43h VOUT_UV_WARN_LIMIT 4Fh OT_FAULT_LIMIT Retrieves or stores over-temperature, fault-limit threshold. R and W 2 0960h (150°C) 51h OT_WARN_LIMIT Retrieves or stores over-temperature, warn-limit threshold. R and W 2 07D0h (125°C) 57h VIN_OV_WARN_LIMIT Retrieves or stores input over-voltage, warn-limit threshold. R and W 2 0FFFh 58h VIN_UV_WARN_LIMIT Retrieves or stores input under-voltage, warn-limit threshold. R and W 2 0000h 78h STATUS_BYTE Retrieves information about the parts operating status. R 1 01h 79h STATUS_WORD Retrieves information about the parts operating status. R 2 1801h 7Ah STATUS_VOUT Retrieves information about output voltage status. R 1 00h 7Ch STATUS_INPUT Retrieves information about input status. R 1 00h 7Dh STATUS_TEMPERATURE Retrieves information about temperature status. R 1 00h 7Eh STATUS_CML Retrieves information about communications status. R 1 00h 80h STATUS_MFR_SPECIFIC Retrieves information about default status. R 1 10h 88h READ_VIN Retrieves input voltage measurement. R 2 0000h 8Bh READ_VOUT Retrieves output voltage measurement. R 2 0000h 8Dh READ_TEMPERATURE_1 Retrieves temperature measurement. R 2 0190h 99h MFR_ID Retrieves manufacturer ID in ASCII characters (NSC). R 3 4Eh 53h 43h Retrieves Part number in ASCII characters. (LM5056/LM5056A/LM5056/LM5056AA). R 8 4Ch 4Dh 35h 30h 35h 36h 00h 00h Retrieves part revision letter and number in ASCII (e.g., AA). R 2 41h 41h MFR_SPECIFIC_00 MFR_READ_VAUX Retrieves auxiliary voltage measurement. R 2 0000h D1h MFR_SPECIFIC_01 MFR_READ_IIN Retrieves input current measurement. R 2 0000h D2h MFR_SPECIFIC_02 MFR_READ_PIN Retrieves input power measurement. R 2 0000h D3h MFR_SPECIFIC_03 MFR_IIN_OC_WARN_LIMIT Retrieves or stores input-current-limit warn threshold. R and W 2 0FFFh D4h MFR_SPECIFIC_04 MFR_PIN_OP_WARN_LIMIT Retrieves or stores input-power-limit warn threshold. R and W 2 0FFFh D5h MFR_SPECIFIC_05 MFR_READ_PIN_PEAK Retrieves measured peak-input-power measurement. R 2 0000h 9Ah MFR_MODEL 9Bh MFR_REVISION D0h Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 17 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com Table 1. PMBus™ Command Support (continued) CODE NAME FUNCTION R/W NUMBER OF DATA BYTES D6h MFR_SPECIFIC_06 MFR_CLEAR_PIN_PEAK Resets the contents of the peak-input-power register to zero. Send Byte 0 D8h MFR_SPECIFIC_08 MFR_ALERT_MASK Retrieves or stores user SMBA fault mask. R and W 2 0800h D9h MFR_SPECIFIC_09 MFR_DEVICE_SETUP Retrieves or stores information about current sense gain setting. R and W 1 0000h R 12 0880h 0000h 0000h 0000h 0000h 0000h R and W 1 00h Retrieves averaged input-voltage measurement. R 2 0000h Retrieves averaged output-voltage measurement. R 2 0000h DAh MFR_SPECIFIC_10 MFR_BLOCK_READ DBh MFR_SPECIFIC_11 MFR_SAMPLES_FOR_AVG DCh MFR_SPECIFIC_12 MFR_READ_AVG_VIN DDh MFR_SPECIFIC_13 MFR_READ_AVG_VOUT DEh MFR_SPECIFIC_14 MFR_READ_AVG_IIN Retrieves averaged input-current measurement. R 2 0000h DFh MFR_SPECIFIC_15 MFR_READ_AVG_PIN Retrieves averaged input-power measurement. R 2 0000h Exponent value AVGN for number of samples to be averaged (N = 2AVGN), range = 00h to 0Ch . E0h MFR_SPECIFIC_16 MFR_BLACK_BOX_READ Captures diagnostic and telemetry information which are latched when the first SMBA event after faults are cleared. E1h MFR_SPECIFIC_17 MFR_DIAGNOSTIC_WORD_ READ Manufacturer-specific parallel of the STATUS_WORD to convey all FAULT and WARN data in a single transaction. E2h 18 Retrieves most recent diagnostic and telemetry information in a single transaction. DEFAULT VALUE MFR_SPECIFIC_18 MFR_AVG_BLOCK_READ Retrieves most recent average telemetry and diagnostic information in a single transaction. Submit Documentation Feedback R 12 0000h 0000h 0000h 0000h 0000h 0000h R 2 0880h 12 0000h 0000h 0000h 0000h 0000h 0000h R Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 Standard PMBus Commands CLEAR_FAULTS (03h) The CLEAR_FAULTS command is a standard PMBus command that resets all stored warning and fault flags and the SMBA signal. If a fault or warning condition still exists when the CLEAR_FAULTS command is issued, the SMBA signal may not clear or will reassert almost immediately. This command uses the PMBus send byte protocol. CAPABILITY (19h) The CAPABILITY command is a standard PMBus command that returns information about the PMBus functions supported by the LM5056/LM5056A/LM5056/LM5056AA. This command is read with the PMBus read byte protocol. Table 2. CAPABILITY Register VALUE MEANING DEFAULT B0h Supports packet error check, 400 Kbits/s, supports SMBus alert B0h VOUT_UV_WARN_LIMIT (58h) The VOUT_UV_WARN_LIMIT command is a standard PMBus command that allows configuring or reading the threshold for the VOUT under-voltage warning detection. Reading and writing to this register should use the coefficients shown in the Table 39. Accesses to this command should use the PMBus read or write word protocol. If the measured value of VOUT falls below the value in this register, VOUT under-voltage warn flags are set and the SMBA signal is asserted. Table 3. VOUT_UV_WARN_LIMIT Register VALUE MEANING DEFAULT 0001h – 0FFFh VOUT under-voltage warning detection threshold 0000h (disabled) 0000h VOUT under-voltage warning disabled n/a OT_FAULT_LIMIT (4Fh) The OT_FAULT_LIMIT command is a standard PMBus command that allows configuring or reading the threshold for the over-temperature fault detection. Reading and writing to this register should use the coefficients shown in the Table 39. Accesses to this command should use the PMBus read or write word protocol. If the measured temperature exceeds this value, an over-temperature fault is triggered and the SMBA signal is asserted. After the measured temperature falls below the value in this register, the CLEAR_FAULTS command (03h) should be sent to de-assert the SMBA signal. A single temperature measurement is an average of 16 round-robin cycles; therefore, the minimum temperature fault detection time is 16 ms. Table 4. OT_FAULT_LIMIT Register VALUE MEANING DEFAULT 0000h – 0FFEh Over-temperature fault threshold value 0960h (150°C) 0FFFh Over-temperature fault detection disabled n/a Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 19 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com OT_WARN_LIMIT (51h) The OT_WARN_LIMIT command is a standard PMBus command that allows configuring or reading the threshold for the over-temperature warning detection. Reading and writing to this register should use the coefficients shown in the Table 39. Accesses to this command should use the PMBus read or write word protocol. If the measured temperature exceeds this value, an over-temperature warning is triggered and the over-temperature warn flags set in the respective registers and the SMBA signal asserted. A single temperature measurement is an average of 16 round-robin cycles; therefore, the minimum temperature warn detection time is 16 ms. Table 5. OT_WARN_LIMIT Register VALUE MEANING DEFAULT 0000h – 0FFEh Over-temperature warn threshold value 07D0h (125°C) 0FFFh Over-temperature warn detection disabled n/a VIN_OV_WARN_LIMIT (57h) The VIN_OV_WARN_LIMIT command is a standard PMBus command that allows configuring or reading the threshold for the VIN over-voltage warning detection. Reading and writing to this register should use the coefficients shown in the Table 39 Table. Accesses to this command should use the PMBus read or write word protocol. If the measured value of VIN rises above the value in this register, VIN over-voltage warn flags are set in the respective registers and the SMBA signal is asserted. Table 6. VIN_OV_WARN_LIMIT Register VALUE MEANING DEFAULT 0000h – 0FFEh VIN Over-voltage warning detection threshold 0FFFh (disabled) 0FFFh VIN Over-voltage warning disabled n/a VIN_UV_WARN_LIMIT (58h) The VIN_UV_WARN_LIMIT command is a standard PMBus command that allows configuring or reading the threshold for the VIN under-voltage warning detection. Reading and writing to this register should use the coefficients shown in the Table 39. Accesses to this command should use the PMBus read or write word protocol. If the measured value of VIN falls below the value in this register, VIN under-voltage warn flags are set in the respective register, and the SMBA signal is asserted. Table 7. VIN_UV_WARN_LIMIT Register VALUE MEANING DEFAULT 0001h – 0FFFh VIN under-voltage warning detection threshold 0000h (disabled) 0000h VIN under-voltage warning disabled n/a STATUS_BYTE (78h) The STATUS_BYTE is a standard PMBus command that returns the value of a number of flags indicating the state of the LM5056/LM5056A. Accesses to this command should use the PMBus read byte protocol. To clear bits in this register, the underlying fault should be removed on the system and a CLEAR_FAULTS command issued. Table 8. STATUS_BYTE Definitions 20 BIT NAME MEANING DEFAULT 7 BUSY Not supported, always 0 0 6 OFF Not supported, always 0 0 5 VOUT_OV Not supported, always 0 0 4 IOUT_OC Not supported, always 0 0 3 VIN_UV An input under-voltage fault has occurred 0 2 TEMPERATURE A temperature fault or warning has occurred 0 1 CML A communication fault has occurred 0 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 Table 8. STATUS_BYTE Definitions (continued) BIT NAME MEANING DEFAULT 0 None of the above Not supported, always 1 1 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 21 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com STATUS_WORD (79h) The STATUS_WORD command is a standard PMBus command that returns the value of a number of flags indicating the state of the LM5056/LM5056A. Accesses to this command should use the PMBus read word protocol. To clear bits in this register, the underlying fault should be removed and a CLEAR _FAULTS command issued. Table 9. STATUS_WORD Definitions BIT NAME MEANING DEFAULT 15 VOUT An output voltage warning has occurred 0 14 IOUT/POUT Not supported, always 0 0 13 INPUT Not supported, always 0 0 12 MFR A manufacturer specific fault or warning has occurred 1 11 POWER GOOD Not supported, always 1 1 10 FANS Not supported, always 0 0 9 OTHER Not supported, always 0 0 8 UNKNOWN Not supported, always 0 0 7 BUSY Not supported, always 0 0 6 OFF Not supported, always 0 0 5 VOUT OV Not supported, always 0 0 4 IOUT OC Not supported, always 0 0 3 VIN UV Not supported, always 0 0 2 TEMPERATURE A temperature fault or warning has occurred 0 1 CML A communication fault has occurred 0 0 None of the above Not supported, always 1 1 STATUS_VOUT (7Ah) The STATUS_VOUT command is a standard PMBus command that returns the value of the VOUT under-voltage warn flag. Accesses to this command should use the PMBus read byte protocol. To clear bits in this register, the underlying fault should be cleared and a CLEAR_FAULTS command issued. Table 10. STATUS_VOUT Definitions BIT 22 NAME MEANING DEFAULT 7 VOUT OV fault Not supported, always 0 0 6 VOUT OV warn Not supported, always 0 0 5 VOUT UV warn A VOUT under-voltage warning has occurred 0 4 VOUT UV fault Not supported, always 0 0 3 VOUT max Not supported, always 0 0 2 TON max fault Not supported, always 0 0 1 TOFF max fault Not supported, always 0 0 0 VOUT tracking error Not supported, always 0 0 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 STATUS_INPUT (7Ch) The STATUS_INPUT command is a standard PMBus command that returns the value of a number of flags related to input voltage, current, and power. Accesses to this command should use the PMBus read byte protocol. To clear bits in this register, the underlying fault should be cleared and a CLEAR_FAULTS command issued. Table 11. STATUS_INPUT Definitions BIT NAME MEANING DEFAULT 7 VIN OV Fault Not supported, always 0 0 6 VIN OV Warn A VIN over-voltage warning has occurred 0 5 VIN UV Warn A VIN under-voltage warning has occurred 0 4 VIN UV Fault Not supported, always 0 0 3 Insufficient voltage Not supported, always 0 0 2 IIN OC Fault Not supported, always 0 0 1 IIN OC Warn An IIN over-current warning has occurred 0 0 PIN OP Warn A PIN over-power warning has occurred 0 STATUS_TEMPERATURE (7dh) The STATUS_TEMPERATURE is a standard PMBus command that returns the value of the of a number of flags related to the temperature telemetry value. Accesses to this command should use the PMBus read byte protocol. To clear bits in this register, the underlying fault should be cleared and a CLEAR_FAULTS command issued. Table 12. STATUS_TEMPERATURE Definitions BIT NAME MEANING DEFAULT 7 Over-temp fault An over-temperature fault has occurred 0 6 Over-temp warn An over-temperature warning has occurred 0 5 Under-temp warn Not supported, always 0 0 4 Under-temp fault Not supported, always 0 0 3 reserved Not supported, always 0 0 2 reserved Not supported, always 0 0 1 reserved Not supported, always 0 0 0 reserved Not supported, always 0 0 STATUS_CML (7Eh) The STATUS_CML is a standard PMBus command that returns the value of a number of flags related to communication faults. Accesses to this command should use the PMBus read byte protocol. To clear bits in this register, a CLEAR_FAULTS command should be issued. Table 13. STATUS_CML Definitions BIT NAME DEFAULT 7 Invalid or unsupported command received 0 6 Invalid or unsupported data received 0 5 Packet Error Check failed 0 4 Not supported, always 0 0 3 Not supported, always 0 0 2 Not supported, always 0 0 1 Miscellaneous communications fault has occurred 0 0 Not supported, always 0 0 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 23 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com STATUS_MFR_SPECIFIC (80h) The STATUS_MFR_SPECIFIC command is a standard PMBus command that contains manufacturer specific status information. Accesses to this command should use the PMBus read byte protocol. To clear bits in this register, the underlying fault should be removed and a CLEAR_FAULTS command should be issued. Table 14. STATUS_MFR_SPECIFIC Definitions BIT NAME DEFAULT 7 Not supported, always 0 0 6 Not supported, always 0 0 5 Not supported, always 0 0 4 Defaults loaded 1 3 Not supported, always 0 0 2 Not supported, always 0 0 1 Not supported, always 0 0 0 Not supported, always 0 0 READ_VIN (88h) The READ_VIN command is a standard PMBus command that returns the 12-bit measured value of the input voltage (VIN to AGND). Reading this register should use the coefficients shown in the Table 39. Accesses to this command should use the PMBus read word protocol. This value is also used internally for the VIN over and under-voltage warning detection. Table 15. READ_VIN Register VALUE MEANING DEFAULT 0h – 0FFFh Measured value for VIN 0000h READ_VOUT (8Bh) The READ_VOUT command is a standard PMBus command that returns the 12-bit measured value of the output voltage. Reading this register should use the coefficients shown in the Table 39 Table. Accesses to this command should use the PMBus read word protocol. This value is also used internally for the VOUT under_voltage warning detection. Table 16. READ_VOUT Register VALUE MEANING DEFAULT 0h – 0FFFh Measured value for VOUT 0000h READ_TEMPERATURE_1 (8Dh) The READ_TEMPERATURE_1 command is a standard PMBus command that returns the signed value of the temperature measured by the external temperature sense diode. Reading this register should use the coefficients shown in the Table 39. Accesses to this command should use the PMBus read word protocol. This value is also used internally for the over-temperature fault and warning detection. This data has a range of -256°C to 255°C after the coefficients are applied. Table 17. READ_TEMPERATURE_1 Register 24 VALUE MEANING DEFAULT 0h – 0FFFh Measured value for TEMPERATURE 0190h Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 MFR_ID (99h) The MFR_ID command is a standard PMBus command that returns the identification of the manufacturer. To read the MFR_ID, use the PMBus block read protocol. Table 18. MFR_ID Register BYTE NAME VALUE 0 Number of bytes 03h 1 MFR ID-1 4Eh ‘N’ 2 MFR ID-2 53h ‘S’ 3 MFR ID-3 43h ‘C’ MFR_MODEL (9Ah) The MFR_MODEL command is a standard PMBus command that returns the part number of the chip. To read the MFR_MODEL, use the PMBus block read protocol. Table 19. MFR_MODEL Register BYTE NAME VALUE 0 Number of bytes 08h 1 MFR ID-1 4Ch ‘L’ 2 MFR ID-2 4Dh ‘M’ 3 MFR ID-3 35h ‘5’ 4 MFR ID-4 30h ‘0’ 5 MFR ID-5 35h ‘5’ 6 MFR ID-6 36h ‘6’ 7 MFR ID-7 00h 8 MFR ID-8 00h MFR_REVISION (9Bh) The MFR_REVISION command is a standard PMBus command that returns the revision level of the part. To read the MFR_REVISION, use the PMBus block read protocol. Table 20. MFR_REVISION Register BYTE NAME VALUE 0 Number of bytes 02h 1 MFR ID-1 41h ‘A’ 2 MFR ID-2 41h ‘A’ Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 25 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com Manufacturer Specific PMBus™ Commands MFR_SPECIFIC_00: MFR_READ_VAUX (D0h) The MFR_READ_VAUX command will report the 12-bit ADC measured auxiliary voltage. Voltages greater than or equal to 2.97 V to ground are reported at plus full scale (0FFFh). Voltages less than or equal to 0 V referenced to ground are reported as 0 (0000h). To read data from the MFR_READ_VAUX command, use the PMBus Read Word protocol. Table 21. MFR_READ_VAUX Register VALUE MEANING DEFAULT 0h – 0FFFh Measured value for VAUX input 0000h MFR_SPECIFIC_01: MFR_READ_IIN (D1h) The MFR_READ_IIN command reports the 12-bit ADC measured current sense voltage. To read data from the MFR_READ_IIN command, use the PMBus Read Word protocol. Reading this register should use the coefficients shown in the Table 39. Please see the section on coefficient calculations to calculate the values to use. Table 22. MFR_READ_IIN Register VALUE MEANING DEFAULT 0h – 0FFFh Measured value for input current sense voltage 0000h MFR_SPECIFIC_02: MFR_READ_PIN (D2h) The MFR_READ_PIN command reports the upper 12 bits of the VIN x IIN product as measured by the 12-bit ADC. To read data from the MFR_READ_PIN command, use the PMBus Read Word protocol. Reading this register should use the coefficients shown in the Table 39. Please see the section on coefficient calculations to calculate the values to use. Table 23. MFR_READ_PIN Register VALUE MEANING DEFAULT 0h – 0FFFh Value for input current x input voltage 0000h MFR_SPECIFIC_03: MFR_IN_OC_WARN_LIMIT (D3h) The MFR_IIN_OC_WARN_LIMIT PMBus command sets the input over-current warning threshold. In the event that the input current rises above the value set in this register, the IIN over-current flags are set in the respective registers and the SMBA is asserted. To access the MFR_IIN_OC_WARN_LIMIT register, use the PMBus Read/Write Word protocol. Reading/writing to this register should use the coefficients shown in the Table 39. Table 24. MFR_IIN_OC_WARN_LIMIT Register 26 VALUE MEANING DEFAULT 0h – 0FFEh Value for input over-current warn limit 0FFFh 0FFFh Input over-current warning disabled n/a Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 MFR_SPECIFIC_04: MFR_PIN_OP_WARN_LIMIT (D4h) The MFR_PIN_OP_WARN_LIMIT PMBus command sets the input over-power warning threshold. In the event that the input power rises above the value set in this register, the PIN over-power flags are set in the respective registers and the SMBA is asserted. To access the MFR_PIN_OP_WARN_LIMIT register, use the PMBus Read/Write Word protocol. Reading/writing to this register should use the coefficients shown in the Table 39. Table 25. MFR_PIN_OPWARN_LIMIT Register VALUE MEANING DEFAULT 0h – 0FFEh Value for input over-power warn limit 0FFFh 0FFFh Input over-power warning disabled n/a MFR_SPECIFIC_05: MFR_READ_PIN_PEAK (D5h) The MFR_READ_PIN_PEAK command reports the maximum input power measured since a power-on reset or the last MFR_CLEAR_PIN_PEAK command. To access the MFR_READ_PIN_PEAK command, use the PMBus Read Word protocol. Use the Table 39. Table 26. MFR_READ_PIN_PEAK Register VALUE MEANING DEFAULT 0h – 0FFEh Maximum value for input current x input voltage since reset or last clear 0h MFR_SPECIFIC_06: MFR_CLEAR_PIN_PEAK (D6h) The MFR_CLEAR_PIN_PEAK command clears the MFR_PIN_PEAK register. This command uses the PMBus Send Byte protocol. Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 27 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com MFR_SPECIFIC_08: MFR_ALERT_MASK (D8h) The MFR_ALERT_MASK command is used to mask the SMBA when a specific fault or warning has occurred. Each bit corresponds to one of the 8 different analog and digital faults or warnings that would normally result in an SMBA being asserted. When the corresponding bit is high, that condition will not cause the SMBA to be asserted. If that condition occurs, the registers where that condition is captured will still be updated (STATUS registers, DIAGNOSTIC_WORD) . This register is accessed with the PMBus Read and Write Word protocol. Table 27. MFR_ALERT_MASK Definitions 28 BIT NAME DEFAULT 15 VOUT under-voltage warn 0 14 IIN limit warn 0 13 VIN under-voltage warn 0 12 VIN over-voltage warn 0 11 Not supported, always 0 0 10 Over-temperature warn 0 9 Not supported, always 0 0 8 Over-power warn 0 7 Not supported, always 0 0 6 Not supported, always 0 0 5 Not supported, always 0 0 4 Not supported, always 0 0 3 Not supported, always 0 0 2 Over-temperature fault 0 1 CML FAULT (communications fault) 0 0 Not supported, always 0 0 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 MFR_SPECIFIC_09: MFR_DEVICE_SETUP (D9h) The MFR_DEVICE_SETUP command may be used to override pin settings to define operation of the LM5056/LM5056A under host control. This command is accessed with the PMBus read and write byte protocol. Table 28. MFR_DEVICE_SETUP Byte Format BIT NAME DEFAULT 7:5 Not supported, always 0 0 4 Current sense gain (Default) 0 = High setting (54.4mV) 3 Not supported, always 0 1 = Low setting (27.0mV) 0 (Default) 0 = Use pin settings 2 Current sense gain select configuration 1 Unused 0 0 Unused 0 1 = Use SMBus settings In order to configure the current sense gain via this register, it is necessary to set the Current Sense Gain Select Configuration bit (2) to 1 to enable the register to control the current sense gain and the Current Sense Gain bit (4) to select the desired setting. If the Current Sense Gain Select Configuration bit is not set, the pin setting is used. NOTE If the Current Sense Gain Select Configuration is changed, the samples for the telemetry averaging function will not be reset. It is recommended to allow a full averaging update period with the new Current Sense Gain before processing the averaged data. The Current Sense Gain Select Configuration affects the coefficients used for the current and power measurements and warning registers. Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 29 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com MFR_SPECIFIC_10: MFR_BLOCK_READ (DAh) The MFR_BLOCK_READ command concatenates the MFR_DIAGNOSTIC_WORD with input and output telemetry information (IIN, VOUT, VIN, PIN) as well as TEMPERATURE to capture all of the operating information of the LM5056/LM5056A in a single SMBus transaction. The block is 12 bytes long with telemetry information being sent out in the same manner as if an individual READ_XXX command had been issued (shown below). The contents of the MFR_BLOCK_READ register are updated every clock cycle (85 ns) as long as the SMBus interface is idle. MFR_BLOCK_READ also ensures that the VIN, VOUT, IIN and PIN measurements are all time-aligned. If separate commands are used, individual samples may not be time-aligned, because of the delay necessary for the communication protocol. The MFR_BLOCK_READ command is read via the PMBus block read protocol. Table 29. MFR_BLOCK_READ Register Format 30 BYTE COUNT (ALWAYS 12) (1 BYTE) MFR_DIAGNOSTIC_WORD (1 Word) IIN_BLOCK (1 Word) VOUT_BLOCK (1 Word) VIN_BLOCK (1 Word) PIN_BLOCK (1 Word) TEMP_BLOCK (1 Word) Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 MFR_SPECIFIC_11: MFR_SAMPLES_FOR_AVG (DBh) The MFR_SAMPLES_FOR_AVG command is a manufacturer specific command for setting the number of samples used in computing the average values for IIN, VIN, VOUT, PIN. The decimal equivalent of the AVGN nibble is the power of two samples, (e.g. AVGN = 12 equates to N = 4096 samples used in computing the average). The LM5056/LM5056A supports average numbers of 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096. The MFR_SAMPLES_FOR_AVG number applies to average values of IIN, VIN, VOUT, PIN simultaneously. The LM5056/LM5056A uses simple averaging. This is accomplished by summing consecutive results up to the number programmed, then dividing by the number of samples. Averaging is calculated according to the following sequence: Y= (X (N) + X (N - 1) + ... + X (0 )) N (2) When the averaging has reached the end of a sequence (for example, 4096 samples are averaged), then a whole new sequence begins that requires the same number of samples (in this example, 4096) to be taken before the new average is ready. Table 30. MFR_SAMPLES_FOR_AVG Register AVGN N = 2AVGN AVERAGING AND REGISTER UPDATE PERIOD (ms) 0000 1 1 0001 2 2 0010 4 4 0011 8 8 0100 16 16 0101 32 32 0110 64 64 0111 128 128 1000 256 256 1001 512 512 1010 1024 1024 1011 2048 2048 1100 4096 4096 NOTE A change in the MFR_SAMPLES_FOR_AVG register are not reflected in the average telemetry measurements until the present averaging interval has completed. The default setting for AVGN is 0000, therefore, the average telemetry mirrors the instantaneous telemetry until a value higher than zero is programmed. The MFR_SAMPLES_FOR_AVG register is accessed via the PMBus read and write byte protocol. Table 31. MFR_SAMPLES_FOR_AVG Register VALUE MEANING DEFAULT 0h – 0Ch Exponent (AVGN) for number of samples to average over 00h Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 31 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com MFR_SPECIFIC_12: MFR_READ_AVG_VIN (DCh) The MFR_READ_AVG_VIN command will report the 12-bit ADC measured input average voltage. If the data is not ready, the returned value is the previous averaged data. However, if there is no previously averaged data, the default value (0000h) is returned. This data is read with the PMBus Read Word protocol. This register should use the coefficients shown in the Table 39. Table 32. MFR_READ_AVG_VIN Register VALUE MEANING DEFAULT 0h – 0FFFh Average of measured values for input voltage 0000h MFR_SPECIFIC_13: MFR_READ_AVG_VOUT (DDh) The MFR_READ_AVG_VOUT command reports the 12-bit ADC measured current sense average voltage. The returned value is the default value (0000h) or previous data when the average data is not ready. This data is read with the PMBus Read Word protocol. This register should use the coefficients shown in the Table 39. Table 33. MFR_READ_AVG_VOUT Register VALUE MEANING DEFAULT 0h – 0FFFh Average of measured values for output voltage 0000h MFR_SPECIFIC_14: MFR_READ_AVG_IIN (DEh) The MFR_READ_AVG_IIN command reports the 12-bit ADC measured current sense average voltage. The returned value is the default value (0000h) or previous data when the average data is not ready. This data is read with the PMBus Read Word protocol. This register should use the coefficients shown in the Table 39. Table 34. MFR_READ_AVG_IIN Register VALUE MEANING DEFAULT 0h – 0FFFh Average of measured values for current sense voltage 0000h MFR_SPECIFIC_15: MFR_READ_AVG_PIN The MFR_READ_AVG_PIN command reports the upper 12-bits of the average VIN x IIN product as measured by the 12-bit ADC. Read the default value (0000h) or previous data when the average data is not ready. This data is read with the PMBus Read Word protocol. This register should use the coefficients shown in the Table 39. Table 35. TABLE 35. MFR_READ_AVG_PIN Register VALUE MEANING DEFAULT 0h – 0FFFh Average of measured value for input voltage x input current sense voltage 0000h MFR_SPECIFIC_16: MFR_BLACK_BOX_READ (E0h) The MFR_BLACK_BOX_READ command retrieves the MFR_BLOCK_READ data which was latched in at the first assertion of SMBA by the LM5056/LM5056A. It is re-armed with the CLEAR_FAULTS command. It is the same format as the MFR_BLOCK_READ registers, the only difference being that its contents are updated with the SMBA edge rather than the internal clock edge. This command is read with the PMBus Block Read protocol. 32 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 MFR_SPECIFIC_17: MFR_READ_DIAGNOSTIC_WORD (E1h) The MFR_READ_DIAGNOSTIC_WORD PMBus command reports all of the LM5056/LM5056A faults and warnings in a single read operation. The standard response to the assertion of the SMBA signal of issuing multiple read requests to various status registers can be replaced by a single word read to the MFR_DIAGNOSTIC_WORD register. The MFR_READ_DIAGNOSTIC_WORD command should be read with the PMBus Read Word protocol. The MFR_READ_DIAGNOSTIC_WORD is also returned in the MFR_BLOCK_READ, MFR_BLACK_BOX_READ, and MFR_AVG_BLOCK_READ operations. Table 36. MFR_DIAGNOSTIC_WORD Format BIT MEANING DEFAULT 15 VOUT under-voltage warn 0 14 Over-current warn or over-power warn 0 13 VIN under-votlage warn 0 12 VIN over-voltage warn 0 11 Not supported, always 1 1 10 Over-temperature warn 0 9 Not supported, always 0 0 8 Not supported, always 0 0 7 CONFIG_PRESET 1 6 Not supported, always 0 0 5 Not supported, always 0 0 4 Not supported, always 0 0 3 Not supported, always 0 0 2 Not supported, always 0 0 1 CML_FAULT 0 0 Not supported, always 0 0 MFR_SPECIFIC_18: MFR_AVG_BLOCK_READ (E2h) The MFR_AVG_BLOCK_READ command concatenates the MFR_DIAGNOSTIC_WORD with input and output average telemetry information (IIN, VOUT, VIN, PIN) as well as temperature to capture all of the operating information of the part in a single PMBus transaction. The block is 12 bytes long with telemetry information being sent out in the same manner as if an individual READ_AVG_XXX command had been issued (shown below). MFR_AVG_BLOCK_READ also ensures that the VIN, VOUT, and IIN measurements are all time-aligned whereas there is a chance they may not be if read with individual PMBus commands. To read data from the MFR_AVG_BLOCK_READ command, use the SMBus Block Read protocol. Table 37. MFR_AVG_BLOCK_READ Register Format BYTE COUNT (ALWAYS 12) (1 BYTE) MFR_DIAGNOSTIC_WORD (1 word) AVG_IIN (1 word) AVG_VOUT (1 word) AVG_VIN (1 word) AVG_PIN (1 word) TEMPERATURE (1 word) Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 33 34 DIODE VAUX +48V + MFR_R EAD _AVG_PIN DFh MFR _READ_AVG_VOU T DDh MFR_READ_ PIN D2 h READ_ VOUT 8Bh Submit Documentation Feedback Product Folder Links: LM5056 LM5056A PEA K-HOLD OT_FAULT_LIMIT 4Fh OT_WARNING_LIMIT 5 1h VOU T_ UV_WAR N_LIMIT 58h MFR _PIN _OP_ WARN _LIMIT D 4h MFR_ IIN_OC_ WARN_ LIMIT D 3h VIN_ UV_WAR N_LIMIT 58h VIN_OV_WARN_L IMIT 57h WARNING LIMITS PMBus Interface MFR_CL EAR_PIN_PEAK D 6h MFR _READ_PIN_PEAK D5h AVERAGED DATA MFR_READ _AVG_IIN DEh MFR_READ _IIN D1h READ_TEMPER ATUR E_ 1 8Dh MFR _READ_ AVG_VIN DCh ADC READ_VIN 88h MUX VOUT MFR_SAMPLES_FOR_ AVG DBh VIN IIN S/H VOUT SENSE MFR_READ _VAUX D 0h DATA OUTPUT VIN VIN_K To load CM P CMP CMP CMP CM P CMP CMP MFR_ DIAGNOSTIC_WORD_R EAD E1h OVER -TEMP FAULT STATUS_TEMPERATU RE 7 Dh OVER-TEMP WARN STATUS_ TEMPERATURE 7Dh VOUT UV WARN STATUS_VOUT 7Ah PIN OP WARN STATUS_INPUT 7 Ch IIN OC WARN STATUS_INPUT 7 Ch VIN U V WARN STATUS_INPUT 7Ch VIN OV WARN STATUS_INPUT 7 Ch WARNING SYSTEM LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com Figure 18. Command, Register and Alert Flow Diagram Copyright © 2012–2013, Texas Instruments Incorporated LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 Reading and Writing Telemetry Data and Warning Thresholds All measured telemetry data and user programmed warning thresholds are communicated in 12-bit two’s compliment binary numbers read and written in 2-byte increments conforming to the direct format as described in section 8.3.3 of the PMBus Power System Management Protocol Specification 1.1 (Part II). The organization of the bits in the telemetry or warning word is shown in Table 38, where Bit_11 is the most significant bit (MSB) and Bit_0 is the least significant bit (LSB). The decimal equivalent of all warning and telemetry words are constrained to be within the range of 0 to 4095, with the exception of temperature. The decimal equivalent value of the temperature word ranges from 0 to 65535. Table 38. Telemetry and Warning Word Format BYTE B7 B6 B5 B4 1 Bit_7 Bit_6 Bit_5 Bit_4 2 0 0 0 0 B3 B2 B1 B0 Bit_3 Bit_2 Bit_1 Bit_0 Bit_11 Bit_10 Bit_9 Bit_8 Conversion from direct format to real-world dimensions of current, voltage, power, and temperature is accomplished by determining appropriate coefficients as described in section 7.2.1 of the PMBus Power System Management Protocol Specification 1.1 (Part II). According to this specification, the host system converts the values received into a reading of volts, amperes, watts, or other units using the following relationship: 1 X= Y ´ 10-R - B m ( ) where • • • • • X: the calculated real-world value (volts, amps, watt, etc.) m: the slope coefficient Y: a two byte two's complement integer received from device b: the offset, a two byte, two's complement integer R: the exponent, a one byte two's complement integer (3) R is only necessary in systems where m is required to be an integer (for example, where m may be stored in a register in an integrated circuit). In those cases, R only needs to be large enough to yield the desired accuracy. Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 35 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com Table 39. Telemetry and Warning Conversion Coefficients FORMAT NUMBER OF DATA BYTES m b R UNITS READ_VIN MFR_READ_AVG_VIN VIN_OV_WARN_LIMIT VIN_UV_WARN_LIMIT DIRECT 2 4612 -566 -2 V READ_VOUT MFR_READ_AVG_VOUT VOUT_UV_WARN_LIMIT DIRECT 2 4607 179 -2 V MFR_READ_VAUX DIRECT 2 13801 11 -1 V COMMANDS CONDITION (1) MFR_READ_IIN MFR_READ_AVG_IIN MFR_IIN_OC_WARN_LIMIT CL = VDD DIRECT 2 14985 4271 -2 A (1) MFR_READ_IIN MFR_READ_AVG_IIN MFR_IIN_OC_WARN_LIMIT CL = GND DIRECT 2 7471 1949 -2 A (1) MFR_READ_PIN MFR_READ_AVG_PIN MFR_READ_PIN_PEAK MFR_PIN_OP_WARN_LIMIT CL = VDD DIRECT 2 1684 22344 -3 W CL = GND DIRECT 2 839 9822 -3 W DIRECT 2 16000 0 -3 °C (1) MFR_READ_PIN MFR_READ_AVG_PIN MFR_READ_PIN_PEAK MFR_PIN_OP_WARN_LIMIT READ_TEMPERATURE_1 OT_WARN_LIMIT OT_FAULT_LIMIT (1) The coefficients relating to current/power measurements and warning thresholds shown in Table 39 are normalized to a sense resistor (RS) value of 1mΩ. In general, the current/power coefficients can be calculated using the relationships shown in Table 40. Table 40. Current and Power Telemetry and Warning Conversion Coefficients (RS in mΩ) CONDITION FORMAT NUMBER OF DATA BYTES m b R UNITS MFR_READ_IIN MFR_READ_AVG_IIN MFR_IIN_OC_WARN_LIMIT CL = VDD DIRECT 2 14985x RS 4271 -2 A MFR_READ_IIN MFR_READ_AVG_IIN MFR_IIN_OC_WARN_LIMIT CL = GND DIRECT 2 7471 x RS 1949 -2 A MFR_READ_PIN MFR_READ_AVG_PIN MFR_READ_PIN_PEAK MFR_PIN_OP_WARN_LIMIT CL = VDD DIRECT 2 1684x RS 22344 -3 W MFR_READ_PIN MFR_READ_AVG_PIN MFR_READ_PIN_PEAK MFR_PIN_OP_WARN_LIMIT CL = GND DIRECT 2 839x RS 9822 -3 W COMMANDS Care must be taken to adjust the exponent coefficient, R, such that the value of m remains within the range of 32768 to 32767. For example, if a 5-mΩ sense resistor (RS) is used, the correct coefficients for the READ_IIN command with CL = VDD would be m = 3736, b = 195, R = -1. Note: The power coefficients given in Table 39 are characterized at a specific operating point of 48-V VIN. If high-power accuracy is desired at voltages other than 48 V, it is recommended to read VIN and IIN using the MFR_BLOCK_READ (DAh) command. After finding the real-world value of VIN and IIN using the coefficients, the power can simply be calculated by the multiplication of the two measurements. This will ensure the user obtains the highest accuracy power measurement. Another method to ensure accurate telemetry is to find new coefficients for your specfic application. This is outlined in the proceeding section. 36 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 Determining Telemetry Coefficients Empirically with Linear Fit The coefficients for telemetry measurements and warning thresholds presented in Table 39 are adequate for the majority of applications. Current and power coefficients must be calculated per application as they are dependent on the value of the sense resistor, RS, used. Table 40 provides the equations necessary for calculating the current and power coefficients for the general case. The small signal nature of the current measurement make it and the power measurement more susceptible to PCB parasitics than other telemetry channels. This may cause slight variations in the optimum coefficients (m, b, R) for converting from Direct format digital values to real-world values (e.g., Amps and Watts). The optimum coefficients can be determined empirically for a specific application and PCB layout using two or more measurements of the telemetry channel of interest. The current coefficients can be determined using the following method: 1. While the LM5056/LM5056A is in normal operation measure the voltage across the sense resistor using Kelvin test points and a high accuracy DVM while controlling the load current. Record the integer value returned by the MFR_READ_AVG_IIN command (with the MFR_SAMPLES_FOR_AVG set to a value greater than 0) for two or more voltages across the sense resistor. For best results, the individual MFR_READ_AVG_IIN measurements should span nearly the full scale range of the current (For example, voltage across RS of 5 mV and 20 mV). 2. Convert the measured voltages to currents by dividing them by the value of RS. For best accuracy the value of RS should be measured. Table 41 assumes a sense resistor value of 5 mΩ. Table 41. Measurements for Linear Fit Determination of Current Coefficients MEASURED VOLTAGE ACROSS RS (V) MEASURED CURRENT (A) READ_AVG_IIN (integer value) 0.005 1 568 0.01 2 1108 0.02 4 2185 3. Using the spreadsheet or math program of your choice determine the slope and the y-intercept of the data returned by the READ_AVG_IIN command versus the measured current. For the data shown in Table 41: – READ_AVG_IN value = slope x (Measured Current) + (y-intercept) – slope = 538.9 – y-intercept = 29.5 4. To determine the ‘m’ coefficient, simply shift the decimal point of the calculated slope to arrive at at integer with a suitable number of significant digits for accuracy (typically 4) while staying with the range of -32768 to +32767. This shift in the decimal point equates to the ‘R’ coefficient. For the slope value shown above, the decimal point would be shifted to the right once hence R = -1. 5. Once the ‘R’ coefficient has been determined, the ‘b’ coefficient is found by multiplying the y-intercept by 10R. In this case the value of b = 295. Calculated current coefficients: – m = 5389 – b = 295 – R = -1 1 X= Y ´ 10-R - b m ( ) where • • • • • X: the calculated real-world value (volts, amps, watts, temperature) m: the slope coefficient, is the two byte, two's complement integer Y: a two byte two's complement integer received from device b: the offset, a two byte, two's complement integer R: the exponent, a one byte two's complement integer (4) The above procedure can be repeated to determine the coefficients of any telemetry channel simply by substituting measured current for some other parameter (e.g., power, voltage, etc.). Note that the above procedure can be executed using the PMBus software GUI found in the LM5056/LM5056A online product folder Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 37 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com Writing Telemetry Data There are several locations that require writing data if their optional usage is desired. Use the same coefficients previously calculated for your application, and apply them using this method as prescribed by the PMBus revision section 7.2.2 Sending a Value. Y = (mX + b )´ 10R where • • • • • X: the calculated real-world value (volts, amps, watts, temperature) m: the slope coefficient, is the two byte, two's complement integer Y: a two byte two's complement integer received from device b: the offset, a two byte, two's complement integer R: the exponent, a one byte two's complement integer (5) PMBus™ Address Lines (ADR0, ADR1, ADR2) The three address lines are to be set high (connect to VDD), low (connect to GND), or open to select one of 27 addresses for communicating with the LM5056/LM5056A. Table 42 depicts 7-bit addresses (eighth bit is read and write bit): Table 42. Device Addressing 38 ADR2 ADR1 ADR0 DECODED ADDRESS Z Z Z 40h Z Z 0 41h Z Z 1 42h Z 0 Z 43h Z 0 0 44h Z 0 1 45h Z 1 Z 46h Z 1 0 47h Z 1 1 10h 0 Z Z 11h 0 Z 0 12h 0 Z 1 13h 0 0 Z 14h 0 0 0 15h 0 0 1 16h 0 1 Z 17h 0 1 0 53h 0 1 1 53h 1 Z Z 53h 1 Z 0 53h 1 Z 1 54h 1 0 Z 56h 1 0 0 56h 1 0 1 57h 1 1 Z 58h 1 1 0 59h 1 1 1 5Ah Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A LM5056, LM5056A www.ti.com SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 tR SCL tF t LOW VIH V IL tHIGH tHD;DAT tHD;STA tSU;STA tSU;STO t SU;DAT SDA VIH VIL tBUF P S S P Figure 19. SMBus Timing Diagram Table 43. SMBus Timing Definition SYMBOL PARAMETER LIMITS MIN MAX 400 FSMB SMBus operating frequency 10 TBUF Bus free time between stop and start condition 1.3 THD:STA Hold time after (repeated) start condition. After this period, the first clock is generated. 0.6 TSU:STA Repeated start condition setup time 0.6 TSU:STO Stop condition setup time 0.6 THD:DAT Data hold time 85 TSU:DAT Data setup time 100 ns 25 TLOW Clock low period 1.5 THIGH Clock high period (2) 0.6 TLOW:SEXT Clock high period (3) 25 TLOW:MEXT Cumulative low extend time (master device) (4) 10 TF TR (1) (2) (3) (4) (5) Clock or data fall time (5) Clock or data rise time (5) kHz μs Clock low time-out (1) TTIMEOUT UNITS 35 ms μs 20 300 20 300 ms ns Devices participating in a transfer will timeout when any clock low exceeds the value of TTIMEOUT,MIN of 25 ms. Devices that have detected a timeout condition must reset the communication no later than TTIMEOUT,MAX of 35 ms. The maximum value must be adhered to by both a master and a slave as it incorporates the cumulative stretch limit for both a master (10 ms) and a slave (25 ms). THIGH MAX provides a simple method for devices to detect bus idle conditions. TLOW:SEXT is the cumulative time a slave device is allowed to extend the clock cycles in one message from the initial start to the stop. If a slave exceeds this time, it is expected to release both its clock and data lines and reset itself. TLOW:MEXT is the cumulative time a master device is allowed to extend its clock cycles within each byte of a message as defined from start-to-ack, ackto- ack, or ack-to-stop. Rise and fall time is defined as follows: (a) TR = (VILMAX – 0.15) to (VIHMIN + 0.15) (b) TF = 0.9 VDD to (VILMAX – 0.15) Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A 39 LM5056, LM5056A SNVS827A – OCTOBER 2012 – REVISED APRIL 2013 www.ti.com SMBA Response The SMBA effectively has two masks: 1. The Alert Mask Register at D8h, and 2. The ARA Automatic Mask. The ARA Automatic Mask is a mask that is set in response to a successful ARA read. An ARA read operation returns the PMBus address of the lowest addressed part on the bus that has its SMBA asserted. A successful ARA read means that THIS part was the one that returned its address. When a part responds to the ARA read, it releases the SMBA signal. When the last part on the bus that has an SMBA set has successfully reported its address, the SMBA signal de-asserts. The way that the LM5056/LM5056A releases the SMBA signal is by setting the ARA Automatic mask bit for all fault conditions present at the time of the ARA read. All status registers still show the fault condition, but it is not generated and SMBA on that fault again until the ARA Automatic mask is cleared by the host issuing a CLEAR_FAULTS command to this part. This should be done as a routine part of servicing an SMBA condition on a part, even if the ARA read is not done. Figure 20 depicts a schematic version of this flow. From other fault inputs SMBA Fault Condition Alert Mask D8h From PMBus Set ARA Operation Flag Succeeded Clear_Fault Command Received ARA Auto Mask Clear Figure 20. Typical Flow Schematic for SMBA Fault 40 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: LM5056 LM5056A PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) (3) Device Marking (4/5) (6) LM5056APMH/NOPB ACTIVE HTSSOP PWP 28 48 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM5056APMH LM5056APMHE/NOPB ACTIVE HTSSOP PWP 28 250 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM5056APMH LM5056APMHX/NOPB ACTIVE HTSSOP PWP 28 2500 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM5056APMH LM5056PMH/NOPB ACTIVE HTSSOP PWP 28 48 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM5056PMH LM5056PMHE/NOPB ACTIVE HTSSOP PWP 28 250 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM5056PMH LM5056PMHX/NOPB ACTIVE HTSSOP PWP 28 2500 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM5056PMH (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
LM5056APMHE/NOPB 价格&库存

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LM5056APMHE/NOPB
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    LM5056APMHE/NOPB
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    • 1+69.747961+8.65404
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