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LM78L05, LM78L09
LM78L12, LM78L15, LM78L62
SNVS754K – JANUARY 2000 – REVISED DECEMBER 2016
LM78Lxx 100-mA Fixed Output Linear Regulator
1 Features
3 Description
•
•
The LM78Lxx series of three terminal positive
regulators is available with several fixed output
voltages, making them useful in a wide range of
applications. Used as a Zener-diode and resistor
combination replacement, the LM78Lxx usually
provides an effective output impedance improvement
of two orders of magnitude and lower quiescent
current. These regulators can provide local, on-card
regulation,
eliminating
distribution
problems
associated with single-point regulation. The available
voltages allow the LM78Lxx to be used in logic
systems, instrumentation, HiFi, and other solid-state
electronic equipment.
1
•
•
•
•
•
•
•
•
Input Voltage up to 30 V
Output Voltage Tolerances of ±5% Over the
Temperature Range
Available Output Voltages: 5 V, 6.2 V, 8.2 V, 9 V,
12 V, and 15 V
Output Current of 100 mA
Output Transistor Safe Area Protection
Internal Thermal Overload Protection
Internal Short-Circuit Current Limit
No External Components
Available in Tiny DSBGA Package
Available in 3-Pin TO-92 and 8-Pin SOIC Low
Profile Packages
2 Applications
•
•
•
•
Battery Chargers
Portable Instrumentation
LED Lighting
Low Wattage Power Supplies
Package Options
See AN-1112 DSBGA Wafer Level Chip Scale
Package (SNVA009) for DSBGA Considerations. For
more information on the TO-92 package, see TO-92
Packing Options / Ordering Instructions (SNOA072).
DSBGA
8-Pin
1
The LM78Lxx is available in the plastic TO-92 (LP)
package, the SOIC (D) package, and a chip-sized
package (8-Bump DSBGA) using TI's DSBGA
package technology. With adequate heat sinking, the
regulator can deliver 100-mA output current. Current
limiting is included to limit the peak output current to
a safe value. Safe area protection for the output
transistors is provided to limit internal power
dissipation. If internal power dissipation is too high for
the heat sinking provided, the thermal shutdown
circuit prevents the IC from overheating.
Device Information(1)
3
2
PART NUMBER
1
LM78L05, LM78L09
SOIC
8-Pin
TO-92
3-Pin
Not to scale
1
PACKAGE
DSBGA (8)
BODY SIZE (NOM)
1.30 mm × 1.30 mm
LM78L05, LM78L12,
SOIC (8)
LM78L15
3.90 mm × 4.90 mm
LM78L05, LM78L12,
TO-92 (3)
LM78L15, LM78L62
3.70 mm × 4.70 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Fixed Output Regulator Circuit
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM78L05, LM78L09
LM78L12, LM78L15, LM78L62
SNVS754K – JANUARY 2000 – REVISED DECEMBER 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
4
4
4
4
5
5
6
6
7
8
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics — LM78L05 ......................
Electrical Characteristics — LM78L09 ......................
Electrical Characteristics — LM78L12 ......................
Electrical Characteristics — LM78L15 ......................
Electrical Characteristics — LM78L62 ......................
Typical Characteristics ............................................
Detailed Description ............................................ 10
7.1 Overview ................................................................. 10
7.2 Functional Block Diagram ....................................... 10
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 11
8
Application and Implementation ........................ 12
8.1 Application Information............................................ 12
8.2 Typical Applications ................................................ 12
9 Power Supply Recommendations...................... 16
10 Layout................................................................... 16
10.1 Layout Guidelines ................................................. 16
10.2 Layout Example .................................................... 16
11 Device and Documentation Support ................. 17
11.1
11.2
11.3
11.4
11.5
11.6
11.7
Documentation Support ........................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
17
17
17
17
17
17
17
12 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision J (December 2013) to Revision K
Page
•
Added Applications section, Device Information table, Pin Configuration and Functions section, ESD Ratings table,
Recommended Operating Conditions table, Detailed Description section, Application and Implementation section,
Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
•
Deleted LM78L82 from the data sheet ................................................................................................................................... 1
•
Added Thermal Information table. .......................................................................................................................................... 1
•
Deleted Lead temperature (soldering) information ................................................................................................................. 4
•
Changed RθJA values for D (SOIC) From: 180 To: 128.8, LP (TO-92) from 230 to 158.7, and YPB (DSBGA) From:
230.9 To 108.4 ....................................................................................................................................................................... 4
•
Changed RθJC values for LP (TO-92) From: 60 To 75.2......................................................................................................... 4
Changes from Revision I (April 2013) to Revision J
•
2
Page
Added the AI suffix ................................................................................................................................................................. 5
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SNVS754K – JANUARY 2000 – REVISED DECEMBER 2016
5 Pin Configuration and Functions
YPB Package
8-Pin DSBGA
Top View
A
3
2
D Package
8-Pin SOIC
Top View
B
VOUT
C
NC
VOUT
1
8
VIN
GND
2
7
GND
GND
3
6
GND
NC
4
5
NC
GND
VOUT
GND
Not to scale
1
VIN
VIN
NC
Not to scale
LP Package
3-Pin TO-92
Bottom View
3
VIN
2
GND
1
VOUT
Not to scale
Pin Functions
PIN
TO-92
I/O
DESCRIPTION
NAME
DSBGA
SOIC
GND
C2, C3
2, 3, 6, 7
2
—
Ground
NC
B3, C1
4, 5
—
—
No connection
VIN
A1, B1
8
3
I
Input supply voltage pin
VOUT
A2, A3
1
1
O
Output voltage pin
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LM78L05, LM78L09
LM78L12, LM78L15, LM78L62
SNVS754K – JANUARY 2000 – REVISED DECEMBER 2016
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN
MAX
UNIT
35
V
Input voltage
Power dissipation
Internally limited
Operating junction temperature, TJ
LM78LxxACZ (TO-92)
0
125
LM78LxxACM (SOIC)
0
125
LM78LxxAIM (SOIC)
–40
125
LM78LxxITP (thin DSBGA)
–40
85
–65
150
Storage temperature, Tstg
(1)
(2)
°C
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
6.2 ESD Ratings
V(ESD)
(1)
Electrostatic discharge
Human-body model (HBM),
VALUE
UNIT
±1000
V
(1)
Human body model, 1.5 kΩ in series with 100 pF.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
Input voltage
Continuous output current
LM78LxxACZ (TO-92)
TJ
LM78LxxACM (SOIC)
Junction temperature
MAX
UNIT
30
V
100
mA
0
125
0
125
LM78LxxAIM (SOIC)
–40
125
LM78LxxITP (DSBGA)
–40
85
°C
6.4 Thermal Information
LM78Lxx
THERMAL METRIC
(1)
D (SOIC)
LP (TO-92)
YPB (DSBGA)
8 PINS
3 PINS
8 PINS
UNIT
128.8
158.7
108.4
°C/W
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
Junction-to-case (top) thermal resistance
76
75.2
1.3
°C/W
RθJB
Junction-to-board thermal resistance
69.3
n/a
31.4
°C/W
ψJT
Junction-to-top characterization parameter
26.3
30.2
4.5
°C/W
ψJB
Junction-to-board characterization parameter
68.8
138.2
31.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
—
—
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SNVS754K – JANUARY 2000 – REVISED DECEMBER 2016
6.5 Electrical Characteristics — LM78L05
Typical values apply for TJ = 25°C, Minimum and Maximum limits apply for the entire operating temperature range of the
package (1) (2), IO = 40 mA, CI = 0.33 µF, CO = 0.1 µF, VIN = 10 V (unless otherwise noted).
PARAMETER
TEST CONDITIONS
TJ = 25°C
VO
Output voltage
Line regulation
ΔVO
Load regulation
IQ
Quiescent current
ΔIQ
Quiescent current change
Vn
Output noise voltage
MIN
TYP
MAX
4.8
5
5.2
VIN = 7 V to 20 V, IO = 1 mA to 40 mA (3)
4.75
5.25
IO = 1 mA to 70 mA (3)
4.75
5.25
VIN = 7 V to 20 V, TJ = 25°C
18
75
VIN = 8 V to 20 V, TJ = 25°C
10
54
IO = 1 mA to 100 mA, TJ = 25°C
20
60
IO = 1 mA to 40 mA, TJ = 25°C
5
30
TJ = 25°C
3
5
VIN = 8 V to 20 V
f = 120 Hz, VIN = 8 V to 16 V, TJ = 25°C
mV
mA
mA
0.1
40
47
µV
62
dB
140
mA
IPK
Peak output current
ΔVO/ΔT
Average output voltage temperature
coefficient
IO = 5 mA
–0.65
VIN(MIN)
Minimum value of input voltage
required to maintain line regulation
TJ = 25°C
6.7
(1)
(2)
(3)
(4)
V
1
IO = 1 mA to 40 mA
f = 10 Hz to 100 kHz (4)
ΔVIN/ΔVO Ripple rejection
UNIT
mV/°C
7
V
For the operating ranges of each package, see Absolute Maximum Ratings.
Limits are ensured by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods.
Power dissipation ≤ 0.75 W.
Recommended minimum load capacitance of 0.01 µF to limit high-frequency noise.
6.6 Electrical Characteristics — LM78L09
Typical values apply for TJ = 25°C, Minimum and Maximum limits apply for the entire operating temperature range of the
package (1) (2), IO = 40 mA, CI = 0.33 µF, CO = 0.1 µF, VIN = 15 V (unless otherwise noted).
PARAMETER
VO
TEST CONDITIONS
Output voltage
ΔVO
Load regulation
Quiescent current
MAX
TJ = 25°C
8.64
9
9.36
VIN = 11.5 V to 24 V, IO = 1 mA to 40 mA (3)
8.55
9.45
IO = 1 mA to 70 mA (3)
8.55
9.45
100
200
VIN = 13 V to 24 V, TJ = 25°C
90
150
IO = 1 mA to 100 mA, TJ = 25°C
20
90
IO = 1 mA to 40 mA, TJ = 25°C
10
45
2
5.5
TJ = 25°C
ΔIQ
Quiescent current change
Vn
Output noise voltage
VIN = 11.5 V to 24 V
1.5
IO = 1 mA to 40 mA
0.1
70
ΔVIN/ΔVO Ripple rejection
f = 120 Hz, VIN = 15 V to 25 V, TJ = 25°C
IPK
Peak output current
ΔVO/ΔT
Average output voltage temperature
coefficient
VIN(MIN)
Minimum value of input voltage
required to maintain line regulation
(1)
(2)
(3)
TYP
VIN = 11.5 V to 24 V, TJ = 25°C
Line regulation
IQ
MIN
38
IO = 5 mA
UNIT
V
mV
mA
mA
µV
44
dB
140
mA
–0.9
mV/°C
10.7
V
For the operating ranges of each package, see Absolute Maximum Ratings.
Limits are ensured by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods.
Power dissipation ≤ 0.75 W.
Copyright © 2000–2016, Texas Instruments Incorporated
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SNVS754K – JANUARY 2000 – REVISED DECEMBER 2016
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6.7 Electrical Characteristics — LM78L12
Typical values apply for TJ = 25°C, Minimum and Maximum limits apply for the entire operating temperature range of the
package (1) (2), IO = 40 mA, CI = 0.33 µF, CO = 0.1 µF, VIN = 19 V (unless otherwise noted).
PARAMETER
VO
TEST CONDITIONS
Output voltage
Line regulation
ΔVO
Load regulation
IQ
Quiescent current
ΔIQ
Quiescent current change
Vn
Output noise voltage
TYP
MAX
11.5
12
12.5
VIN = 14.5 V to 27 V, IO = 1 mA to 40 mA (3)
11.4
12.6
IO = 1 mA to 70 mA (3)
11.4
12.6
VIN = 14.5 V to 27 V, TJ = 25°C
30
180
VIN = 16 V to 27 V, TJ = 25°C
20
110
IO = 1 mA to 100 mA, TJ = 25°C
30
100
IO = 1 mA to 40 mA, TJ = 25°C
10
50
3
5
TJ = 25°C
VIN = 16 V to 27 V
UNIT
V
mV
mA
1
IO = 1 mA to 40 mA
mA
0.1
80
ΔVIN/ΔVO Ripple rejection
f = 120 Hz, VIN = 15 V to 25 V, TJ = 25°C
IPK
Peak output current
ΔVO/ΔT
Average output voltage temperature
coefficient
VIN(MIN)
Minimum value of input voltage
required to maintain line regulation
(1)
(2)
(3)
MIN
TJ = 25°C
40
µV
54
dB
140
mA
IO = 5 mA
–1
mV/°C
TJ = 25°C
13.7
14.5
V
For the operating ranges of each package, see Absolute Maximum Ratings.
Limits are ensured by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods.
Power dissipation ≤ 0.75 W.
6.8 Electrical Characteristics — LM78L15
Typical values apply for TJ = 25°C, Minimum and Maximum limits apply for the entire operating temperature range of the
package (1) (2), IO = 40 mA, CI = 0.33 µF, CO = 0.1 µF, VIN = 23 V (unless otherwise noted).
PARAMETER
TEST CONDITIONS
TJ = 25°C
VO
Output voltage
Line regulation
ΔVO
Load regulation
IQ
Quiescent current
ΔIQ
Quiescent current change
Vn
Output noise voltage
MAX
15
15.6
VIN = 17.5 V to 30 V, IO = 1 mA to 40 mA (3)
14.25
15.75
IO = 1 mA to 70 mA (3)
14.25
15.75
VIN = 17.5 V to 30 V, TJ = 25°C
37
250
VIN = 20 V to 30 V, TJ = 25°C
25
140
IO = 1 mA to 100 mA, TJ = 25°C
35
150
IO = 1 mA to 40 mA, TJ = 25°C
12
75
3
5
VIN =20 V to 30 V
1
IO = 1 mA to 40 mA
0.1
90
f = 120 Hz, VIN = 18.5 V to 28.5 V, TJ = 25°C
IPK
Peak output current
ΔVO/ΔT
Average output voltage temperature
coefficient
VIN(MIN)
Minimum value of input voltage
required to maintain line regulation
6
TYP
TJ = 25°C
ΔVIN/ΔVO Ripple rejection
(1)
(2)
(3)
MIN
14.4
37
UNIT
V
mV
mA
mA
µV
51
dB
140
mA
IO = 5 mA
–1.3
mV/°C
TJ = 25°C
16.7
17.5
V
For the operating ranges of each package, see Absolute Maximum Ratings.
Limits are ensured by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods.
Power dissipation ≤ 0.75 W.
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SNVS754K – JANUARY 2000 – REVISED DECEMBER 2016
6.9 Electrical Characteristics — LM78L62
Typical values apply for TJ = 25°C, Minimum and Maximum limits apply for the entire operating temperature range of the
package (1) (2), IO = 40 mA, CI = 0.33 µF, CO = 0.1 µF, VIN = 12 V (unless otherwise noted).
PARAMETER
TEST CONDITIONS
TJ = 25°C
VO
Output voltage
Line regulation
ΔVO
Load regulation
IQ
Quiescent current
ΔIQ
Quiescent current change
Vn
Output noise voltage
TYP
MAX
6.2
6.45
VIN = 8.5 V to 20 V, IO = 1 mA to 40 mA (3)
5.9
6.5
IO = 1 mA to 70 mA (3)
5.9
6.5
VIN = 8.5 V to 20 V, TJ = 25°C
65
175
VIN = 9 V to 20 V, TJ = 25°C
55
125
IO = 1 mA to 100 mA, TJ = 25°C
13
80
IO = 1 mA to 40 mA, TJ = 25°C
6
40
TJ = 25°C
2
5.5
VIN = 8 V to 20 V
1.5
IO = 1 mA to 40 mA
0.1
f = 10 Hz to 100 kHz (4)
ΔVIN/ΔVO Ripple rejection
f = 120 Hz, VIN = 10 V to 20 V, TJ = 25°C
IPK
Peak output current
ΔVO/ΔT
Average output voltage temperature
coefficient
VIN(MIN)
Minimum value of input voltage
required to maintain line regulation
(1)
(2)
(3)
(4)
MIN
5.95
50
40
IO = 5 mA
UNIT
V
mV
mA
mA
µV
46
dB
140
mA
–0.75
7.9
mV/°C
V
For the operating ranges of each package, see Absolute Maximum Ratings.
Limits are ensured by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods.
Power dissipation ≤ 0.75 W.
Recommended minimum load capacitance of 0.01 µF to limit high-frequency noise.
Copyright © 2000–2016, Texas Instruments Incorporated
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6.10 Typical Characteristics
LP Package
8
Figure 1. Maximum Average Power Dissipation
Figure 2. Peak Output Current
Figure 3. Dropout Voltage
Figure 4. Ripple Rejection
Figure 5. Output Impedance
Figure 6. Quiescent Current
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SNVS754K – JANUARY 2000 – REVISED DECEMBER 2016
Typical Characteristics (continued)
Figure 7. Quiescent Current
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7 Detailed Description
7.1 Overview
The LM78Lxx series of positive regulators is available in the following fixed output voltages: 5 V, 6.2 V, 8.2 V, 9
V, 12 V, and 15 V. The regulator can be configured to an adjustable output by connecting the GND pin to the
center of a resistive voltage divider as shown in Figure 10. In this configuration, the fixed output voltage acts as
the reference voltage across R1 allowing the output to be adjusted by changing the resistor.
7.2 Functional Block Diagram
10
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SNVS754K – JANUARY 2000 – REVISED DECEMBER 2016
7.3 Feature Description
7.3.1 Load Regulation
These devices regulate the voltage between the VOUT and GND pins, and can be made adjustable by using a
resistive voltage divider. The output voltage tolerance is ±5% over temperature.
7.3.2 Protection
The LM78Lxx series of regulators has internal thermal overload protection that automatically shuts off the device
if the operating temperature becomes too high. There is also internal short-circuit current limit and output
transistor safe area protection that shuts down the device if the output current becomes too high.
7.4 Device Functional Modes
7.4.1 Normal Operation
The VOUT pin sources current necessary to set the voltage on VOUT at a fixed voltage above the GND pin. See
Specifications for VO of each device.
7.4.2 Shutdown
The device automatically shuts down if the output current or its internal temperature becomes too high.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
These devices are versatile and high-performance regulators with a wide temperature range and tight line and
load regulation. An input capacitor is required if the regulator is placed more than 3 inches from the power supply
filter. TI recommends a minimum load capacitance of 0.01 µF to limit high frequency.
8.2 Typical Applications
8.2.1 Fixed Output Regulator
*Required if the regulator is located more than 3 inches from the power supply filter.
**Recommended minimum load capacitance of 0.01 µF to limit high-frequency noise.
Figure 8. Fixed Output Regulator Circuit
8.2.1.1 Design Requirements
The device component count is very minimal. No external components are usually required. However, TI
recommends input or output capacitors depending on the distance between the device and the power supply and
if extra filtering is needed at the output.
The output voltage is set based on the selection of the two resistors (R1 and R2), as shown in Figure 14.
8.2.1.2 Detailed Design Procedure
8.2.1.2.1 Input Capacitor
An input capacitor is required if the regulator is placed more than 3 inches from the power supply filter. A 0.33-µF
capacitor on the input is suitable for most applications.
8.2.1.2.2 Output Capacitor
TI recommends a minimum load capacitance of 0.01 µF to limit high-frequency noise.
12
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SNVS754K – JANUARY 2000 – REVISED DECEMBER 2016
Typical Applications (continued)
8.2.1.3 Application Curve
Input - Output Differential (V)
1.9
1.8
1.7
1.6
1.5
1.4
1.3
25qC
1.2
0
20
40
60
Load Current (mA)
80
100
Figure 9. LM78Lxx Dropout
8.2.2 Other Application Circuits
Figure 10 to Figure 14 show application circuit examples using the LM78Lxx devices. Customers must fully
validate and test these circuits before implementing a design based on these examples. Unless otherwise noted,
the design procedures in Fixed Output Regulator are applicable to these designs.
VO = 5 V + (5 V / R1 + IQ) × R2*
* The 5 V represents the fixed output voltage of the LM78L05. If using one of the other LM78Lxx devices, use that
fixed output voltage value when calculating VO.
IQ < 5 V / (3 × R1)
Load regulation (LR) of LM78L05 ≈ (R1 + R2) / R1
Figure 10. Adjustable Output Regulator Circuit
Copyright © 2000–2016, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: LM78L05 LM78L09 LM78L12 LM78L15 LM78L62
13
LM78L05, LM78L09
LM78L12, LM78L15, LM78L62
SNVS754K – JANUARY 2000 – REVISED DECEMBER 2016
www.ti.com
Typical Applications (continued)
IOUT = (VO / R1) + IQ
IQ = 1.5 mA over line and load changes
Figure 11. Current Regulator Circuit
*Solid tantalum
**Heat sink Q1
***Optional: Improves ripple rejection and transient response.
Load Regulation = 0.6%, IL = 0 mA to 250 mA pulsed with tON = 50 ms.
Figure 12. 5-V, 500-mA Regulator With Short-Circuit Protection Circuit
14
Submit Documentation Feedback
Copyright © 2000–2016, Texas Instruments Incorporated
Product Folder Links: LM78L05 LM78L09 LM78L12 LM78L15 LM78L62
LM78L05, LM78L09
LM78L12, LM78L15, LM78L62
www.ti.com
SNVS754K – JANUARY 2000 – REVISED DECEMBER 2016
Typical Applications (continued)
*Solid tantalum
Figure 13. ±15-V, 100-mA Dual Power Supply Circuit
*Solid tantalum
VO = VG + 5 V, R1 = (–VIN / IQ(LM78L05))
VO = 5 V (R2 / R4) for (R2 + R3) = (R4 + R5)
A 0.5-V output will correspond to (R2 / R4) = 0.1, (R3 / R4) = 0.9
Figure 14. Variable Output Regulator Circuit (0.5 V to 18 V)
Copyright © 2000–2016, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: LM78L05 LM78L09 LM78L12 LM78L15 LM78L62
15
LM78L05, LM78L09
LM78L12, LM78L15, LM78L62
SNVS754K – JANUARY 2000 – REVISED DECEMBER 2016
www.ti.com
9 Power Supply Recommendations
The linear regulator input supply must be well regulated and kept at a voltage level to not exceed the maximum
input to output voltage differential allowed by the device. The minimum dropout voltage (VIN – VO) must be met
with extra headroom when possible to keep the output well regulated. A 0.33-µF or higher capacitor must be
placed at the input to bypass noise.
10 Layout
10.1 Layout Guidelines
For the best overall performance, some layout guidelines may be disregarded. Place all circuit components on
the same side of the circuit board and as near as practical to the respective linear regulator pins. Traces must be
kept short and wide to reduce the amount of parasitic elements in the system. The actual width and thickness of
traces depends on the current carrying capability and heat dissipation required by the end system.
10.2 Layout Example
GND
U1
C1
C2
VOUT
VIN
Figure 15. LM78Lxx Example Circuit Layout
16
Submit Documentation Feedback
Copyright © 2000–2016, Texas Instruments Incorporated
Product Folder Links: LM78L05 LM78L09 LM78L12 LM78L15 LM78L62
LM78L05, LM78L09
LM78L12, LM78L15, LM78L62
www.ti.com
SNVS754K – JANUARY 2000 – REVISED DECEMBER 2016
11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
For related documentation see the following:
• AN-1112 DSBGA Wafer Level Chip Scale Package (SNVA009)
• TO-92 Packing Options / Ordering Instructions (SNOA072).
11.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 1. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
LM78L05
Click here
Click here
Click here
Click here
Click here
LM78L09
Click here
Click here
Click here
Click here
Click here
LM78L12
Click here
Click here
Click here
Click here
Click here
LM78L15
Click here
Click here
Click here
Click here
Click here
LM78L62
Click here
Click here
Click here
Click here
Click here
11.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
Copyright © 2000–2016, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: LM78L05 LM78L09 LM78L12 LM78L15 LM78L62
17
LM78L05, LM78L09
LM78L12, LM78L15, LM78L62
SNVS754K – JANUARY 2000 – REVISED DECEMBER 2016
www.ti.com
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
18
Submit Documentation Feedback
Copyright © 2000–2016, Texas Instruments Incorporated
Product Folder Links: LM78L05 LM78L09 LM78L12 LM78L15 LM78L62
PACKAGE OPTION ADDENDUM
www.ti.com
14-Jul-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM78L05ACM
NRND
SOIC
D
8
95
TBD
Call TI
Call TI
0 to 125
LM78L
05ACM
LM78L05ACM/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 125
LM78L
05ACM
LM78L05ACMX
NRND
SOIC
D
8
2500
TBD
Call TI
Call TI
0 to 125
LM78L
05ACM
LM78L05ACMX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 125
LM78L
05ACM
LM78L05ACZ/LFT1
ACTIVE
TO-92
LP
3
2000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
0 to 125
LM78L
05ACZ
LM78L05ACZ/LFT3
ACTIVE
TO-92
LP
3
2000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
0 to 125
LM78L
05ACZ
LM78L05ACZ/LFT4
ACTIVE
TO-92
LP
3
2000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
0 to 125
LM78L
05ACZ
LM78L05ACZ/LFT7
ACTIVE
TO-92
LP
3
2000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
0 to 125
LM78L
05ACZ
LM78L05ACZ/NOPB
ACTIVE
TO-92
LP
3
1800
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
0 to 125
LM78L
05ACZ
LM78L05AIM/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LM78L
05AM
LM78L05AIMX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LM78L
05AM
LM78L05ITP/NOPB
ACTIVE
DSBGA
YPB
8
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
P
03
LM78L05ITPX/NOPB
ACTIVE
DSBGA
YPB
8
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
P
03
LM78L09ITPX/NOPB
ACTIVE
DSBGA
YPB
8
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
P
02
LM78L12ACM
NRND
SOIC
D
8
95
TBD
Call TI
Call TI
0 to 125
LM78L
12ACM
LM78L12ACM/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 125
LM78L
12ACM
LM78L12ACMX
NRND
SOIC
D
8
2500
TBD
Call TI
Call TI
0 to 125
LM78L
12ACM
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
14-Jul-2016
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM78L12ACMX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 125
LM78L
12ACM
LM78L12ACZ/LFT3
ACTIVE
TO-92
LP
3
2000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
0 to 125
LM78L
12ACZ
LM78L12ACZ/LFT4
ACTIVE
TO-92
LP
3
2000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
0 to 125
LM78L
12ACZ
LM78L12ACZ/LFT7
ACTIVE
TO-92
LP
3
2000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
0 to 125
LM78L
12ACZ
LM78L12ACZ/NOPB
ACTIVE
TO-92
LP
3
1800
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
0 to 125
LM78L
12ACZ
LM78L15ACM
NRND
SOIC
D
8
95
TBD
Call TI
Call TI
0 to 125
LM78L
15ACM
LM78L15ACM/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 125
LM78L
15ACM
LM78L15ACMX
NRND
SOIC
D
8
2500
TBD
Call TI
Call TI
0 to 125
LM78L
15ACM
LM78L15ACMX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 125
LM78L
15ACM
LM78L15ACZ/LFT4
ACTIVE
TO-92
LP
3
2000
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
0 to 125
LM78L
15ACZ
LM78L15ACZ/NOPB
ACTIVE
TO-92
LP
3
1800
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
0 to 125
LM78L
15ACZ
LM78L62ACZ/NOPB
ACTIVE
TO-92
LP
3
1800
Green (RoHS
& no Sb/Br)
CU SN
N / A for Pkg Type
0 to 125
LM78L
62ACZ
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
14-Jul-2016
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2016
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM78L05ACMX
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LM78L05ACMX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LM78L05AIMX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LM78L05ITP/NOPB
DSBGA
YPB
8
250
178.0
8.4
1.5
1.5
0.66
4.0
8.0
Q1
LM78L05ITPX/NOPB
DSBGA
YPB
8
3000
178.0
8.4
1.5
1.5
0.66
4.0
8.0
Q1
LM78L09ITPX/NOPB
DSBGA
YPB
8
3000
178.0
8.4
1.5
1.5
0.66
4.0
8.0
Q1
LM78L12ACMX
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LM78L12ACMX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LM78L15ACMX
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
LM78L15ACMX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2016
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM78L05ACMX
SOIC
D
8
2500
367.0
367.0
35.0
LM78L05ACMX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
LM78L05AIMX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
LM78L05ITP/NOPB
DSBGA
YPB
8
250
210.0
185.0
35.0
LM78L05ITPX/NOPB
DSBGA
YPB
8
3000
210.0
185.0
35.0
LM78L09ITPX/NOPB
DSBGA
YPB
8
3000
210.0
185.0
35.0
LM78L12ACMX
SOIC
D
8
2500
367.0
367.0
35.0
LM78L12ACMX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
LM78L15ACMX
SOIC
D
8
2500
367.0
367.0
35.0
LM78L15ACMX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
YPB0008
DSBGA - 0.575 mm max height
SCALE 9.000
DIE SIZE BALL GRID ARRAY
B
A
E
BALL A1
CORNER
D
0.575 MAX
C
SEATING PLANE
0.15
0.11
BALL TYP
0.05 C
1
TYP
C
1
TYP
SYMM
B
D: Max = 1.337 mm, Min =1.276 mm
0.5
TYP
E: Max = 1.337 mm, Min =1.276 mm
A
8X
0.015
0.18
0.16
C A B
1
2
3
0.5
TYP
SYMM
4215100/B 07/2016
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
YPB0008
DSBGA - 0.575 mm max height
DIE SIZE BALL GRID ARRAY
(0.5)
TYP
8X ( 0.16)
1
3
2
A
(0.5) TYP
SYMM
B
C
SYMM
LAND PATTERN EXAMPLE
SCALE:40X
( 0.16)
METAL
0.05 MAX
METAL UNDER
SOLDER MASK
0.05 MIN
( 0.16)
SOLDER MASK
OPENING
SOLDER MASK
OPENING
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4215100/B 07/2016
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
See Texas Instruments Literature No. SNVA009 (www.ti.com/lit/snva009).
www.ti.com
EXAMPLE STENCIL DESIGN
YPB0008
DSBGA - 0.575 mm max height
DIE SIZE BALL GRID ARRAY
(0.5) TYP
(R0.05) TYP
8X ( 0.3)
1
2
3
A
(0.5) TYP
SYMM
B
METAL
TYP
C
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.125mm THICK STENCIL
SCALE:50X
4215100/B 07/2016
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
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