LM8322
LM8322 Mobile I/O Companion Supporting Key-Scan, I/O Expansion, PWM, and
ACCESS.bus Host Interface
Literature Number: SNLS268F
October 4, 2011
LM8322
Mobile I/O Companion Supporting Key-Scan, I/O
Expansion, PWM, and ACCESS.bus Host Interface
1.0 General Description
■ Three host-programmable PWM outputs useful for smooth
The LM8322 Mobile I/O Companion is a dedicated device to
unburden a host processor from scanning a matrix-addressed
keypad. In addition, the LM8322 provides general-purpose
I/O expansion, and PWM outputs useful for dynamic LED
brightness modulation.
It communicates with the host through an I2C-compatible
ACCESS.bus interface. An interrupt output is available for
signaling key-press and key-release events. Communication
frequencies up to 400 kHz (Fast-mode) bus speed are supported. The LM8322 supports a predefined set of commands.
These commands enable a host device to keep control over
all functions.
■
2.0 Features
Key Features
■ Supports keypad matrices of up to 8 × 12 keys plus 8
special-function (SF) keys for a total of 104 keys. SF keys
pull keypad scan inputs directly to ground, rather than
connecting to a keypad scan output.
■ Supports I2C-compatible ACCESS.bus interface in slave
mode up to 400 kHz (Fast-mode).
■
■
■
■
LED brightness modulation.
Supports general-purpose I/O expansion on pins not
otherwise used for keypad interface.
Key-scan event storage in a FIFO buffer for up to 15
events.
Key events, errors, and dedicated hardware interrupts
request host service by asserting the IRQ output.
The correct reception of a command may be assumed, if
no error is reported from the LM8322 after receiving a
command.
Wake-up from Halt mode on any matrix key-scan event,
any use of the SF keys, or any activity on the ACCESS.bus
interface.
3.0 Applications
■
■
■
■
Mobile phones
Personal Digital Assistants (PDAs)
Smart handheld devices
Personal media players
4.0 Block Diagram
30013620
© 2011 National Semiconductor Corporation
300136
300136 Version 7 Revision 2
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Print Date/Time: 2011/10/04 16:24:29
LM8322 Mobile I/O Companion Supporting Key-Scan, I/O Expansion, PWM, and ACCESS.bus
Host Interface
OBSOLETE
LM8322
5.0 Ordering Information
NSID
Spec.
No. of Pins
Package Type
Temperature
Package Method
LM8322JGR8
NOPB
36
Micro-Array
−40 to + 85°C
1000 pcs Tape & Reel
LM8322JGR8X
NOPB
36
Micro-Array
−40 to + 85°C
3500 pcs Tape & Reel
NOPB = No PB (No Lead)
6.0 Pin Assignments
30013621
Top View
36–Pin MICRO-ARRAY Package
See NS Package Number GRA36A
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1.0 General Description ......................................................................................................................... 1
2.0 Features ........................................................................................................................................ 1
3.0 Applications .................................................................................................................................... 1
4.0 Block Diagram ................................................................................................................................ 1
5.0 Ordering Information ........................................................................................................................ 2
6.0 Pin Assignments ............................................................................................................................. 2
7.0 Signal Descriptions .......................................................................................................................... 5
7.1 TERMINATION OF UNUSED SIGNALS ...................................................................................... 6
8.0 Application Example ........................................................................................................................ 7
8.1 FEATURES ............................................................................................................................. 7
9.0 Clocks ........................................................................................................................................... 8
9.1 INTERNAL EXECUTION CYCLE ............................................................................................... 8
9.2 BUFFERED CLOCK ................................................................................................................. 8
9.3 CLOCK CONFIGURATION ....................................................................................................... 9
10.0 Reset ......................................................................................................................................... 10
10.1 EXTERNAL RESET .............................................................................................................. 10
10.2 POWER-ON RESET (POR) ................................................................................................... 10
10.3 PIN CONFIGURATION AFTER RESET ................................................................................... 10
10.4 DEVICE CONFIGURATION AFTER RESET ............................................................................ 11
10.5 CONFIGURATION INPUTS ................................................................................................... 11
10.6 INITIALIZATION ................................................................................................................... 11
10.7 INITIALIZATION EXAMPLE ................................................................................................... 13
11.0 Halt Mode ................................................................................................................................... 13
11.1 ACCESS.bus ACTIVITY ........................................................................................................ 13
12.0 Keypad Interface ......................................................................................................................... 14
12.1 EVENT CODE ASSIGNMENT ................................................................................................ 14
12.2 KEYPAD SCAN CYCLES ...................................................................................................... 14
12.2.1 Timing Parameters ..................................................................................................... 15
12.2.2 Multiple Key Pressings ................................................................................................ 15
12.3 EXAMPLE KEYPAD CONFIGURATION .................................................................................. 15
13.0 General-Purpose I/O Ports ............................................................................................................ 16
13.1 USING THE CONFIG_X PINS FOR GPIO ............................................................................... 17
13.2 GPIO TIMING ...................................................................................................................... 17
14.0 PWM Output Generation ............................................................................................................... 18
14.1 COMMAND QUEUE ............................................................................................................. 18
14.2 PWM TIMER OPERATION .................................................................................................... 18
14.3 PWM SCRIPT COMMANDS .................................................................................................. 19
14.4 RAMP COMMAND ............................................................................................................... 20
14.5 SET_PWM COMMAND ......................................................................................................... 20
14.6 GO_TO_START COMMAND ................................................................................................. 20
14.7 BRANCH COMMAND ........................................................................................................... 20
14.8 END COMMAND .................................................................................................................. 21
14.9 TRIGGER COMMAND .......................................................................................................... 21
14.10 PWM SCRIPT EXAMPLE .................................................................................................... 21
14.10.1 PWM Channel 0 Script .............................................................................................. 22
14.10.2 PWM Channel 1 Script .............................................................................................. 22
14.10.3 PWM Channel 2 Script .............................................................................................. 22
14.11 SELECTABLE SCRIPT EXAMPLE ........................................................................................ 23
15.0 Digital Multiplexers ....................................................................................................................... 24
16.0 Host Interface ............................................................................................................................. 25
16.1 START AND STOP CONDITIONS .......................................................................................... 25
16.2 CONTINUOUS COMMAND STRINGS .................................................................................... 25
16.3 DEVICE ADDRESS .............................................................................................................. 25
16.4 HOST WRITE COMMANDS .................................................................................................. 25
16.5 HOST READ COMMANDS .................................................................................................... 26
16.6 INTERRUPTS ...................................................................................................................... 26
16.7 INTERRUPT CODE .............................................................................................................. 27
16.8 ERROR CODE ..................................................................................................................... 27
16.9 WAKE-UP FROM HALT MODE .............................................................................................. 27
17.0 Host Commands .......................................................................................................................... 29
17.1 READ_ID COMMAND ........................................................................................................... 30
17.2 WRITE_CFG COMMAND ...................................................................................................... 30
17.3 READ_INT COMMAND ......................................................................................................... 31
17.4 RESET COMMAND .............................................................................................................. 31
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LM8322
Table of Contents
LM8322
17.5 WRITE_PULL_DOWN COMMAND .........................................................................................
17.6 WRITE_PORT_SEL COMMAND ............................................................................................
17.7 WRITE_PORT_STATE COMMAND ........................................................................................
17.8 READ_PORT_SEL COMMAND .............................................................................................
17.9 READ_PORT_STATE COMMAND .........................................................................................
17.10 READ_FIFO COMMAND .....................................................................................................
17.11 RPT_READ_FIFO COMMAND .............................................................................................
17.12 SET_ACTIVE COMMAND ...................................................................................................
17.13 READ_ERROR COMMAND .................................................................................................
17.14 SET_DEBOUNCE COMMAND .............................................................................................
17.15 SET_KEY_SIZE COMMAND ................................................................................................
17.16 READ_KEY_SIZE COMMAND .............................................................................................
17.17 READ_CFG COMMAND .....................................................................................................
17.18 WRITE_CLOCK COMMAND ................................................................................................
17.19 READ_CLOCK COMMAND .................................................................................................
17.20 PWM_WRITE COMMAND ...................................................................................................
17.21 PWM_START COMMAND ...................................................................................................
17.22 PWM_STOP COMMAND .....................................................................................................
18.0 Absolute Maximum Ratings ...........................................................................................................
19.0 DC Electrical Characteristics .........................................................................................................
20.0 AC Electrical Characteristics .........................................................................................................
21.0 Physical Dimensions ....................................................................................................................
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32
32
33
33
34
34
34
35
35
36
36
36
37
37
37
38
38
38
39
39
40
42
LM8322
7.0 Signal Descriptions
Pin
Function
I/O
A6
KP-X0
Input
Wake-up input/Keyboard scanning input 0
A5
KP-X1
Input
Wake-up input/Keyboard scanning input 1
F1
KP-X2
Input
Wake-up input/Keyboard scanning input 2
KP-X3
Input
Wake-up input/Keyboard scanning input 3
F2
A2
B3
A3
GPIO_13
I/O
KP-X4
Input
GPIO_12
I/O
KP-X5
Input
GPIO_11
I/O
KP-X6
Input
GPIO_10
I/O
Description
General-purpose I/O port 13
Wake-up input/Keyboard scanning input 4
General-purpose I/O port 12
Wake-up input/Keyboard scanning input 5
General-purpose I/O port 11
Wake-up input/Keyboard scanning input 6
General-purpose I/O port 10
KP-X7
Input
Wake-up input/Keyboard scanning input 7
GPIO_09
Input
General-purpose I/O port 9
C6
KP_Y0
Output
Keyboard scanning output 0
C5
KP-Y1
Output
Keyboard scanning output 1
B6
KP-Y2
Output
Keyboard scanning output 2
KP-Y3
Output
Keyboard scanning output 3
GPIO_08
I/O
General-purpose I/O port 8
KP-Y4
Output
Keyboard scanning output 4
GPIO_07
I/O
General-purpose I/O port 7
B4
B5
B2
A1
B1
KP-Y5
Output
Keyboard scanning output 5
GPIO_06
I/O
General-purpose I/O port 6
KP-Y6
Output
Keyboard scanning output 6
GPIO_05
I/O
General-purpose I/O port 5
KP-Y7
Output
Keyboard scanning output 7
GPIO_04
I/O
General-purpose I/O port 4
KP-Y8
Output
Keyboard scanning output 8
SLOWCLKOUT
Output
32.768 kHz clock output
GPIO_03
I/O
General-purpose I/O port 3
KP-Y9
Output
Keyboard scanning output 9
MUX2_IN1
Input
GPIO_02
I/O
KP-Y10
Output
MUX2_IN2
Input
GPIO_01
I/O
KP-Y11
Output
Keyboard scanning output 11
F6
MUX2_OUT
Output
Multiplexer 2 output
GPIO_00
I/O
General-purpose I/O port 0
E2
ACB_SDA
I/O
ACCESS.bus data signal
E1
ACB_SCL
I/O
ACCESS.bus clock signal
C2
E3
D5
E6
E4
F5
E5
PWM_0
Output
MUX_IN1
Input
PWM_1
Output
Multiplexer 2 input 1
General-purpose I/O port 2
Keyboard scanning output 10
Multiplexer 2 input 2
General-purpose I/O port 1
Pulse-width modulated output 0
Multiplexer 1 input 1
Pulse-width modulated output 1
MUX_IN2
Input
PWM_2
Output
Multiplexer 1 input 2
Pulse-width modulated output 2
MUX1_OUT
Output
Multiplexer 1 output
CONFIG_2
Input
Slave address select input 2
GPIO_15
I/O
General-purpose I/O port 15
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LM8322
Pin
Function
I/O
CONFIG_1
Input
Slave address select input 1
GPIO_14
I/O
General-purpose I/O port 14
XTAL_OUT
Input
32.768 kHz crystal output
SLOWCLK
Input
32.768 kHz clock
XTAL_IN
Input
32.768 kHz crystal input
F3
IRQ
Output
Interrupt request output
D6
D1
D2
Description
C1
RESET
Input
Reset Input
A4, F4
VCC
n.a.
VCC
C3, C4,
D3, D4
GND
n.a.
Ground
7.1 TERMINATION OF UNUSED SIGNALS
TABLE 1. Termination of Unused Signals
Signal
RESET
CONFIG_1
XTAL_IN
XTAL_OUT
KP-X[2:0]
Termination
Connect to VCC if not driven from an external Supervisory circuit.
Connect to VCC or GND through a pullup or pulldown resistor because the slave address is selected
by the level on this pin. This pin cannot be left unconnected.
This pin is a high-impedance input and must be connected to VCC or GND if it is unused.
This pin has a weak pullup and can be left open-circuit if it is unused.
These pins are dedicated keypad pins. In the minimum configuration, these pins are keypad inputs
with weak pullups.
These pins are in high-impedance mode after power-on initialization. There are two ways to handle
these pins if unused:
• Connect to VCC or GND.
KP-X[7:3]
KP-Y[2:0]
• Program as inputs with weak pullups or outputs.
Care must be taken when connecting to VCC or GND. Erroneous parameters sent with the
WRITE_PORT_SEL or WRITE_PORT_STATE commands could cause excessive current
consumption. A better approach is to leave unused keyboard inputs open-circuit and use the
WRITE_PORT_SEL and WRITE_PORT_STATE commands to configure the pins as inputs with
weak pullups or outputs.
KP-X7 can only be an input. This pin should be programmed as an input with a weak pullup.
These pins are dedicated keypad pins. In the minimum configuration, these pins are keypad outputs
driven low.
These pins are in high-impedance mode after power-on initialization. There are two ways to handle
these pins if unused:
• Connect to VCC or GND.
KP-Y[11:3]
• Program as inputs with weak pullups or outputs
Care must be taken when connecting to VCC or GND. Erroneous parameters sent with the
WRITE_PORT_SEL or WRITE_PORT_STATE commands could cause excessive current
consumption. A better approach is to leave unused keyboard inputs open-circuit and use the
WRITE_PORT_SEL and WRITE_PORT_STATE commands to configure the pins as inputs with
weak pullups or outputs.
PWM_0,
PWM_1
These pins must be connected to VCC or GND if they are not used for any optional function
described in the datasheet.
PWM_2/
CONFIG_2
Connect to VCC or GND through a pullup or pulldown resistor because the slave address is selected
by the level on this pin. This pin cannot be left unconnected.
IRQ
This pin must be connected.
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LM8322
8.0 Application Example
30013601
FIGURE 1. Typical Application
•
8.1 FEATURES
The application example shown in Figure 1 supports the following features:
• 8 x 9 standard keys.
• 8 special function keys (SF keys) with wake-up capability
by forcing a WAKE_INx pin to ground. Pressing a SF key
overrides any other key in the same row.
• ACCESS.bus (I2C-compatible) interface for
communication with the host.
• Hardware IRQ interrupt to host to signal keypad, error, and
status events. By default, this is an open-drain output, so
an external pullup resistor may be required to avoid false
assertion. The host can program this output for push-pull
mode, in which case the pullup might not be required, if
the host can ignore a false assertion before the LM8322
has been programmed.
•
•
Two LEDs driven by PWM outputs with programmable
ramp-up and ramp-down. PWM_2 (shared with GPIO_15
and CONFIG_2) could be used as an additional PWM
driver port to control a third external LED.
ACCESS.bus address is selected by the CONFIG_1 and
CONFIG_2 inputs. These pins may also be used as GPIO
pins after reset initialization has occurred. If extra GPIO
pins are not needed, CONFIG_1 and CONFIG_2 may be
tied directly to VCC and GND.
Crystal pins XTAL_IN and XTAL_OUT may be used to
connect to an external 32.768 kHz crystal or receive an
external 32.768 kHz clock input for running the PWM
peripheral. By default, the PWM is clocked by an on-chip
clock source.
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LM8322
9.0 Clocks
•
•
•
System Clock (mclk) — The system clock is in the range
of about 21 MHz (± 7%) typical. This clock is used to drive
the I2C compatible serial ACCESS bus and is the input
clock for other function blocks.
Processing and Command Execution Clock (tC) — The
internal processing is based on a 2 MHz clock. This clock
is derived from the System Clock.
Internal PWM Clock — The internal PWM clock is a fixed
scaled down clock (÷ 64) of the Processing and Command
•
•
Execution Clock. This clock is close to 32 kHz which is in
a good range to source the PWM function block as an
alternative to an external clock source.
External 32.768 kHz Clock — driven into the SLOWCLK
input. May be used internally as the timebase for the PWM
and driven on the SLOWCLKOUT output.
External 32.768 kHz Crystal — connected across the
XTAL_IN and XTAL_OUT pins (XTAL_IN is an alternate
function of the SLOWCLK pin). May be used internally as
the timebase for the PWM and driven on the
SLOWCLKOUT output.
30013602
FIGURE 2. Clock Architecture
9.1 INTERNAL EXECUTION CYCLE
The Processing - and Command - execution clock is about 2
MHz. This clock is stopped in Halt mode, which only occurs
under control of the LM8322. However, the host can set the
period of inactivity which causes the device to enter Halt
mode.
Exit from Halt mode can be triggered by any of these events:
• Occurrence of a key-press or key-release event.
• A Start condition driven by the host on the ACCESS.bus
interface.
• Assertion of the RESET input.
After reset, the default timebase for the PWM outputs is the
internal execution clock divided by 64.
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9.2 BUFFERED CLOCK
The timebase for the PWM comes from any of three sources:
• Prescaled internal Execution clock.
• External 32.768 kHz clock received on the SLOWCLK
input.
• On-chip oscillator with an external crystal connected
across XTAL_IN and XTAL_OUT.
Any of these sources may be buffered and driven on the
SLOWCLKOUT output. The clock buffer is enabled with the
WRITE_CLOCK command.
If XTAL_IN is not used it must be terminated to VCC or GND.
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TABLE 2. Clock Configuration Register
7
6
5
4
3
2
0
SLOWCLKOUT
0
0
SLOWCLKEN
0
Bit
SLOWCLKOUT
SLOWCLKEN
RCPWM
Value
1
0
RCPWM
Description
0
Disable SLOWCLKOUT buffer.
1
Enable SLOWCLKOUT buffer.
0
External 32.768 kHz crystal is installed between the XTAL_IN and XTAL_OUT pins.
1
External 32.768 kHz clock is received on the SLOWCLK pin, or no 32.768 kHz clock
is required.
00
On-chip RC clock divided by 64 drives the PWM and clock buffer.
01
Reserved.
10
Reserved.
11
External 32.768 kHz clock or crystal drives the PWM and clock buffer.
The SLOWCLKOUT signal is an alternate function of the pin
used for the KP-Y8 scanning output and the GPIO_03 port. If
the SLOWCLKOUT function is enabled, these other functions
of the pin are unavailable.
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LM8322
mand. The WRITE_CLOCK command must be issued only
once during system initialization. This command is used to
override the default settings.
9.3 CLOCK CONFIGURATION
Table 2 shows the clock configurations available by loading
the clock configuration register with the WRITE_CLOCK com-
LM8322
When the RESET pin goes high, the LM8322 comes out of
the reset state within about 1400 ns.
10.0 Reset
The LM8322 may be reset by either an external reset, RESET command, or an internally generated power-on reset
(POR) signal. The RESET input must not be allowed to float.
If the external RESET input is not used, it must be connected
to VCC, either directly or through a pull-up resistor.
10.2 POWER-ON RESET (POR)
The POR circuit is always enabled. When VCC rises above the
POR threshold voltage VPOR (about 1.2–1.5V), an on-chip
reset signal is asserted. The VCC rise time must be greater
than 20 µs and less than 10 ms, otherwise the on-chip reset
signal may deassert before VCC reaches the minimum operating voltage. While VCC is below VPOR, the LM8322 is held
in reset and a timer clocked by the on-chip RC clock is preset
with 0xFF (256 clock cycles). When VCC reaches a value
greater than VPOR, the timer starts counting down. When it
underflows, the on-chip reset signal is deasserted and the
LM8322 begins operation.
10.1 EXTERNAL RESET
The device enters a reset state immediately when the RESET input is driven low. RESET must be held low for a
minimum of 700 ns to guarantee a valid reset. If RESET is
asserted at power-on, it must be held low until VCC rises above
the minimum operating voltage (1.62V). If an RC circuit is
used to drive RESET, it must have a time constant 5 times
(5×) greater than the VCC rise time to this level.
When RESET goes low, the I/O ports are initialized immediately, any observed delay being only propagation delay.
10.3 PIN CONFIGURATION AFTER RESET
Table 2 shows the pin configuration after reset.
TABLE 3. Pin Configuration After Reset
Pins
After Reset
After LM8322 Initialization
KP-X00
KP-X01
KP-X02
High-impedance mode.
Input mode with an on-chip pullup enabled.
KP-X03
KP-X04
KP-X05
KP-X06
KP-X07
High-impedance mode.
High-impedance mode, until host configures them as keypad inputs
or GPIO.
KP-Y00
KP-Y01
KP-Y02
High-impedance mode.
Active drive low.
KP-Y03
KP-Y04
KP-Y05
KP-Y06
KP-Y07
KP-Y08
KP-Y09
KP-Y10
KP-Y11
High-impedance mode.
High-impedance mode, until host configures them as keypad outputs
or GPIO.
CONFIG_1
CONFIG_2
High-impedance mode.
The ACCESS.bus slave address must be selected with external
pullup or pulldown resistors or direct connections to VCC or GND.
IRQ
High-impedance mode.
Active drive low.
PWM_0
PWM_1
PWM_2
High-impedance mode.
High-impedance mode.
Open-drain mode.
Open-drain mode.
High-impedance mode.
High-impedance mode. Terminate to VCC or GND if not used.
Weak pullup device.
Weak pullup device.
High-impedance mode.
High-impedance mode.
ACB_SDA
ACB_SCL
XTAL_IN
XTAL_OUT
RESET
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LM8322
10.4 DEVICE CONFIGURATION AFTER RESET
After the LM8322 has completed its reset initialization, it will
have the following internal configuration:
• PWM Clock — the PWM clock source is the on-chip clock
divided by 64. This remains in effect until changed by a
host command.
• Keypad Size — 3 × 3.
• Digital Multiplexers — disabled.
• IRQ — enabled, active low.
• NOINIT Bit — set.
• Debounce Time — 3 scan cycles (about 12 milliseconds).
• Active Time — 500 milliseconds.
10.5 CONFIGURATION INPUTS
The states sampled from the CONFIG_1 and CONFIG_2 inputs during reset select the ACCESS.bus address used by
the LM8322, as shown in Table 4. The address occupies the
high seven bits of the first byte of a bus transaction, with the
LSB (shown as X below) indicating the direction of transfer.
TABLE 4. Bus Address Selection
CONFIG_1
CONFIG_2
Bus Address
0
0
1000 010X
0
1
1000 011X
1
0
1000 100X
1
1
1000 101X
When these pins are used as GPIO ports, the design must
ensure that they have the desired states during reset. For example, a 100-kohm resistor to ground can impose a logic 0
during reset without interfering with normal operation as a
GPIO port.
30013603
FIGURE 3. LM8322 Initialization Behavior
10.6 INITIALIZATION
The LM8322 waits for a WRITE_CFG command from the
host. During this time, IRQ is asserted to request service from
the host. Figure 3 describes the behavior of the LM8322 following reset.
Figure 4 shows the timing of IRQ relative to a RESET or POR
event and the WRITE_CFG command. 100 µs after a RESET or POR event, IRQ is asserted and any READ_INT
command will return an interrupt code with the NOINIT bit set.
90 µs after a WRITE_CFG command is received, IRQ is deasserted.
30013604
FIGURE 4. IRQ Reset Timing
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LM8322
After sending the WRITE_CFG command, the host must send
a series of commands to configure the LM8322, as shown in
Figure 5 (see left hand side).
This Flow - diagram illustrates also the basic host communication steps which the host must execute upon an IRQ re-
quest received from the LM8322 during operation. Such
requests will be made from the LM8322 as a result of key
pressed events, the detection of an error, the termination of
a PWM cycle and others.
30013605
FIGURE 5. Host-Side LM8322 Initialization
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Command
Encoding Parameter 1 Parameter 2
Description
WRITE_CFG
0x81
0x40
Selects 36-pin package and disables the two digital
multiplexers.
WRITE_CLK
0x93
0x08
SLOWCLKOUT disabled, no external 32.768 kHz clock
required, PWM clock source is internal.
SET_KEY_SIZE
0x90
0x84
Selects a keypad matrix size of 8 × 4.
SET_ACTIVE
0x8B
0x4B
Sets the active time to about 300 milliseconds (75 × 4
milliseconds).
SET_DEBOUNCE
0x8F
0x03
Sets the key debouncing time to about 12 milliseconds
(3 × 4 ms). This is actually the default and would not have
to be performed.
WRITE_PORT_SEL
0x85
0x00
0x38
Configure GPIO_03, GPIO_04, and GPIO_05 as
outputs. Configure GPIO_06, GPIO_07, GPIO_14, and
GPIO_15 as inputs.
WRITE_PULL_DOWN
0x84
0x00
0x3F
Set the direction for the pullup/pulldown devices on
GPIO_06 and GPIO_07 to pulldown. Set the direction for
the pullup/pulldown devices on GPIO_14 and GPIO_15
to pullup.
WRITE_PORT_STATE
0x86
0xC0
0xF0
Set GPIO_04 and GPIO_05 to drive high. Enable the
pullups on GPIO_06, GPIO_07, GPIO_14, and
GPIO_15.
Halt mode is entered when no key-press event, key-release
event, or ACCESS.bus activity is detected for a certain period
of time (by default, 500 milliseconds). The mechanism for entering Halt mode is always enabled in hardware, but the host
can program the period of inactivity which triggers entry into
Halt mode.
11.0 Halt Mode
The fully static architecture of the LM8322 allows stopping the
internal RC clock in Halt mode, which reduces power consumption to the minimum level. Figure 6 shows the current in
Halt mode at the maximum VCC (1.98V) from 25°C to +85°C.
11.1 ACCESS.bus ACTIVITY
When the LM8322 is in Halt mode, any activity on the
ACCESS.bus interface will cause the LM8322 to exit from
Halt mode. However, the LM8322 will not be able to acknowledge the first bus cycle immediately following wake-up from
Halt mode. It will respond with a negative acknowledgement,
and the host should then repeat the cycle.
The LM8322 will be prevented from entering Halt mode if it
shares the bus with peripherals that are continuously active.
For lowest power consumption, the LM8322 should only
share the bus with peripherals that require little or no bus activity after system initialization.
30013606
FIGURE 6. Halt Current vs. Temperature at 1.98V
13
300136 Version 7 Revision 2
Print Date/Time: 2011/10/04 16:24:29
www.national.com
LM8322
Most of these settings can be verified by executing commands such as READ_CONF, READ_PORT_SEL,
READ_CLOCK, etc.
ALL GPIO pin states can be read using the
READ_PORT_STATE command, without regard to whether
the pin is an input or an output.
An open-drain signal can be created by alternating between
input mode and driving the output low.
All GPIO s can sink and source 16 mA when configured as
an output.
10.7 INITIALIZATION EXAMPLE
In the following example, the LM8322 is configured as:
• Keypad matrix configuration is 8 × 4.
• GPIO_03 through GPIO_07 are available to use as GPIO
pins.
• GPIO_03 is an output driven low.
• GPIO_4 and GPIO_5 are outputs driven high.
• GPIO_06 and GPIO_07 are inputs with weak pulldowns.
• GPIO_14 and GPIO_15 are inputs with weak pullups.
• The PWM clock source is the internal execution clock
divided by 64 (about 32 kHz).
LM8322
mode to minimize power consumption (typically
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