LM833MX/NOPB

LM833-N www.ti.com SNOSBD8E – MAY 2004 – REVISED MAY 2012 LM833-N Dual Audio Operational Amplifier Check for Samples: LM833-N FEATURES DESCRIPTION • • • • The LM833-N is a dual general purpose operational amplifier designed with particular emphasis on performance in audio systems. 1 2 • • • • • Wide Dynamic Range: >140dB Low Input Noise Voltage: 4.5nV/√Hz High Slew Rate: 7 V/μs (typ); 5V/μs (Min) High Gain Bandwidth: 15MHz (typ); 10MHz (Min) Wide Power Bandwidth: 120KHz Low Distortion: 0.002% Low Offset Voltage: 0.3mV Large Phase Margin: 60° Available in 8 Pin VSSOP Package This dual amplifier IC utilizes new circuit and processing techniques to deliver low noise, high speed and wide bandwidth without increasing external components or decreasing stability. The LM833-N is internally compensated for all closed loop gains and is therefore optimized for all preamp and high level stages in PCM and HiFi systems. The LM833-N is pin-for-pin compatible with industry standard dual operational amplifiers. Schematic Diagram (1/2 LM833-N) 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2012, Texas Instruments Incorporated LM833-N SNOSBD8E – MAY 2004 – REVISED MAY 2012 www.ti.com Connection Diagram Figure 1. See Package Number D0008A, P0008E or DGK0008A These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS (1) (2) Supply Voltage VCC–VEE Differential Input Voltage 36V (3) VI ±30V Input Voltage Range (3) VIC ±15V Power Dissipation (4) PD 500 mW −40 ∼ 85°C Operating Temperature Range TOPR −60 ∼ 150°C Storage Temperature Range TSTG Soldering Information PDIP Package Soldering (10 seconds) 260°C Small Outline Package (SOIC and VSSOP) Vapor Phase (60 seconds) 215°C Infrared (15 seconds) ESD tolerance (1) (2) (3) (4) (5) 2 (5) 220°C 1600V Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. If supply voltage is less than ±15V, it is equal to supply voltage. This is the permissible value at TA ≤ 85°C. Human body model, 1.5 kΩ in series with 100 pF. Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated Product Folder Links: LM833-N LM833-N www.ti.com SNOSBD8E – MAY 2004 – REVISED MAY 2012 DC ELECTRICAL CHARACTERISTICS (1) (2) (TA = 25°C, VS = ±15V) Symbol Parameter Conditions Min Typ Units VOS Input Offset Voltage 0.3 5 mV IOS Input Offset Current 10 200 nA IB Input Bias Current 500 1000 nA AV Voltage Gain VOM Output Voltage Swing VCM Input Common-Mode Range CMRR Common-Mode Rejection Ratio PSRR Power Supply Rejection Ratio IQ Supply Current VO = 0V, Both Amps (1) RS = 10Ω Max RL = 2 kΩ, VO = ±10V 90 110 dB RL = 10 kΩ ±12 ±13.5 V RL = 2 kΩ ±12 ±13.4 V ±12 ±14.0 V VIN = ±12V 80 100 dB VS = 15 ∼ 5V, −15 ∼ −5V 80 100 dB 5 8 mA Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. All voltages are measured with respect to the ground pin, unless otherwise specified. (2) AC ELECTRICAL CHARACTERISTICS (TA = 25°C, VS = ±15V, RL = 2 kΩ) Symbol Parameter Conditions Min Typ Max Units SR Slew Rate RL = 2 kΩ 5 7 V/μs GBW Gain Bandwidth Product f = 100 kHz 10 15 MHz VNI Equivalent Input Noise Voltage (LM833AM, LM833AMX) RIAA, RS = 2.2 kΩ (1) (1) μV 1.4 RIAA Noise Voltage Measurement Circuit DESIGN ELECTRICAL CHARACTERISTICS (TA = 25°C, VS = ±15V) The following parameters are not tested or ensured. Symbol ΔVOS/ΔT Parameter Conditions Average Temperature Coefficient Typ Units 2 μV/°C 0.002 % of Input Offset Voltage THD Distortion RL = 2 kΩ, f = 20∼20 kHz VOUT = 3 Vrms, AV = 1 en Input Referred Noise Voltage RS = 100Ω, f = 1 kHz 4.5 nV / √Hz in Input Referred Noise Current f = 1 kHz 0.7 pA / √Hz PBW Power Bandwidth VO = 27 Vpp, RL = 2 kΩ, THD ≤ 1% 120 kHz fU Unity Gain Frequency Open Loop 9 MHz φM Phase Margin Open Loop 60 deg Input Referred Cross Talk f = 20∼20 kHz −120 dB Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated Product Folder Links: LM833-N 3 LM833-N SNOSBD8E – MAY 2004 – REVISED MAY 2012 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS Maximum Power Dissipation vs Ambient Temperature Input Bias Current vs Ambient Temperature Figure 2. Figure 3. Input Bias Current vs Supply Voltage 4 Supply Current vs Supply Voltage Figure 4. Figure 5. DC Voltage Gain vs Ambient Temperature DC Voltage Gain vs Supply Voltage Figure 6. Figure 7. Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated Product Folder Links: LM833-N LM833-N www.ti.com SNOSBD8E – MAY 2004 – REVISED MAY 2012 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Voltage Gain & Phase vs Frequency Gain Bandwidth Product vs Ambient Temperature Figure 8. Figure 9. Gain Bandwidth vs Supply Voltage Slew Rate vs Ambient Temperature Figure 10. Figure 11. Slew Rate vs Supply Voltage Power Bandwidth Figure 12. Figure 13. Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated Product Folder Links: LM833-N 5 LM833-N SNOSBD8E – MAY 2004 – REVISED MAY 2012 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) 6 CMR vs Frequency Distortion vs Frequency Figure 14. Figure 15. PSRR vs Frequency Maximum Output Voltage vs Supply Voltage Figure 16. Figure 17. Maximum Output Voltage vs Ambient Temperature Spot Noise Voltage vs Frequency Figure 18. Figure 19. Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated Product Folder Links: LM833-N LM833-N www.ti.com SNOSBD8E – MAY 2004 – REVISED MAY 2012 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Spot Noise Current vs Frequency Input Referred Noise Voltage vs Source Resistance Figure 20. Figure 21. Noninverting Amp Noninverting Amp Figure 22. Figure 23. Inverting Amp Figure 24. Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated Product Folder Links: LM833-N 7 LM833-N SNOSBD8E – MAY 2004 – REVISED MAY 2012 www.ti.com APPLICATION HINTS The LM833-N is a high speed op amp with excellent phase margin and stability. Capacitive loads up to 50 pF will cause little change in the phase characteristics of the amplifiers and are therefore allowable. Capacitive loads greater than 50 pF must be isolated from the output. The most straightforward way to do this is to put a resistor in series with the output. This resistor will also prevent excess power dissipation if the output is accidentally shorted. Noise Measurement Circuit Complete shielding is required to prevent induced pick up from external sources. Always check with oscilloscope for power line noise. Figure 25. Total Gain: 115 dB @f = 1 kHz Input Referred Noise Voltage: en = V0/560,000 (V) 8 Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated Product Folder Links: LM833-N LM833-N www.ti.com SNOSBD8E – MAY 2004 – REVISED MAY 2012 RIAA Noise Voltage Measurement Circuit RIAA Preamp Voltage Gain, RIAA Deviation vs Frequency Figure 26. Flat Amp Voltage Gain vs Frequency Figure 27. Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated Product Folder Links: LM833-N 9 LM833-N SNOSBD8E – MAY 2004 – REVISED MAY 2012 www.ti.com Typical Applications AV = 34.5 F = 1 kHz En = 0.38 μV A Weighted Figure 28. NAB Preamp Figure 29. NAB Preamp Voltage Gain vs Frequency VO = V1–V2 Figure 30. Balanced to Single Ended Converter 10 Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated Product Folder Links: LM833-N LM833-N www.ti.com SNOSBD8E – MAY 2004 – REVISED MAY 2012 VO = V1 + V2 − V3 − V4 Figure 31. Adder/Subtracter Figure 32. Sine Wave Oscillator Illustration is f0 = 1 kHz Figure 33. Second Order High Pass Filter (Butterworth) Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated Product Folder Links: LM833-N 11 LM833-N SNOSBD8E – MAY 2004 – REVISED MAY 2012 www.ti.com Illustration is f0 = 1 kHz Figure 34. Second Order Low Pass Filter (Butterworth) Illustration is f0 = 1 kHz, Q = 10, ABP = 1 Figure 35. State Variable Filter Figure 36. AC/DC Converter 12 Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated Product Folder Links: LM833-N LM833-N www.ti.com SNOSBD8E – MAY 2004 – REVISED MAY 2012 Figure 37. 2 Channel Panning Circuit (Pan Pot) Figure 38. Line Driver Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated Product Folder Links: LM833-N 13 LM833-N SNOSBD8E – MAY 2004 – REVISED MAY 2012 www.ti.com Illustration is: fL = 32 Hz, fLB = 320 Hz fH =11 kHz, fHB = 1.1 kHz Figure 39. Tone Control Av = 35 dB En = 0.33 μV S/N = 90 dB f = 1 kHz A Weighted A Weighted, VIN = 10 mV @f = 1 kHz Figure 40. RIAA Preamp 14 Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated Product Folder Links: LM833-N LM833-N www.ti.com SNOSBD8E – MAY 2004 – REVISED MAY 2012 Illustration is: V0 = 101(V2 − V1) Figure 41. Balanced Input Mic Amp Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated Product Folder Links: LM833-N 15 LM833-N SNOSBD8E – MAY 2004 – REVISED MAY 2012 www.ti.com Figure 42. 10 Band Graphic Equalizer fo (Hz) C1 C2 R1 R2 32 0.12μF 4.7μF 75kΩ 500Ω 64 0.056μF 3.3μF 68kΩ 510Ω 125 0.033μF 1.5μF 62kΩ 510Ω 250 0.015μF 0.82μF 68kΩ 470Ω 500 8200pF 0.39μF 62kΩ 470Ω 1k 3900pF 0.22μF 68kΩ 470Ω 2k 2000pF 0.1μF 68kΩ 470Ω 4k 1100pF 0.056μF 62kΩ 470Ω 8k 510pF 0.022μF 68kΩ 510Ω 16k 330pF 0.012μF 51kΩ 510Ω Note: At volume of change = ±12 dB Q = 1. LM833-N MDC MWC DUAL AUDIO OPERATIONAL AMPLIFIER Figure 43. Die Layout (A - Step) 16 Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated Product Folder Links: LM833-N PACKAGE OPTION ADDENDUM www.ti.com 21-Jan-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM833M ACTIVE SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM833 M LM833M/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LM833 M LM833MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 Z83 LM833MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 Z83 LM833MX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LM833 M LM833N/NOPB ACTIVE PDIP P 8 40 Green (RoHS & no Sb/Br) CU SN | Call TI Level-1-NA-UNLIM -40 to 85 LM 833N (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 21-Jan-2017 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 1-Oct-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM833MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM833MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM833MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 1-Oct-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM833MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LM833MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LM833MX/NOPB SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] A .004 [0.1] C PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .150 [3.81] .189-.197 [4.81-5.00] NOTE 3 4X (0 -15 ) 4 5 B 8X .012-.020 [0.31-0.51] .010 [0.25] C A B .150-.157 [3.81-3.98] NOTE 4 .069 MAX [1.75] .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 [0.11-0.25] 0 -8 .016-.050 [0.41-1.27] DETAIL A (.041) [1.04] TYPICAL 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] 6X (.050 ) [1.27] SYMM 5 4 (R.002 ) TYP [0.05] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X METAL SOLDER MASK OPENING EXPOSED METAL .0028 MAX [0.07] ALL AROUND SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL .0028 MIN [0.07] ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] 6X (.050 ) [1.27] SYMM 5 4 (R.002 ) TYP [0.05] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. 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