LM8801TME-1.2EV/NOPB

User's Guide SNVA394A – March 2010 – Revised May 2013 AN-1961 LM8801 Evaluation Board 1 Introduction The LM8801 evaluation board is a working demonstration of a step down DC-DC converter. This application note contains information about the evaluation board. For further information on buck converter topology, device electrical characteristics, typical performance and component selection, please refer to the LM8801 High Precision 6MHz, 600 mA Synchronous Step-Down DC-DC Converter for Mobile Applications (SNVS597) data sheet. 2 General Description The LM8801 step-down DC-DC converter is optimized for powering ultra-low voltage circuits from a single Li-Ion cell or 3 cell NiMH/NiCd batteries. It provides up to 600 mA load current, over an input voltage range from 2.3V to 5.5V. LM8801 has a mode-control pin that allows the user to select continuous PWM mode over the complete load range or an auto PFM-PWM mode that changes between PFM and PWM modes automatically depending on the load. In PFM, LM8801 offers superior efficiency and very low Iq under light load conditions. During the PWM mode, the device operates at a fixed frequency of 6MHz (typ.). The LM8801 is available in a 6–bump thin DSBGA package. Only three external surface-mount components, a 0.47-0.54 μH inductor, a 2.2 μF capacitor (CIN) and a 4.7 μF capacitor (COUT), are required. 3 4 Operating Conditions Input Voltage Range 2.3V to 5.5V Recommended Load Current 0 mA to 600 mA Junction Temperature (TJ) Range −30°C to +125°C Ambient Temperature (TA) Range −30°C to +85°C Typical Application Figure 1. Typical Application Circuit All trademarks are the property of their respective owners. SNVA394A – March 2010 – Revised May 2013 Submit Documentation Feedback AN-1961 LM8801 Evaluation Board Copyright © 2010–2013, Texas Instruments Incorporated 1 Connection Diagram and Package Mark Information 5 www.ti.com Connection Diagram and Package Mark Information MODE A1 A2 VIN VIN A2 A1 MODE SW B1 B2 EN EN B2 B1 SW FB C1 C2 GND GND C2 C1 FB TOP VIEW BOTTOM VIEW Figure 2. 6-Bump DSBGA Package 6 7 Pin Descriptions Pin Number Name Description A1 Mode Auto mode and forced PWM mode selection. Forced PWM = HIGH; Auto = LOW. A2 VIN Power supply input. Connect to the input filter capacitor (Typical Application Circuit, page 1). B1 SW Switching node connection to the internal PFET switch and NFET synchronous rectifier. B2 EN Enable pin. The device is in shutdown mode when voltage to this pin is < 0.4V and enabled when > 1.2V. Do not leave this pin floating. C1 FB Feedback analog input. Connect directly to the output filter capacitor (Typical Application Circuit, page 1). C2 GND BOM for Common Configurations Manufacturer 2 Ground pin. Part# Description Designation Qty. Texas Instruments LM8801 DC/DC convertor U1 1 Samsung CL05A475MQ5NRNC 0402, 4.7 µF Cap COUT 1 FDK MIPSZ2012D0R5 2012, 0.5 µH Inductor L 1 Taiyu Yuden JMK105BJ225MV-F 0402, 2.2 µF Cap CIN 1 AN-1961 LM8801 Evaluation Board SNVA394A – March 2010 – Revised May 2013 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Evaluation Board Layout www.ti.com 8 Evaluation Board Layout Figure 3. TOP VIEW SNVA394A – March 2010 – Revised May 2013 Submit Documentation Feedback AN-1961 LM8801 Evaluation Board Copyright © 2010–2013, Texas Instruments Incorporated 3 DSBGA Package Assembly and Use www.ti.com Figure 4. BOTTOM VIEW 9 DSBGA Package Assembly and Use Use of the DSBGA package requires specialized board layout, precision mounting and careful re-flow techniques, as detailed in AN-1112 DSBGA Wafer Level Chip Scale Package (SNVA009). Refer to the section Surface Mount Technology (SMD) Assembly Considerations. For best results in assembly, alignment ordinals on the PC board should be used to facilitate placement of the device. The pad style used with DSBGA package must be the NSMD (Non-Solder Mask Defined) type. This means that the solder-mask opening is larger than the pad size. This prevents a lip that otherwise forms if the soldermask and pad overlap, from holding the device off the surface of the board and interfering with mounting. The 6-bump package used for LM8801 has 300-micron solder balls and requires 10.82 mils pads for mounting on the circuit board. The trace to each pad should enter the pad with a 90° entry angle to prevent debris from being caught in deep corners. Initially, the trace to each pad should be 7 mil wide, for a section approximately 7 mil long or longer, as a thermal relief. Then each trace should neck up or down to its optimal width. The important criteria is symmetry. This ensures the solder bumps on the LM8801 reflow evenly and that the device solders level to the board. In particular, special attention must be paid to the pads for bumps A2 and C2, because VIN and GND are typically connected to large copper planes. The DSBGA package is optimized for the smallest possible size in applications with red or infrared opaque cases. Because the DSBGA package lacks the plastic encapsulation characteristic of larger devices, it is vulnerable to light. Backside metallization and/or epoxy coating, along with frontside shading by the printed circuit board, reduce this sensitivity. However, the package has exposed die edges. In particular, DSBGA devices are sensitive to light, in the red and infrared range, shining on the package’s exposed die edges. 4 AN-1961 LM8801 Evaluation Board SNVA394A – March 2010 – Revised May 2013 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Board Layout Considerations www.ti.com 10 Board Layout Considerations PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss in the traces. These can send erroneous signals to the DC-DC converter IC, resulting in poor regulation or instability. Poor layout can also result in re-flow problems leading to poor solder joints between the DSBGA package and board pads. Poor solder joints can result in erratic or degraded performance. Good layout for the LM8801 can be implemented by following a few simple design rules, as illustrated in Figure 3. 1. Place the LM8801 on 10.82 mil pads. As a thermal relief, connect each pad with a 7 mil wide, approximately 7 mil long trace, and then incrementally increase each trace to its optimal width. The important criterion is symmetry to ensure the solder bumps re-flow evenly (see Section 9). 2. Place the LM8801, inductor and filter capacitors close together and make the traces short. The traces between these components carry relatively high switching currents and act as antennas. Following this rule reduces radiated noise. Special care must be given to place the input filter capacitor very close to the VIN and GND pin. 3. Arrange the components so that the switching current loops curl in the same direction. During the first half of each cycle, current flows from the input filter capacitor, through the LM8801 and inductor to the output filter capacitor and back through ground, forming a current loop. In the second half of each cycle, current is pulled up from ground, through the LM8801 by the inductor, to the output filter capacitor and then back through ground, forming a second current loop. Routing these loops so the current curls in the same direction prevents magnetic field reversal between the two half-cycles and reduces radiated noise. 4. Connect the ground pins of the LM8801, and filter capacitors together using generous component-side copper fill as a pseudo-ground plane. Then connect this to the ground-plane (if one is used) with several vias. This reduces ground-plane noise by preventing the switching currents from circulating through the ground plane. It also reduces ground bounce at the LM8801 by giving it a low-impedance ground connection. 5. Use wide traces between the power components and for power connections to the DC-DC converter circuit. This reduces voltage errors caused by resistive losses across the traces. 6. Route noise sensitive traces such as the voltage feedback path away from noisy traces between the power components. The voltage feedback trace must remain close to the LM8801 circuit and should be routed directly from FB to VOUT at the output capacitor and should be routed opposite to noise components. This reduces EMI radiated onto the DC-DC converter’s own voltage feedback trace. 7. Place noise sensitive circuitry, such as radio IF blocks, away from the DC-DC converter, CMOS digital blocks and other noisy circuitry. Interference with noise-sensitive circuitry in the system can be reduced through distance. In mobile phones, for example, a common practice is to place the DC-DC converter on one corner of the board, arrange the CMOS digital circuitry around it (since this also generates noise), and then place sensitive preamplifiers and IF stages on the diagonally opposing corner. Often, the sensitive circuitry is shielded with a metal pan and power to it is post-regulated to reduce conducted noise, using low-dropout linear regulators. SNVA394A – March 2010 – Revised May 2013 Submit Documentation Feedback AN-1961 LM8801 Evaluation Board Copyright © 2010–2013, Texas Instruments Incorporated 5 STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES 1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein. 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