LM96550SQX/NOPB

LM96550 Ultrasound Transmit Pulser General Description Features The LM96550 is an eight-channel monolithic high-voltage, high-speed pulse generator for multi-channel medical ultrasound applications. It is well-suited for use with National’s LM965XX series chipset which offers a complete medical ultrasound solution targeted towards low-power, portable systems. The LM96550 contains eight high-voltage pulsers with integrated diodes generating ±50V bipolar pulses with peak currents of up to 2A and pulse rates of up to 15 MHz. Advanced features include low-jitter and low-phase-noise output pulses ideal for continuous-wave (CW) modes of operation. Active clamp circuitry is integrated for ensuring low harmonic distortion of the output signal waveform. The LM96550 also featuers a low-power operation mode and over-temperature protection (OTP) which are enabled by onchip temperature sensing and power-down logic. ■ ■ ■ ■ ■ ■ Applications Key Specifications ■ Ultrasound Imaging © 2011 National Semiconductor Corporation ■ ■ ■ ■ ■ ■ ■ 8-channel high-voltage CMOS pulse generator Output pulses with ±50V and 2A peak current Active damper with built-in blocking diodes Up to 15 MHz operating frequency Matched delays for rising and falling edges Low second harmonic distortion allows and improves harmonic imaging Continuous-wave (CW) operation down to ±3.3V Low Phase noise enables Doppler measurements Output state over-temperature protection Blocking diodes for direct interface to transducer 2.5V to 5.0V CMOS logic interface Low-power consumption per channel Over Temperature Protection Output voltage Output peak current Output pulse rate Rise/fall delay matching (max) Phase Noise (Fin=5MHz, 1KHz offset) Pulser HD2 (5 MHz) Operating Temp. 301296 ±50 ±2.0 Up to 15 125°C 0 = Over-temperature 1 = Normal temperature This pin is open-drain. 4, 5, 6, 7, 54, 55, 56, 57 VPP Power Positive high voltage power supply (+3.3V to +50V) 11, 12, 13, 14, 47, 48, 49, 50 VNN Power Negative high voltage power supply (-3.3V to -50V) 8, 53 VPF Power Positive floating power supply (VPP -10V) 10, 51 VNF Power Negative floating power supply (VNN +10V) 18, 43 VDD Power Positive level-shifter supply voltage (+10V) 16, 45 VDN Power Negative level-shifter supply voltage (-10V) 20, 41 VLL Power Logic supply voltage. Hi voltage reference input (+2.5 to +5V) VSUB Power All VSUB pins must be connected to most negative potential of the IC. NOTE: The exposed thermal pad is connected to VSUB. HVGND Ground High voltage reference potential (0V) AGND Ground Analog and Logic voltage reference input, logic ground (0V) 0, 15, 46 3, 9, 52, 58, 61, 64, 67, 70, 71, 74, 77, 80 17, 19, 32, 42, 44 www.national.com 4 Operating Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Operation Junction Temperature VPP, −VNN; High-voltage supply VPF, −VNF; Floating supply VDD, −VDN; Level-shift supply VLL, Logic Supply VSUB, Substrate bias supply Maximum Junction Temperature (TJMAX) Storage Temperature Range Supply Voltage (VDD) Supply Voltage (VDN) Supply Voltage (VPP) Supply Voltage (VPF) Supply Voltage (VNN) Supply Voltage (VNF) Supply Voltage (VSUB) IO Supply Voltage (VLL) Voltage at Logic Inputs +150°C −40°C to +125°C –0.3V to +12V +0.3V and −12V –0.3V and +55V VPP −14V +0.3V and −55V VNN +14V −65V −0.3V to +5.5V −0.3V to VLL +0.3V 0°C to + 70°C +3.3V to +50V VPP −10V +9V to 11V +2.4V to +5.3V must be most negative supply Package Thermal Resistance (θJA) ESD Tolerance Human Body Model Machine Model Charge Device Model 19.7°C/W 2kV 150V 750V Analog Characteristics Unless otherwise stated, the following conditions apply VLL = +3.3V, VPP = −VNN = 50V, VPF = −VNF = VPP-10V, VDD = −VDN = 10V, VSUB = −55V, RL = 2 KΩ, TA = 25°C, Mode = LO, EN = HI, Fin=5MHz Symbol FOUT Parameter Conditions Min Output Frequency Range RL = 100Ω Typ 1 Output Voltage Range -48.5 Output Current 2% Duty Cycle Output Current 100% Duty Cycle, Mode=HI 0.6 HD2 Second harmonic distortion RL = 100Ω || CL = 330pF See (Note 2) -40 RON Output ON Resistance 100 mA Output Phase Noise 5MHz carrier, 1kHz offset, Mode=HI, VPP=-VNN=5V, RL = 100Ω || CL = 330pF Output clamp Positive or Negative pulse Units 15 MHz +48.5 V 2 7 Pin = Nin = 0 Power Supply Current En = 0 OPT Max Over Temperature Protection dBc 11 −114 Ω dBc/Hz 2 A VPP 0.7 3 VNN 0.5 4.5 VDD 8 13 VDN 4 7 VLL 25 50 VSUB 1.2 6 VPF 0.1 1.5 VNF 0.1 1.5 VPP 0.7 3 VNN 0.5 4.5 VDD 0.4 2.7 VDN 0.1 2.2 VLL 25 50 VSUB 1.2 6 VPF 0.1 1.5 VNF 0.1 1.5 125 5 A mA µA mA mA µA mA °C www.national.com LM96550 Absolute Maximum Ratings (Note 1) LM96550 Symbol Parameter Conditions Min Typ Max Units σOTP OTP sigma 3.0 °C HsysOTP OTP hysteresis 5.5 °C AC and Timing Characteristics Unless otherwise stated, the following conditions apply. VLL = +3.3V, VDD = −VDN = 10V, VSUB = −55V, VPP = −VNN = 50V, VPF = −VNF = 40V, CL = 330pF, RL = 100 Ω, TA = 25°C, Fin=5MHz, Mode=LO, EN=HI Symbol Parameter Conditions Min Typ Max 18 26 18 26 tr Output rise time tf Output fall time tE Enable time 1 tdr Delay time on inputs rise 32 39 tdf Delay time on inputs fall 32 39 | tdr - tdr | Delay time mismatch tdm Delay on mode change See (Note 2) See (Note 2) P-to-N See (Note 2) & 3 Unit ns µs ns 3 µs 1 DC Characteristics Unless otherwise stated, the following conditions apply. VLL = +3.3V, VDD = −VDN = 10V, VSUB = −55V, VPP = −VNN = 50V, VPF = −VNF = 40V, TA = 25°C, Symbol Parameter VIL Low Input “LO” threshold VIH High Input “HI” threshold IIN input current Conditions Min Typ 2.3 Max Unit 1 V V 1 µA Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is guaranteed to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: VNF = -42V, VPF = 38V Note 3: The delay time mismatch can be adjust to be less than 0.8ns with the LM96570 duty cycle control function. www.national.com 6 The LM96550 pulser provides an 8-channel transmit side solution for medical ultrasound applications suitable for integra- 30129602 FIGURE 2. Block Diagram of High-Voltage Pulser Channel A functional block diagram of the LM96550 is shown in . It has an input buffer at its CMOS logic interface, which is powered by VLL (2.5 to 5.0V). When EN=HI, driving a channel’s inputs (PIN n or NIN n) HI will result in a positive or negative pulse at the channel’s output pin (VOUT n), respectively. The output pins VOUT are pulled to either the positive or negative supplies, VPP or VNN by power MOSFETs. When PIN and NIN are both LO, Vout is actively clamped to GNDHI at 0V. This clamping reduces harmonic distortions compared to competing architectures that use bleeding resistors for implementing the return to zero of the output. The user must avoid the condition in which PIN and NIN are both HI simultaneously, as this will damage the output stage! The impedance of the output stage can be controlled via the Mode-pin. When the Mode = HI as shown, only one output transistor pair drives the output resulting in a peak current of 600 mA at VPP = -VNN = 50V. When Mode=LO, a peak-current of 2A is achievable resulting in faster transients at the output. However, faster output transients can lead to significant overshoot of the output signal. This can be avoided using the lower drive current option. Continuous-wave (CW) applications are supported for low power consumption down to VPP = -VNN = 3.3V with Mode =HI. Internally, the CMOS logic input signals are level shifted to VDD = 10V and VDN = -10V for pulse transmission. The outputs of the level shifter drive the high-voltage P and N drivers that control the output power MOSFETs, which are supplied from the positive and negative rails VPP and VNN, respectively. The high-voltage rails are designed for a maximum of 50V; however, they can be operated down to 3.3V. The necessary gate-overdrive voltage levels for the output drivers are internally generated from the high-voltage rails. Over-Temperature Protection (OTP) is implemented by continuously monitoring the on-chip temperature. The OTP output (open drain) pin goes LO when the chip temperature exceeds a critical level. Prior to this event, the user must ensure that the chip is powered down before fatal damage occurs. In addition to a primary software controlled safety shutdown, the OTP pin can be also be hard-wired to the EN pin as a secondary safety measure. 7 www.national.com LM96550 tion into multi-channel (128/256 channel) systems. Its flexible, integrated ±50V pulser architecture enables low-power designs targeting portable systems. A complete system can be designed using National’s companion LM965XX chipset. Overview LM96550 Timing Diagrams RISE AND FALL TIME The timing diagram shown in Figure 3 defines the rise and fall times tr and tf. 30129604 FIGURE 3. Timing Diagram Defining Rise and Fall Times tr and tf, respectively INPUT TO OUTPUT DELAY The timing diagram shown in Figure 4 defines the delays between the input and output signals. 30129605 FIGURE 4. Timing Diagram Defining Input-to-Output Delays Times www.national.com 8 Unless otherwise stated, the following conditions apply. VLL = +3.3V, VDD = −VDN = 10V, VSUB = −55V, VPP = −VNN = 50V, VPF = VPP-12V, VNF = VNN+8V, CL = 330pF, RL = 100Ω, TA = 25°C, Fin=5MHz, Mode=LO, EN=HI Return-to-Zero Rise Time (RL = 2KΩ) Return-to-Zero Fall Time (RL = 2KΩ) 30129609 30129614 Harmonic Distortion (8 pulses) CW Phase Noise (Mode=HI, VPP=-VNN=5V) 30129611 30129610 Constant 5W Total Power (RL = 300Ω) 100% CW mode, Mode=HI, VSUB=-10V, VPF=-VNF=VPP-10V Over Temperature Protection 120 15 12 9 CL=150pF 6 CL=330pF # of Samples CW Frequency (MHz) 100 80 60 40 20 3 CL=470pF 0 114 0 3 4 5 6 7 8 VPP=-VNN (V) 9 134 OTP Trip Point (°C) 10 30129613 30129612 9 www.national.com LM96550 Typical Performance Characteristics LM96550 Functional Description Note that the case, PINn = NNn = HI is not allowed as it will damage the output transistors. Logic inputs Output EN PINn NINn Voutn 1 0 0 0V 1 1 0 VPP - 0.7V 1 0 1 VNN + 0.7V 1 1 1 not allowed 0 X X 0V Applications POWER-UP AND POWER-DOWN SEQUENCES VSUB must always be the most negative supply, i.e., it must be equal to or more negative than the most negative supply, VNN or VDN. VPF ≥ VPP −14V AND VNF = ≤ VNN +14V at all times. Power UP Sequence: 1. 2. 3. Turn ON VSUB, hold EN pin LO Turn ON VLL Turn ON VDD, VDN, VPP, VPF, VNN and VNF Power DOWN Sequence: 1. 2. 3. Turn OFF VDD, VDN, VPP, VPF, VNN and VNF Turn OFF VLL Turn OFF VSUB www.national.com 10 LM96550 Physical Dimensions inches (millimeters) unless otherwise noted 80-Lead LLP Package NS Package Number SQA80A 11 www.national.com LM96550 Ultrasound Transmit Pulser Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Design Support Amplifiers www.national.com/amplifiers WEBENCH® Tools www.national.com/webench Audio www.national.com/audio App Notes www.national.com/appnotes Clock and Timing www.national.com/timing Reference Designs www.national.com/refdesigns Data Converters www.national.com/adc Samples www.national.com/samples Interface www.national.com/interface Eval Boards www.national.com/evalboards LVDS www.national.com/lvds Packaging www.national.com/packaging Power Management www.national.com/power Green Compliance www.national.com/quality/green Switching Regulators www.national.com/switchers Distributors www.national.com/contacts LDOs www.national.com/ldo Quality and Reliability www.national.com/quality LED Lighting www.national.com/led Feedback/Support www.national.com/feedback Voltage References www.national.com/vref Design Made Easy www.national.com/easy www.national.com/powerwise Applications & Markets www.national.com/solutions Mil/Aero www.national.com/milaero PowerWise® Solutions Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors SolarMagic™ www.national.com/solarmagic PLL/VCO www.national.com/wireless www.national.com/training PowerWise® Design University THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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