LMC6001AIN

LMC6001 www.ti.com SNOS694F – MAY 2004 – REVISED NOVEMBER 2009 LMC6001 Ultra Ultra-Low Input Current Amplifier Check for Samples: LMC6001 FEATURES DESCRIPTION • • • • • • Featuring 100% tested input currents of 25 fA max., low operating power, and ESD protection of 2000V, the LMC6001 achieves a new industry benchmark for low input current operational amplifiers. By tightly controlling the molding compound, Texas Instruments is able to offer this ultra-low input current in a lower cost molded package. 1 2 (Max limit, 25°C unless otherwise noted) Input Current (100% tested): 25 fA Input Current over Temp.: 2 pA Low Power: 750 μA Low VOS: 350 μV Low Noise: 22 nV/√Hz @1 kHz Typ. APPLICATIONS • • • • Electrometer Amplifier Photodiode Preamplifier Ion Detector A.T.E. Leakage Testing To avoid long turn-on settling times common in other low input current opamps, the LMC6001A is tested 3 times in the first minute of operation. Even units that meet the 25 fA limit are rejected if they drift. Because of the ultra-low input current noise of 0.13 fA/√Hz, the LMC6001 can provide almost noiseless amplification of high resistance signal sources. Adding only 1 dB at 100 kΩ, 0.1 dB at 1 MΩ and 0.01 dB or less from 10 MΩ to 2,000 MΩ, the LMC6001 is an almost noiseless amplifier. The LMC6001 is ideally suited for electrometer applications requiring ultra-low input leakage such as sensitive photodetection transimpedance amplifiers and sensor amplifiers. Since input referred noise is only 22 nV/√Hz, the LMC6001 can achieve higher signal to noise ratio than JFET input type electrometer amplifiers. Other applications of the LMC6001 include long interval integrators, ultra-high input impedance instrumentation amplifiers, and sensitive electrical-field measurement circuits. Connection Diagram Figure 1. 8-Pin PDIP (Top View) See P Package Figure 2. 8-Pin TO-99 (Top View) See LMC Package These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2009, Texas Instruments Incorporated LMC6001 SNOS694F – MAY 2004 – REVISED NOVEMBER 2009 www.ti.com Absolute Maximum Ratings (1) (2) Differential Input Voltage ±Supply Voltage (V+) + 0.3V, (V−) − 0.3V Voltage at Input/Output Pin Supply Voltage (V+ − V−) −0.3V to +16V Output Short Circuit to V+ See (3) (4) − See (3) Output Short Circuit to V (Soldering, 10 Sec.) Lead Temperature 260°C −65°C to +150°C Storage Temperature Junction Temperature 150°C Current at Input Pin ±10 mA Current at Output Pin ±30 mA Current at Power Supply Pin 40 mA Power Dissipation See (5) (5) 2 kV ESD Tolerance (1) (2) (3) (4) (5) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely affect reliability. Do not connect the output to V+, when V+ is greater than 13V or reliability will be adversely affected. Human body model, 1.5 kΩ in series with 100 pF. Operating Ratings (1) −40°C ≤ TJ ≤ +85°C Temperature Range (LMC6001AI, LMC6001BI, LMC6001CI) 4.5V ≤ V+ ≤ 15.5V Supply Voltage Thermal Resistance (2) θJA, P Package 100°C/W θJA, LMC Package 145°C/W θJC, LMC Package 45°C/W See (3) Power Dissipation (1) (2) (3) 2 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. All numbers apply for packages soldered directly into a printed circuit board. For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD = (TJ − TA)/θJA. Submit Documentation Feedback Copyright © 2004–2009, Texas Instruments Incorporated Product Folder Links: LMC6001 LMC6001 www.ti.com SNOS694F – MAY 2004 – REVISED NOVEMBER 2009 DC Electrical Characteristics Limits in standard typeface guaranteed for TJ = 25°C and limits in boldface type apply at the temperature extremes. Unless otherwise specified, V+ = 5V, V− = 0V, VCM = 1.5V, and RL > 1M. Symbol IB Conditions Parameter Input Current IOS Input Offset Current VOS Input Offset Voltage Either Input, VCM = 0V, VS = ±5V Typical (1) Limits (2) LMC6001AI 10 5 VS = ±5V, VCM = 0V TCVOS Input Offset Voltage Drift 2.5 RIN Input Resistance >1 CMRR Common Mode +PSRR 0V ≤ VCM ≤ 7.5V 83 V = 10V Positive Power Supply 5V ≤ V+ ≤ 15V Negative Power Large Signal Voltage Gain Sourcing, RL = 2 kΩ (3) Sinking, RL = 2 kΩ VCM VO Input Common-Mode Voltage Output Swing (3) V+ = 5V and 15V For CMRR ≥ 60 dB V+ = 5V RL = 2 kΩ to 2.5V Output Current Sourcing, V+ = 5V, VO = 0V (1) (2) (3) (4) 0.35 1.0 1.0 1.0 1.7 2.0 0.7 1.35 1.35 1.35 2.0 10 10 66 63 63 94 80 74 74 77 71 71 1400 400 300 300 300 200 200 350 180 90 90 100 60 60 −0.4 −0.1 −0.1 −0.1 0 0 0 V+ − 1.9 V+ − 2.3 V+ − 2.3 V+ − 2.3 V+ − 2.5 V+ − 2.5 V+ − 2.5 4.80 4.75 4.75 4.73 4.67 4.67 0.14 0.20 0.20 0.17 0.24 0.24 14.50 14.37 14.37 14.34 14.25 14.25 0.35 0.44 0.44 0.45 0.56 0.56 16 13 13 10 8 8 16 13 13 13 10 10 28 23 23 22 18 18 28 23 23 22 18 18 14.63 22 Sourcing, V+ = 15V, VO = 0V 30 34 fA mV μV/°C 70 4.87 Units Tera Ω 63 21 Sinking, V = 15V, VO = 13V (4) 2000 66 Sinking, V+ = 5V, VO = 5V + 2000 68 0.26 IO 4000 1000 73 0.10 V+ = 15V RL = 2 kΩ to 7.5V 1000 72 Supply Rejection Ratio AV 100 4000 66 83 0V ≥ V− ≥ −10V 25 2000 72 Rejection Ratio −PSRR LMC6001CI 75 + Rejection Ratio LMC6001BI dB min V/mV min V max V min V min V max V min V max mA min Typical values represent the most likely parametric norm. All limits are guaranteed by testing or statistical analysis. V+ = 15V, VCM = 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V ≤ VO ≤ 11.5V. For Sinking tests, 2.5V ≤ VO ≤ 7.5V. Do not connect the output to V+, when V+ is greater than 13V or reliability will be adversely affected. Submit Documentation Feedback Copyright © 2004–2009, Texas Instruments Incorporated Product Folder Links: LMC6001 3 LMC6001 SNOS694F – MAY 2004 – REVISED NOVEMBER 2009 www.ti.com DC Electrical Characteristics (continued) Limits in standard typeface guaranteed for TJ = 25°C and limits in boldface type apply at the temperature extremes. Unless otherwise specified, V+ = 5V, V− = 0V, VCM = 1.5V, and RL > 1M. Symbol IS Conditions Parameter Supply Current V+ = 5V, VO = 1.5V V+ = 15V, VO = 7.5V Typical (1) Limits (2) LMC6001AI LMC6001BI LMC6001CI 750 750 750 900 900 900 850 850 850 950 950 950 450 550 Units μA max AC Electrical Characteristics Limits in standard typeface guaranteed for TJ = 25°C and limits in boldface type apply at the temperature extremes. Unless otherwise specified, V+ = 5V, V− = 0V, VCM = 1.5V and RL > 1M. Symbol Parameter Conditions See (3) Typical (1) LM6001AI LM6001BI LM6001CI 0.8 0.8 0.8 0.6 0.6 0.6 Units SR Slew Rate GBW Gain-Bandwidth Product 1.3 MHz φfm Phase Margin 50 Deg GM Gain Margin 17 dB en Input-Referred Voltage Noise F = 1 kHz 22 nV/√Hz in Input-Referred Current Noise F = 1 kHz 0.13 fA/√Hz THD Total Harmonic Distortion F = 10 kHz, AV = −10, RL = 100 kΩ, VO = 8 VPP 0.01 (1) (2) (3) 4 1.5 Limits (2) V/μs min % Typical values represent the most likely parametric norm. All limits are guaranteed by testing or statistical analysis. V+ = 15V. Connected as Voltage Follower with 10V step input. Limit specified is the lower of the positive and negative slew rates. Submit Documentation Feedback Copyright © 2004–2009, Texas Instruments Incorporated Product Folder Links: LMC6001 LMC6001 www.ti.com SNOS694F – MAY 2004 – REVISED NOVEMBER 2009 Typical Performance Characteristics VS = ±7.5V, TA = 25°C, unless otherwise specified Input Current vs. Temperature Input Current vs. VCM VS = ±5V INPUT BIAS CURRENT 100 pA 10 pA 1 pA 100 fA 10 fA 1 fA 0 25 50 75 100 TEMPERATURE (°C) 125 Figure 3. Figure 4. Supply Current vs. Supply Voltage Input Voltage vs.Output Voltage Figure 5. Figure 6. Common Mode Rejection Ratio vs. Frequency Power Supply Rejection Ratio vs. Frequency Figure 7. Figure 8. Submit Documentation Feedback Copyright © 2004–2009, Texas Instruments Incorporated Product Folder Links: LMC6001 5 LMC6001 SNOS694F – MAY 2004 – REVISED NOVEMBER 2009 www.ti.com Typical Performance Characteristics (continued) VS = ±7.5V, TA = 25°C, unless otherwise specified 6 Input Voltage Noise vs. Frequency Noise Figure vs. Source Resistance Figure 9. Figure 10. Output Characteristics Sourcing Current Output Characteristics Sinking Current Figure 11. Figure 12. Gain and Phase Response vs. Temperature (−55°C to +125°C) Gain and Phase Response vs. Capacitive Load with RL = 500 kΩ Figure 13. Figure 14. Submit Documentation Feedback Copyright © 2004–2009, Texas Instruments Incorporated Product Folder Links: LMC6001 LMC6001 www.ti.com SNOS694F – MAY 2004 – REVISED NOVEMBER 2009 Typical Performance Characteristics (continued) VS = ±7.5V, TA = 25°C, unless otherwise specified Open Loop Frequency Response Inverting Small Signal Pulse Response Figure 15. Figure 16. Inverting Large Signal Pulse Response Non-Inverting Small Signal Pulse Response Figure 17. Figure 18. Non-Inverting Large Signal Pulse Response Stability vs. Capacitive Load Figure 19. Figure 20. Submit Documentation Feedback Copyright © 2004–2009, Texas Instruments Incorporated Product Folder Links: LMC6001 7 LMC6001 SNOS694F – MAY 2004 – REVISED NOVEMBER 2009 www.ti.com APPLICATIONS HINTS AMPLIFIER TOPOLOGY The LMC6001 incorporates a novel op-amp design topology that enables it to maintain rail-to-rail output swing even when driving a large load. Instead of relying on a push-pull unity gain output buffer stage, the output stage is taken directly from the internal integrator, which provides both low output impedance and large gain. Special feed-forward compensation design techniques are incorporated to maintain stability over a wider range of operating conditions than traditional op-amps. These features make the LMC6001 both easier to design with, and provide higher speed than products typically found in this low power class. COMPENSATING FOR INPUT CAPACITANCE It is quite common to use large values of feedback resistance for amplifiers with ultra-low input current, like the LMC6001. Although the LMC6001 is highly stable over a wide range of operating conditions, certain precautions must be met to achieve the desired pulse response when a large feedback resistor is used. Large feedback resistors with even small values of input capacitance, due to transducers, photodiodes, and circuit board parasitics, reduce phase margins. When high input impedances are demanded, guarding of the LMC6001 is suggested. Guarding input lines will not only reduce leakage, but lowers stray input capacitance as well. See PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-IMPEDANCE WORK. The effect of input capacitance can be compensated for by adding a capacitor, Cf, around the feedback resistors (as in Figure 21) such that: (1) or R1 CIN ≤ R2 Cf (2) Since it is often difficult to know the exact value of CIN, Cf can be experimentally adjusted so that the desired pulse response is achieved. Refer to the LMC660 and LMC662 for a more detailed discussion on compensating for input capacitance. Figure 21. Cancelling the Effect of Input Capacitance CAPACITIVE LOAD TOLERANCE All rail-to-rail output swing operational amplifiers have voltage gain in the output stage. A compensation capacitor is normally included in this integrator stage. The frequency location of the dominant pole is affected by the resistive load on the amplifier. Capacitive load driving capability can be optimized by using an appropriate resistive load in parallel with the capacitive load. See Typical Performance Characteristics. Direct capacitive loading will reduce the phase margin of many op-amps. A pole in the feedback loop is created by the combination of the op-amp's output impedance and the capacitive load. This pole induces phase lag at the unity-gain crossover frequency of the amplifier resulting in either an oscillatory or underdamped pulse response. With a few external components, op amps can easily indirectly drive capacitive loads, as shown in Figure 22. 8 Submit Documentation Feedback Copyright © 2004–2009, Texas Instruments Incorporated Product Folder Links: LMC6001 LMC6001 www.ti.com SNOS694F – MAY 2004 – REVISED NOVEMBER 2009 Figure 22. LMC6001 Noninverting Gain of 10 Amplifier, Compensated to Handle Capacitive Loads In the circuit of Figure 22, R1 and C1 serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier's inverting input, thereby preserving phase margin in the overall feedback loop. Capacitive load driving capability is enhanced by using a pullup resistor to V+ (Figure 23). Typically a pullup resistor conducting 500 μA or more will significantly improve capacitive load responses. The value of the pullup resistor must be determined based on the current sinking capability of the amplifier with respect to the desired output swing. Open loop gain of the amplifier can also be affected by the pullup resistor. See DC Electrical Characteristics. Figure 23. Compensating for Large Capacitive Loads with a Pullup Resistor PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-IMPEDANCE WORK It is generally recognized that any circuit which must operate with less than 1000 pA of leakage current requires special layout of the PC board. When one wishes to take advantage of the ultra-low bias current of the LMC6001, typically less than 10 fA, it is essential to have an excellent layout. Fortunately, the techniques of obtaining low leakages are quite simple. First, the user must not ignore the surface leakage of the PC board, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust or contamination, the surface leakage will be appreciable. To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LMC6001's inputs and the terminals of capacitors, diodes, conductors, resistors, relay terminals, etc., connected to the op-amp's inputs, as in Figure 24. To have a significant effect, guard rings should be placed on both the top and bottom of the PC board. This PC foil must then be connected to a voltage which is at the same voltage as the amplifier inputs, since no leakage current can flow between two points at the same potential. For example, a PC board trace-to-pad resistance of 1012Ω, which is normally considered a very large resistance, could leak 5 pA if the trace were a 5V bus adjacent to the pad of the input. This would cause a 500 times degradation from the LMC6001's actual performance. If a guard ring is used and held within 1 mV of the inputs, then the same resistance of 1012Ω will only cause 10 fA of leakage current. Even this small amount of leakage will degrade the extremely low input current performance of the LMC6001. See Figure 27 for typical connections of guard rings for standard op-amp configurations. Submit Documentation Feedback Copyright © 2004–2009, Texas Instruments Incorporated Product Folder Links: LMC6001 9 LMC6001 SNOS694F – MAY 2004 – REVISED NOVEMBER 2009 www.ti.com Figure 24. Examples of Guard Ring in PC Board Layout Figure 25. Inverting Amplifier Figure 26. Non-Inverting Amplifier Figure 27. Typical Connections of Guard Rings The designer should be aware that when it is inappropriate to lay out a PC board for the sake of just a few circuits, there is another technique which is even better than a guard ring on a PC board: Don't insert the amplifier's input pin into the board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Figure 28. 10 Submit Documentation Feedback Copyright © 2004–2009, Texas Instruments Incorporated Product Folder Links: LMC6001 LMC6001 www.ti.com SNOS694F – MAY 2004 – REVISED NOVEMBER 2009 (Input pins are lifted out of PC board and soldered directly to components. All other pins connected to PC board). Figure 28. Air Wiring Another potential source of leakage that might be overlooked is the device package. When the LMC6001 is manufactured, the device is always handled with conductive finger cots. This is to assure that salts and skin oils do not cause leakage paths on the surface of the package. We recommend that these same precautions be adhered to, during all phases of inspection, test and assembly. LATCHUP CMOS devices tend to be susceptible to latchup due to their internal parasitic SCR effects. The (I/O) input and output pins look similar to the gate of the SCR. There is a minimum current required to trigger the SCR gate lead. The LMC6001 is designed to withstand 100 mA surge current on the I/O pins. Some resistive method should be used to isolate any capacitance from supplying excess current to the I/O pins. In addition, like an SCR, there is a minimum holding current for any latchup mode. Limiting current to the supply pins will also inhibit latchup susceptibility. Typical Applications The extremely high input resistance, and low power consumption, of the LMC6001 make it ideal for applications that require battery-powered instrumentation amplifiers. Examples of these types of applications are hand-held pH probes, analytic medical instruments, electrostatic field detectors and gas chromotographs. TWO OPAMP, TEMPERATURE COMPENSATED pH PROBE AMPLIFIER The signal from a pH probe has a typical resistance between 10 MΩ and 1000 MΩ. Because of this high value, it is very important that the amplifier input currents be as small as possible. The LMC6001 with less than 25 fA input current is an ideal choice for this application. The theoretical output of the standard Ag/AgCl pH probe is 59.16 mV/pH at 25°C with 0V out at a pH of 7.00. This output is proportional to absolute temperature. To compensate for this, a temperature compensating resistor, R1, is placed in the feedback loop. This cancels the temperature dependence of the probe. This resistor must be mounted where it will be at the same temperature as the liquid being measured. The LMC6001 amplifies the probe output providing a scaled voltage of ±100 mV/pH from a pH of 7. The second opamp, a micropower LMC6041 provides phase inversion and offset so that the output is directly proportional to pH, over the full range of the probe. The pH reading can now be directly displayed on a low cost, low power digital panel meter. Total current consumption will be about 1 mA for the whole system. The micropower dual operational amplifier, LMC6042, would optimize power consumption but not offer these advantages: 1. The LMC6001A guarantees a 25 fA limit on input current at 25°C. 2. The input ESD protection diodes in the LMC6042 are only rated at 500V while the LMC6001 has much more robust protection that is rated at 2000V. The setup and calibration is simple with no interactions to cause problems. 1. Disconnect the pH probe and with R3 set to about mid-range and the noninverting input of the LMC6001 grounded, adjust R8 until the output is 700 mV. 2. Apply −414.1 mV to the noninverting input of the LMC6001. Adjust R3 for and output of 1400 mV. This completes the calibration. As real pH probes may not perform exactly to theory, minor gain and offset adjustments should be made by trimming while measuring a precision buffer solution. Submit Documentation Feedback Copyright © 2004–2009, Texas Instruments Incorporated Product Folder Links: LMC6001 11 LMC6001 SNOS694F – MAY 2004 – REVISED NOVEMBER 2009 www.ti.com R1 100k + 3500 ppm/°C R2 68.1k R3, 8 5k R4, 9 100k R5 36.5k R6 619k R7 97.6k D1 LM4040D1Z-2.5 C1 2.2 μF (1) Micro-ohm style 137 or similar Figure 29. pH Probe Amplifier ULTRA-LOW INPUT CURRENT INSTRUMENTATION AMPLIFIER Figure 30 shows an instrumentation amplifier that features high differential and common mode input resistance (>1014Ω), 0.01% gain accuracy at AV = 1000, excellent CMRR with 1 MΩ imbalance in source resistance. Input current is less than 20 fA and offset drift is less than 2.5 μV/°C. R2 provides a simple means of adjusting gain over a wide range without degrading CMRR. R7 is an initial trim used to maximize CMRR without using super precision matched resistors. For good CMRR over temperature, low drift resistors should be used. If R1 = R5, R3 = R6, and R4 = R7; then ∴AV ≈ 100 for circuit shown (R2 = 9.85k). Figure 30. Instrumentation Amplifier 12 Submit Documentation Feedback Copyright © 2004–2009, Texas Instruments Incorporated Product Folder Links: LMC6001 PACKAGE OPTION ADDENDUM www.ti.com 9-Mar-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) LMC6001AIN ACTIVE PDIP P 8 40 TBD Call TI Call TI -40 to 85 LMC6001 AIN LMC6001AIN/NOPB ACTIVE PDIP P 8 40 Green (RoHS & no Sb/Br) SN Level-1-NA-UNLIM -40 to 85 LMC6001 AIN LMC6001BIN ACTIVE PDIP P 8 40 TBD Call TI Call TI -40 to 85 LMC6001 BIN LMC6001BIN/NOPB ACTIVE PDIP P 8 40 Green (RoHS & no Sb/Br) SN Level-1-NA-UNLIM -40 to 85 LMC6001 BIN (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Only one of markings shown within the brackets will appear on the physical device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 9-Mar-2013 Addendum-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications. In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms. No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of non-designated products, TI will not be responsible for any failure to meet ISO/TS16949. Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2013, Texas Instruments Incorporated