LMC6034IM-NS

National Semiconductor is now part of Texas Instruments. Search http://www.ti.com/ for the latest technical information and details on our current products and services. LMC6034 CMOS Quad Operational Amplifier General Description The LMC6034 is a CMOS quad operational amplifier which can operate from either a single supply or dual supplies. Its performance features include an input common-mode range that reaches ground, low input bias current, and high voltage gain into realistic loads, such as 2 kΩ and 600Ω. This chip is built with National’s advanced Double-Poly Silicon-Gate CMOS process. See the LMC6032 datasheet for a CMOS dual operational amplifier with these same features. For higher performance characteristics refer to the LMC660. Features n Specified for 2 kΩ and 600Ω loads n High voltage gain: 126 dB n n n n n n n n Low offset voltage drift: 2.3 µV/˚C Ultra low input bias current: 40 fA Input common-mode range includes V− Operating Range from +5V to +15V supply ISS = 400 µA/amplifier; independent of V+ Low distortion: 0.01% at 10 kHz Slew rate: 1.1 V/µs Improved performance over TLC274 Applications n n n n n High-impedance buffer or preamplifier Current-to-voltage converter Long-term integrator Sample-and-hold circuit Medical instrumentation Connection Diagram 14-Pin DIP/SO 01113401 Top View Guard Ring Connections Non-Inverting Amplifier 01113408 © 2004 National Semiconductor Corporation DS011134 www.national.com LMC6034 CMOS Quad Operational Amplifier August 2000 LMC6034 Absolute Maximum Ratings (Note 1) Current at Input Pin ± 5 mA If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Current at Power Supply Pin 35 mA Junction Temperature (Note 3) 150˚C ESD Tolerance (Note 4) 1000V ± Supply Voltage Differential Input Voltage Supply Voltage (V+ − V−) 16V Output Short Circuit to V+ (Note 10) Output Short Circuit to V− (Note 2) Lead Temperature (Soldering, 10 sec.) Operating Ratings(Note 1) Supply Voltage Range 260˚C Storage Temperature Range (Note 11) Thermal Resistance (θJA), (Note 12) (Note 3) Voltage at Output/Input Pin 4.75V to 15.5V Power Dissipation −65˚C to +150˚C Power Dissipation −40˚C ≤ TJ ≤ +85˚C Temperature Range (V ) +0.3V, (V ) −0.3V 14-Pin DIP 85˚C/W ± 18 mA 14-Pin SO 115˚C/W + Current at Output Pin − DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C. Boldface limits apply at the temperature extremes. V+ = 5V, V− = GND = 0V, VCM = 1.5V, VOUT = 2.5V, and RL > 1M unless otherwise specified. Symbol Parameter Conditions Typical (Note 5) LMC6034I Units Limit (Note 6) VOS ∆VOS/∆T Input Offset Voltage 1 Input Offset Voltage 9 mV 11 max 2.3 µV/˚C Average Drift IB IOS RIN CMRR +PSRR −PSRR Input Bias Current 0.04 Input Offset Current AV Common Mode 0V ≤ VCM ≤ 12V Rejection Ratio V+ = 15V Positive Power Supply 5V ≤ V+ ≤ 15V Rejection Ratio VO = 2.5V Negative Power Supply 0V ≤ V− ≤ −10V 83 83 94 max pA Input Common-Mode V+ = 5V & 15V Voltage Range For CMRR ≥ 50 dB RL = 2 kΩ (Note 7) Sinking min 63 dB 60 min dB −0.4 −0.1 V 0 max V+ − 1.9 V+ − 2.3 V V+ − 2.6 min 200 V/mV 2000 1000 250 2 dB 60 min Sourcing Sinking 63 70 500 RL = 600Ω (Note 7) TeraΩ 74 Sourcing www.national.com 100 >1 Input Resistance Large Signal Voltage Gain max 0.01 Rejection Ratio VCM pA 200 100 min 90 V/mV 40 min 100 V/mV 75 min 50 V/mV 20 min Symbol Parameter Conditions Typical (Note 5) LMC6034I Units Limit (Note 6) VO Output Voltage Swing V+ = 5V 4.87 RL = 2 kΩ to 2.5V 0.10 V+ = 5V 4.61 RL = 600Ω to 2.5V 0.30 V+ = 15V 14.63 V+ = 5V VO = 1.5V 3 min 0.63 V 0.75 max 0.55 max 12.50 V 12.00 min 1.45 V 1.75 max 40 All Four Amplifiers 3.80 13.90 39 (Note 10) Supply Current V V Sourcing, VO = 0V IS 4.00 0.45 21 Sinking, VO = 13V max 0.26 Sourcing, VO = 0V V+ = 15V V 0.35 V 22 Sinking, VO = 5V min 0.25 min 0.79 Output Current 4.00 13.00 RL = 600Ω to 7.5V IO V 13.50 RL = 2 kΩ to 7.5V V+ = 15V 4.20 1.5 13 mA 9 min 13 mA 9 min 23 mA 15 min 23 mA 15 min 2.7 mA 3.0 max www.national.com LMC6034 Unless otherwise specified, all limits guaranteed for TJ = 25˚C. Boldface limits apply at the temperature extremes. V+ = 5V, V− = GND = 0V, VCM = 1.5V, VOUT = 2.5V, and RL > 1M unless otherwise specified. LMC6034 AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C. Boldface limits apply at the temperature extremes. V+ = 5V, V− = GND = 0V, VCM = 1.5V, VOUT = 2.5V, and RL > 1M unless otherwise specified. Symbol Parameter Conditions Typical (Note 5) LMC6034I Units Limit (Note 6) SR Slew Rate (Note 8) 1.1 0.8 V/µs GBW Gain-Bandwidth Product 1.4 MHz φM Phase Margin 50 Deg GM Gain Margin 0.4 min 17 dB Amp-to-Amp Isolation (Note 9) 130 dB en Input-Referred Voltage Noise F = 1 kHz 22 in Input-Referred Current Noise F = 1 kHz 0.0002 THD Total Harmonic Distortion F = 10 kHz, AV = −10 RL = 2 kΩ, VO = 8 VPP 0.01 % ± 5V Supply Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Note 2: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature and/or multiple Op Amp shorts can result in exceeding the maximum allowed junction temperature of 150˚C. Output currents in excess of ± 30 mA over long term may adversely affect reliability. Note 3: The maximum power dissipation is a function of TJ(max), θJA, TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max)–TA)/θJA. Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor. Note 5: Typical values represent the most likely parametric norm. Note 6: All limits are guaranteed at room temperature (standard type face) or at operating temperature extremes (bold type face). Note 7: V+ = 15V, VCM = 7.5V, and RL connected to 7.5V. For Sourcing tests, 7.5V ≤ VO ≤ 11.5V. For Sinking tests, 2.5V ≤ VO ≤ 7.5V. Note 8: V+ = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates. Note 9: Input referred. V+ = 15V and RL = 10 kΩ connected to V+/2. Each amp excited in turn with 1 kHz to produce VO = 13 VPP. Note 10: Do not connect output to V+, when V+ is greater than 13V or reliability may be adversely affected. Note 11: For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD = (TJ − TA)/θJA. Note 12: All numbers apply for packages soldered directly into a PC board. Typical Performance Characteristics VS = ± 7.5V, TA = 25˚C unless otherwise specified Supply Current vs Supply Voltage Input Bias Current 01113424 01113423 www.national.com 4 Output Characteristics Current Sinking (Continued) Output Characteristics Current Sourcing 01113425 01113427 Input Voltage Noise vs Frequency CMRR vs Frequency 01113428 01113429 Open-Loop Frequency Response Frequency Response vs Capacitive Load 01113431 01113430 5 www.national.com LMC6034 Typical Performance Characteristics VS = ±7.5V, TA = 25˚C unless otherwise specified LMC6034 Typical Performance Characteristics VS = ±7.5V, TA = 25˚C unless otherwise specified Non-Inverting Large Signal Pulse Response (Continued) Stability vs Capacitive Load 01113433 01113432 Stability vs Capacitive Load 01113403 01113434 FIGURE 1. LMC6034 Circuit Topology (Each Amplifier) Note: Avoid resistive loads of less than 500Ω, as they may cause instability. The large signal voltage gain while sourcing is comparable to traditional bipolar op amps, even with a 600Ω load. The gain while sinking is higher than most CMOS op amps, due to the additional gain stage; however, under heavy load (600Ω) the gain will be reduced as indicated in the Electrical Characteristics. Compensating Input Capacitance The high input resistance of the LMC6034 op amps allows the use of large feedback and source resistor values without losing gain accuracy due to loading. However, the circuit will be especially sensitive to its layout when these large-value resistors are used. Every amplifier has some capacitance between each input and AC ground, and also some differential capacitance between the inputs. When the feedback network around an amplifier is resistive, this input capacitance (along with any additional capacitance due to circuit board traces, the socket, etc.) and the feedback resistors create a pole in the feedback path. In the following General Operational Amplifier circuit, Figure 2 the frequency of this pole is Applications Hint Amplifier Topolgy The topology chosen for the LMC6034, shown in Figure 1, is unconventional (compared to general-purpose op amps) in that the traditional unity-gain buffer output stage is not used; instead, the output is taken directly from the output of the integrator, to allow a larger output swing. Since the buffer traditionally delivers the power to the load, while maintaining high op amp gain and stability, and must withstand shorts to either rail, these tasks now fall to the integrator. As a result of these demands, the integrator is a compound affair with an embedded gain stage that is doubly fed forward (via Cf and Cff) by a dedicated unity-gain compensation driver. In addition, the output portion of the integrator is a push-pull configuration for delivering heavy loads. While sinking current the whole amplifier path consists of three gain stages with one stage fed forward, whereas while sourcing the path contains four gain stages with two fed forward. where CS is the total capacitance at the inverting input, including amplifier input capcitance and any stray capacitance from the IC socket (if one is used), circuit board traces, www.national.com 6 Note that these capacitor values are usually significantly smaller than those given by the older, more conservative formula: (Continued) etc., and RP is the parallel combination of RF and RIN. This formula, as well as all formulae derived below, apply to inverting and non-inverting op-amp configurations. When the feedback resistors are smaller than a few kΩ, the frequency of the feedback pole will be quite high, since CS is generally less than 10 pF. If the frequency of the feedback pole is much higher than the “ideal” closed-loop bandwidth (the nominal closed-loop bandwidth in the absence of CS), the pole will have a negligible effect on stability, as it will add only a small amount of phase shift. However, if the feedback pole is less than approximately 6 to 10 times the “ideal” −3 dB frequency, a feedback capacitor, CF, should be connected between the output and the inverting input of the op amp. This condition can also be stated in terms of the amplifier’s low-frequency noise gain: To maintain stability a feedback capacitor will probably be needed if 01113404 CS consists of the amplifier’s input capacitance plus any stray capacitance from the circuit board and socket. CF compensates for the pole caused by CS and the feedback resistors. where FIGURE 2. General Operational Amplifier Circuit Using the smaller capacitors will give much higher bandwidth with little degradation of transient response. It may be necessary in any of the above cases to use a somewhat larger feedback capacitor to allow for unexpected stray capacitance, or to tolerate additional phase shifts in the loop, or excessive capacitive load, or to decrease the noise or bandwidth, or simply because the particular circuit implementation needs more feedback capacitance to be sufficiently stable. For example, a printed circuit board’s stray capacitance may be larger or smaller than the breadboard’s, so the actual optimum value for CF may be different from the one estimated using the breadboard. In most cases, the values of CF should be checked on the actual circuit, starting with the computed value. is the amplifier’s low-frequency noise gain and GBW is the amplifier’s gain bandwidth product. An amplifier’s lowfrequency noise gain is represented by the formula regardless of whether the amplifier is being used in inverting or non-inverting mode. Note that a feedback capacitor is more likely to be needed when the noise gain is low and/or the feedback resistor is large. If the above condition is met (indicating a feedback capacitor will probably be needed), and the noise gain is large enough that: Capacitive Load Tolerance Like many other op amps, the LMC6034 may oscillate when its applied load appears capacitive. The threshold of oscillation varies both with load and circuit gain. The configuration most sensitive to oscillation is a unity-gain follower. See Typical Performance Characteristics. The load capacitance interacts with the op amp’s output resistance to create an additional pole. If this pole frequency is sufficiently low, it will degrade the op amp’s phase margin so that the amplifier is no longer stable at low gains. As shown in Figure 3, the addition of a small resistor (50Ω to 100Ω) in series with the op amp’s output, and a capacitor (5 pF to 10 pF) from inverting input to output pins, returns the phase margin to a safe value without interfering with lowerfrequency circuit operation. Thus larger values of capacitance can be tolerated without oscillation. Note that in all cases, the output will ring heavily when the load capacitance is near the threshold for oscillation. the following value of feedback capacitor is recommended: If the feedback capacitor should be: 7 www.national.com LMC6034 Applications Hint LMC6034 Applications Hint actual performance. However, if a guard ring is held within 5 mV of the inputs, then even a resistance of 1011Ω would cause only 0.05 pA of leakage current, or perhaps a minor (2:1) degradation of the amplifier’s performance. See Figures 6, 7, 8 for typical connections of guard rings for standard op-amp configurations. If both inputs are active and at high impedance, the guard can be tied to ground and still provide some protection; see Figure 9. (Continued) 01113405 FIGURE 3. Rx, Cx Improve Capacitive Load Tolerance Capacitive load driving capability is enhanced by using a pull up resistor to V+ (Figure 4). Typically a pull up resistor conducting 500 µA or more will significantly improve capacitive load responses. The value of the pull up resistor must be determined based on the current sinking capability of the amplifier with respect to the desired output swing. Open loop gain of the amplifier can also be affected by the pull up resistor (see Electrical Characteristics). 01113406 FIGURE 5. Example of Guard Ring in P.C. Board Layout 01113422 FIGURE 4. Compensating for Large Capacitive Loads with a Pull Up Resistor PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-IMPEDANCE WORK It is generally recognized that any circuit which must operate with less than 1000 pA of leakage current requires special layout of the PC board. When one wishes to take advantage of the ultra-low bias current of the LMC6034, typically less than 0.04 pA, it is essential to have an excellent layout. Fortunately, the techniques for obtaining low leakages are quite simple. First, the user must not ignore the surface leakage of the PC board, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust or contamination, the surface leakage will be appreciable. To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LMC6034’s inputs and the terminals of capacitors, diodes, conductors, resistors, relay terminals, etc. connected to the op-amp’s inputs. See Figure 5. To have a significant effect, guard rings should be placed on both the top and bottom of the PC board. This PC foil must then be connected to a voltage which is at the same voltage as the amplifier inputs, since no leakage current can flow between two points at the same potential. For example, a PC board trace-to-pad resistance of 1012Ω, which is normally considered a very large resistance, could leak 5 pA if the trace were a 5V bus adjacent to the pad of an input. This would cause a 100 times degradation from the LMC6034’s www.national.com 01113407 FIGURE 6. Guard Ring Connections Inverting Amplifier 01113408 FIGURE 7. Guard Ring Connections Non-Inverting Amplifier 8 (Continued) BIAS CURRENT TESTING The test method of Figure 11 is appropriate for bench-testing bias current with reasonable accuracy. To understand its operation, first close switch S2 momentarily. When S2 is opened, then 01113409 FIGURE 8. Guard Ring Connections Follower 01113412 01113410 FIGURE 11. Simple Input Bias Current Test Circuit FIGURE 9. Guard Ring Connections Howland Current Pump A suitable capacitor for C2 would be a 5 pF or 10 pF silver mica, NPO ceramic, or air-dielectric. When determining the magnitude of Ib−, the leakage of the capacitor and socket must be taken into account. Switch S2 should be left shorted most of the time, or else the dielectric absorption of the capacitor C2 could cause errors. The designer should be aware that when it is inappropriate to lay out a PC board for the sake of just a few circuits, there is another technique which is even better than a guard ring on a PC board: Don’t insert the amplifier’s input pin into the board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Figure 10. Similarly, if S1 is shorted momentarily (while leaving S2 shorted) where Cx is the stray capacitance at the + input. 01113411 (Input pins are lifted out of PC board and soldered directly to components. All other pins connected to PC board.) FIGURE 10. Air Wiring 9 www.national.com LMC6034 Applications Hint LMC6034 Typical Single-Supply Applications Sine-Wave Oscillator (V+ = 5.0 VDC) Additional single-supply applications ideas can be found in the LM324 datasheet. The LMC6034 is pin-for-pin compatible with the LM324 and offers greater bandwidth and input resistance over the LM324. These features will improve the performance of many existing single-supply applications. Note, however, that the supply voltage range of the LMC6034 is smaller than that of the LM324. Low-Leakage Sample-and-Hold 01113415 Oscillator frequency is determined by R1, R2, C1, and C2: fosc = 1/2πRC, where R = R1 = R2 and C = C1 = C2. This circuit, as shown, oscillates at 2.0 kHz with a peak-topeak output swing of 4.0V. 01113413 Instrumentation Amplifier 1 Hz Square-Wave Oscillator 01113416 01113414 Power Amplifier For good CMRR over temperature, low drift resistors should be used. Matching of R3 to R6 and R4 to R7 affect CMRR. Gain may be adjusted through R2. CMRR may be adjusted through R7. www.national.com 01113417 10 LMC6034 Typical Single-Supply Applications High Gain Amplifier with Offset Voltage Reduction (V+ = 5.0 VDC) (Continued) 10 Hz Bandpass Filter 01113418 fO = 10 Hz Q = 2.1 Gain = −8.8 10 Hz High-Pass Filter 01113421 Gain = −46.8 Output offset voltage reduced to the level of the input offset voltage of the bottom amplifier (typically 1 mV). 01113420 fc = 10 Hz d = 0.895 Gain = 1 2 dB passband ripple 1 Hz Low-Pass Filter (Maximally Flat, Dual Supply Only) 01113419 fc = 1 Hz d = 1.414 Gain = 1.57 11 www.national.com LMC6034 Ordering Information Temperature Range Package NSC Drawing Transport Media 14-Pin Small Outline M14A Rail Tape and Reel Industrial−40˚C ≤ TJ ≤ +85˚ LMC6034IM LMC6034IMX www.national.com 12 LMC6034 CMOS Quad Operational Amplifier Physical Dimensions inches (millimeters) unless otherwise noted Small Outline Dual-In-Line Pkg. (M) Order Number LMC6034IM or LMC6034IMX NS Package Number M14A National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. 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