LME49721MABD/NOPB

User's Guide SNAA051A – February 2008 – Revised May 2013 AN-1767 LME49721 Evaluation Board 1 Introduction This application report provides information on how to use the LME49721 demonstration board for evaluation of the LME49721 Rail-to-Rail Input/Output, high performance, high fidelity operational amplifier. The LME49721 demonstration board is designed for the user to fully evaluate the LME49721 in either inverting, non-inverting, or unity gain voltage follower configuration. This board is shown in Figure 1. 2 General Description The LME49721 is a low distortion (THD + N = 0.00008%, AV = 2, VOUT = 4VP-P, fIN = 1kHz), low noise (4nV/√Hz) Rail-to-Rail Input/Output operational amplifier optimized and fully specified for high performance, high fidelity applications. The Rail-to-Rail Input/Output operational amplifier delivers superior signal amplification for outstanding performance. The LME49721 has a slew rate of ±8.5V/μs, an output current capability of ±9.7mA, and an input bias current of 40fA. This operational amplifier can easily drive 10kΩ loads to within 10mV of each power supply voltage. 3 Operating Conditions The LME49721 has a supply voltage range from +2.2V to +5.5V single supply or ±1.1V to ±2.75V dual supply. Please note the demonstration board is designed for dual supply operation only. All trademarks are the property of their respective owners. SNAA051A – February 2008 – Revised May 2013 Submit Documentation Feedback AN-1767 LME49721 Evaluation Board Copyright © 2008–2013, Texas Instruments Incorporated 1 Demonstration Board Schematic 4 www.ti.com Demonstration Board Schematic JP1 R3 JMPR1 JP2 R2 JMPR2 P1 R1 - JMPR3 + 1 2 + VDD 1 2 R4 P2 C3 JP5 JP3 1 2 3 R8 C2 JMPR4 C1 + JP4 VSS R7 JMPR5 - JMPR6 P3 R6 + 1 2 C4 1 2 R9 P4 Figure 1. LME49721 Demo Board Schematic Table 1. Demo Board Connections 2 Designator Label Function JP1 OUT_1 Output Signal A JP2 IN_1 Input Signal A JP3 OUT_2 Output Signal B JP4 IN_2 Input Signal B JP5 +VDD GND -VSS Power Supply Connections P1 OUT_1 Output Signal A P2 IN_1 Input Signal A P3 OUT_2 Output Signal B P4 IN_2 Input Signal B AN-1767 LME49721 Evaluation Board SNAA051A – February 2008 – Revised May 2013 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Configuring the LME49721 Amplifier www.ti.com 5 Configuring the LME49721 Amplifier 5.1 Inverting Configuration Figure 2 shows the typical connection for a inverting amplifier. The output voltage is centered on zero with a gain of AV = -R2/R3. Table 2 shows the recommended Bill of Materials for an inverting amplifier. R3 JP2 1 2 JMPR1 0: JP1 R2 1 k: 1 k: JMPR2 R1 - JMPR3 1 2 P1 0: + R4 0: P2 Figure 2. Inverting Amplifier You can configure the LME49721 demonstration board in an inverting configuration by making the following changes: 1. Place 0Ω resistor (or short) JMPR1 (JMPR4). 2. Place 0Ω resistor (or short) R4 (R9). 3. Place the desired value resistor (1kΩ minimum) to set the inverting gain in R3 (R8) and R2 (R7). 4. Leave the JMPR2 (JMPR5) and JMPR3 (JMPR6) open. 5. Place 0Ω resistor (or short) R1 (R6). Table 2. Example Demonstration Board Bill of Materials for Inverting Configuration Description Designator Part Number Manufacturer Ceramic Capacitor 0.1μF, 10% 50V 0805 SMD C1, C2 C0805C104K3RAC7533 Kemet Tantalum Capacitor 10μF, 10% 20V, B-size C3, C4 T491B106K025AT Kemet Resistor 0 Ω, 1/8W 1% 0805 SMD JMPR1, JMPR4, R1, R4, R6, R9 CRCW0805000020EA Vishay Resistor 10kΩ, 1/8W, 1% 0805 SMD R2, R3, R8, R7 CRCW080510KOFKEA Vishay Header, 2–Pin JP1, JP2, JP3, JP4 Header, 3–Pin JP5 SMA standup connectors P1–P4 (Optional) 132134 Amphenol Connex SNAA051A – February 2008 – Revised May 2013 Submit Documentation Feedback AN-1767 LME49721 Evaluation Board Copyright © 2008–2013, Texas Instruments Incorporated 3 Configuring the LME49721 Amplifier 5.2 www.ti.com Non-Inverting Configuration Figure 3 shows the typical connection for a non-inverting amplifier. Again the output voltage is centered on zero but with a gain of AV = 1+ (R2/R3). Table 3 shows the recommended Bill of Materials for a noninverting amplifier. JMPR2 0: JMPR1 JP2 JP1 R2 1 k: R3 1 k: 1 2 R1 JMPR3 0: - P1 0: + 1 2 R4 P2 Figure 3. Non-Inverting Amplifier You can configure the LME49721 demonstration board in Non-Inverting configuration by making the following changes: 1. Place 0Ω resistor (or short) JMPR2 (JMPR5) and JMPR3 (JMPR6). 2. Place the desired value resistors (1kΩ minimum) to set inverting gain in R3 (R8) and R2 (R7). 3. Leave the JMPR1 (JMPR4) and R4 (R9) open. 4. Place 0Ω resistor (or short) R1 (R6). Table 3. Example Demonstration Board Bill of Materials for Non-Inverting Configuration 4 Description Designator Part Number Manufacturer Ceramic Capacitor 0.1μF, 10% 50V 0805 SMD C1, C2 C0805C104K3RAC7533 Kemet Tantalum Capacitor 10μF, 10% 20V, B-size C3, C4 T491B106K025AT Kemet Resistor 0 Ω, 1/8W 1% 0805 SMD JMPR2, JMPR3, JMPR5, JMPR6, R1, R6 CRCW0805000020EA Vishay Resistor 10kΩ, 1/8W, 1% 0805 SMD R2, R3, R7, R8 CRCW080510KOFKEA Vishay Header, 2–Pin JP1, JP2, JP3, JP4 132134 Amphenol Connex Header, 3–Pin JP5 SMA standup connectors P1–P4 (Optional) AN-1767 LME49721 Evaluation Board SNAA051A – February 2008 – Revised May 2013 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Configuring the LME49721 Amplifier www.ti.com 5.3 Voltage Follower Configuration Figure 4 shows the typical connection for a Voltage Follower amplifier or also called a Buffer. A Voltage Follower Amplifier can be used to solve impedance matching problems, to reduce power consumption in the source, or to drive heavy loads. The input impedance of the LME49721 is very high. Therefore, the input of the LME49721 does not load down the source. The Voltage Follower is a unity stable amplifier, 1V/V. Table 4 shows the recommended Bill of Materials for an inverting amplifier. JMPR1 JP2 JP1 R2 0: R3 JMPR2 JMPR3 0: 1 2 R1 - P1 0: + 1 2 R4 P2 Figure 4. Voltage Follower Amplifier You can configure the LME49721 demonstration board in a Voltage Follower configuration by making the following changes: 1. Place 0Ω resistor (or short) R2 (R7) and R1 (R6). 2. Place 0Ω resistor (or short) JMPR3 (JMPR6). 3. Leave R3 (R8) and R4 (R9) open. 4. Leave JMPR1 (JMPR4) and JMPR2 (JMPR5) open. Table 4. Example Demonstration Board Bill of Materials for Voltage Follower Configuration Description Designator Part Number Manufacturer Ceramic Capacitor 0.1μF, 10% 50V 0805 SMD C1, C2 C0805C104K3RAC7533 Kemet Tantalum Capacitor 10μF, 10% 20V, B-size C3, C4 T491B106K025AT Kemet Resistor 0 Ω, 1/8W 1% 0805 SMD JMPR3, JMPR6, R1, R2, R6, R7 CRCW0805000020EA Vishay Header, 2–Pin JP1, JP2, JP3, JP4 132134 Amphenol Connex Header, 3–Pin JP5 SMA standup connectors P1–P4 (Optional) SNAA051A – February 2008 – Revised May 2013 Submit Documentation Feedback AN-1767 LME49721 Evaluation Board Copyright © 2008–2013, Texas Instruments Incorporated 5 Demonstration Board Layout 6 www.ti.com Demonstration Board Layout Figure 5. Top Silkscreen Figure 6. Top Layer Figure 7. Bottom Layer 6 AN-1767 LME49721 Evaluation Board SNAA051A – February 2008 – Revised May 2013 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Typical Performance Characteristics www.ti.com 7 Typical Performance Characteristics THD+N vs Frequency VS = ±2.5V, VOUT = 4VP-P, RL = 2kΩ AV = 2, 22kHz BW 0.1 0.1 0.01 0.01 THD+N (%) THD+N (%) THD+N vs Frequency VS = 2.5V, VOUT = 2VP-P, RL = 2kΩ AV = +1, 22kHz BW 0.001 0.001 0.0001 0.00001 20 0.0001 200 2k 0.00001 20 20k 0.1 0.1 0.01 0.01 0.001 0.0001 200 2k 0.00001 20 20k FREQUENCY (Hz) THD+N vs Frequency VS = 2.5V, VOUT = 2VP-P, RL = 10kΩ AV = +1, 22kHz BW 200 2k FREQUENCY (Hz) 20k THD+N vs Frequency VS = ±2.5V, VOUT = 4VP-P RL = 10kΩ, AV = 2, BW = 22kHz 0.1 0.1 0.01 0.01 THD+N (%) THD+N (%) 20k 0.001 0.0001 0.001 0.0001 0.00001 20 2k THD+N vs Frequency VS = ±2.5V, VOUT = 4VP-P RL = 2kΩ, AV = 2 THD+N (%) THD+N (%) THD+N vs Frequency VS = 2.5V, VOUT = 2VP-P, RL = 2kΩ AV = +1 0.00001 20 200 FREQUENCY (Hz) FREQUENCY (Hz) 0.001 0.0001 200 2k 20k 0.00001 20 SNAA051A – February 2008 – Revised May 2013 Submit Documentation Feedback 200 2k 20k FREQUENCY (Hz) FREQUENCY (Hz) AN-1767 LME49721 Evaluation Board Copyright © 2008–2013, Texas Instruments Incorporated 7 Typical Performance Characteristics www.ti.com THD+N vs Frequency VS = ±2.5V, VOUT = 4VP-P RL = 10kΩ, AV = 2 0.1 0.1 0.01 0.01 THD+N (%) THD+N (%) THD+N vs Frequency VS = 2.5V, VOUT = 2VP-P, RL = 10kΩ AV = +1 0.001 0.001 0.0001 0.00001 20 0.0001 200 2k 0.00001 20 20k FREQUENCY (Hz) 0.1 0.1 0.01 0.01 0.001 0.0001 0.00001 20 0.001 0.0001 200 2k 0.00001 20 20k FREQUENCY (Hz) 0.1 0.1 0.01 0.01 0.001 0.0001 20 20k 0.001 0.0001 200 2k 20k 0.00001 20 FREQUENCY (Hz) 8 200 2k FREQUENCY (Hz) THD+N vs Frequency VS = ±2.5V, VOUT = 4VP-P RL = 600Ω, AV = 2 THD+N (%) THD+N (%) THD+N vs Frequency VS = 2.5V, VOUT = 2VP-P, RL = 600Ω AV = +1 0.00001 20k THD+N vs Frequency VS = ±2.5V, VOUT = 4VP-P RL = 600Ω, AV = 2, BW = 22kHz THD+N (%) THD+N (%) THD+N vs Frequency VS = 2.5V, VOUT = 2VP-P, RL = 600Ω AV = +1, 22kHz BW 200 2k FREQUENCY (Hz) AN-1767 LME49721 Evaluation Board 200 2k FREQUENCY (Hz) 20k SNAA051A – February 2008 – Revised May 2013 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Typical Performance Characteristics www.ti.com THD+N vs Output Voltage VS = ±2.5V, RL = 2kΩ, AV = 2 0.1 0.1 0.01 0.01 THD+N (%) THD+N (%) THD+N vs Output Voltage VS = 2.5V, RL = 2kΩ, AV = +1 0.001 0.001 0.0001 0.00001 10m 0.0001 100m 1 0.00001 100m 2 0.1 0.1 0.01 0.01 0.001 0.0001 0.0001 100m 1 0.00001 100m 2 200m 1 2 OUTPUT VOLTAGE (V) THD+N vs Output Voltage VS = 2.5V, RL = 600Ω, AV = +1 THD+N vs Output Voltage VS = ±2.5V, RL = 600Ω, AV = 2 0.1 0.1 0.01 0.01 THD+N (%) THD+N (%) 2 0.001 OUTPUT VOLTAGE (V) 0.001 0.0001 0.00001 10m 1 THD+N vs Output Voltage VS = ±2.5V, RL = 10kΩ, AV = 2 THD+N (%) THD+N (%) THD+N vs Output Voltage VS = 2.5V, RL = 10kΩ, AV = +1 0.00001 10m 200m OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 0.001 0.0001 100m 1 2 0.00001 100m SNAA051A – February 2008 – Revised May 2013 Submit Documentation Feedback 200m 1 2 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) AN-1767 LME49721 Evaluation Board Copyright © 2008–2013, Texas Instruments Incorporated 9 Revision Table 8 10 www.ti.com Revision Table Rev Date 1.0 02/22/08 AN-1767 LME49721 Evaluation Board Description Initial release. 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