LME49726
www.ti.com
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
LME49726 High Current, Low Distortion, Rail-to-Rail Output
Audio Operational Amplifier
Check for Samples: LME49726
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
•
•
1
2
•
•
•
•
Rail-to-Rail Output
Easily Drives 2kΩ Loads to within 4mV of Each
Power Supply Voltage Rail
Optimized for Superior Audio Signal Fidelity
Output Short Circuit Protection
High Output Drive (>300mA)
Available in VSSOP Exposed-DAP Package
Portable Audio Amplification
Preamplifiers and Multimedia
Equalization and Crossover Networks
Line Drivers and Receivers
Active Filters
DAC I–V Converter Gain Stage
ADC Front-End Signal Conditioning
KEY SPECIFICATIONS
DESCRIPTION
•
•
The LME49726 is a low distortion, low noise rail-torail output audio operational amplifier optimized and
fully specified for high performance, high fidelity
applications. The LME49726 delivers superior audio
signal
amplification
for
outstanding
audio
performance. The LME49726 has a very low THD+N
to easily satisfy demanding audio applications. To
ensure that the most challenging loads are driven
without compromise, the LME49726 provides output
current greater than 300mA at 5V. Further, dynamic
range is maximized by an output that drives 2kΩ
loads to within 4mV of either power supply voltage.
•
•
•
•
•
•
•
•
Power Supply Voltage Range: 2.5 to 5.5 V
Quiescent Current per Amplifier
at 5V: 0.7
mA (Typ)
THD+N, AV = 1, fIN = 1kHz, RL = 10kΩ:
– (VOUT = 3.5VP-P, VDD = 5.0V): 0.00008 % (Typ)
– (VOUT = 1.5VP-P, VDD = 2.5V): 0.00002 % (Typ)
Equivalent Input Noise (f = 10k): 8.3 nV/√Hz
(Typ)
Slew Rate: ±3.7 V/μs (Typ)
Gain Bandwidth Product: 6.25 MHz (Typ)
Open Loop Gain (RL = 10kΩ): 120 dB (Typ)
Input Bias Current: 0.2 pA (Typ)
Input Offset Voltage: 0.5 mV (Typ)
PSRR (DC): 104 dB (Typ)
The LME49726 has a supply range of 2.5V to 5.5V.
Over this supply range the LME49726’s input circuitry
maintains excellent common-mode and power supply
rejection, as well as maintaining its low input bias
current. The LME49726 is unity gain stable.
160.0
0.80
0.75
SUPPLY CURRENT (mA)
VOLTAGE NOISE (nV/ Hz)
140.0
120.0
100.0
80.0
60.0
40.0
0.65
0.60
0.55
20.0
0.0
10
0.70
100
1000
10000
100000
FREQUENCY (Hz)
Figure 1. Input Voltage Noise vs Frequency
VDD = 3V
0.50
1.25
1.50
1.75
2.00
2.25
2.50
2.75
POWER SUPPLY (Vs)
Figure 2. Supply Current vs Supply Voltage
per Amplifier, RL = No Load, AV = –1
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated
LME49726
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
www.ti.com
Typical Connections
VIN
R2
R1
VIN
R2
R1
VDD
VDD
-
VOUT
-
VDD/2
+
+
VOUT
RL
VDD/2
VEE
Figure 3. Inverting Configuration Split Supplies
Figure 4. Inverting Configuration Single Supplies
Connection Diagram
INVERTING INPUT A
1
8
2
7
+
-
NON-INVERTING INPUT A
VSS
VDD
OUTPUTB
+
-
OUTPUTA
3
6
4
5
INVERTING INPUT B
NON-INVERTING INPUT B
Figure 5. See Package Number DGN0008A
2
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
LME49726
www.ti.com
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS (1) (2) (3)
Power Supply Voltage
VS = VSS-VDD
Input Voltage
Output Short Circuit
6V
−65°C to 150°C
Storage Temperature
(VSS) – 0.7V to (VDD) + 0.7V
(4)
Continuous
Power Dissipation
Internally Limited
ESD Rating (5)
ESD Rating
2000V
(6)
200V
Junction Temperature
Thermal Resistance
(1)
(2)
(3)
(4)
(5)
(6)
150°C
θJA (DGN0008A)
72°C/W
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All
voltages are measured with respect to the ground pin, unless otherwise specified.
The Electrical Characteristics tables list specifications under the listed Recommended Operating Conditions except as otherwise
modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not
ensured.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature,
TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings,
whichever is lower.
Human body model, applicable std. JESD22-A114C.
Machine model, applicable std. JESD22-A115-A.
OPERATING RATINGS (1)
Temperature Range
TMIN ≤ TA ≤ TMAX
(1)
−40°C ≤ TA ≤ 125°C
2.5V ≤ VS ≤ 5.5V
Supply Voltage Range
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All
voltages are measured with respect to the ground pin, unless otherwise specified.
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
3
LME49726
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
www.ti.com
ELECTRICAL CHARACTERISTICS (VDD = 5.0V and VDD = 2.5V)
The following specifications apply for the circuit shown in Figure 1. VDD = 5.0V and VDD = 2.5V, VSS = 0.0V, VCM = VDD/2, RL =
10kΩ, CLOAD = 20pF, fIN = 1kHz, BW = 20–20kHz, and TA = 25°C, unless otherwise specified.
Symbol
THD+N
Parameter
Total Harmonic Distortion + Noise
LME49726
Conditions
Typical (1)
Limit (2)
Units
(Limits)
AV = –1, VOUT = 3.5Vp-p, VDD = 5V
RL = 600Ω
RL = 2kΩ
RL = 10kΩ
0.0008
0.0002
0.00008
%
%
%
AV = –1, VOUT = 1.5Vp-p, VDD = 2.5V
RL = 600Ω
RL = 2kΩ
RL = 10kΩ
0.001
0.0008
0.0002
%
%
%
GBWP
Gain Bandwidth Product
6.25
5.0
MHz (min)
SR
Slew Rate
AV = +1, RL = 10kΩ
3.7
2.5
V/μs (min)
ts
Settling time
AV = 1V step
0.1% error range
0.001% error range
800
1.2
eN
Equivalent Input Noise Voltage
fBW = 20Hz to 20kHz (A-weighted)
0.7
f = 10kHz
8.3
nV/√Hz
eN
Equivalent Input Noise Density
f = 1kHz
10
nV/√Hz
f = 100Hz
24
nV/√Hz
ns
μs
1.25
μVRMS
(max)
IN
Current Noise Density
f = 1kHz
0.75
VOS
Input Offset Voltage
VIN = VDD/2, VO = VDD/2, AV = 1
0.5
ΔVOS/ΔTemp
Average Input Offset Voltage Drift vs
Temperature
40°C ≤ TA ≤ 85°C
1.2
PSRR
Power Supply Rejection Ratio
2.5 to 5.5V, VCM = 0, VDD/2
104
ISOCH-CH
Channel-to-Channel Isolation
fIN = 1kHz
94
dB
IB
Input Bias Current
VCM = VDD/2
±0.2
pA
ΔIOS/ΔTemp
Input Bias Current Drift vs
Temperature
–40°C ≤ TA ≤ 85°C
35
nA/°C
IOS
Input Offset Current
VCM = VDD/2
VIN-CM
Common-Mode Input Voltage Range
CMRR
Common Mode Rejection Ratio
1/f
1/f Corner Frequency
AVOL
Open-Loop Voltage Gain
VOUTSWING
Output Current
IS
Quiescent Current per Amplifier
(2)
4
85
±0.2
95
VOUT = VDD/2
120
mV (max)
μV/°C
dB (min)
pA
VDD–1.6
VSS+0.1
V (min)
80
dB (min)
2
kHz
100
dB (min)
RL = 2kΩ to VDD/2
VDD–0.004
VSS +0.004
V (min)
V (max)
RL = 16Ω to VDD/2
VDD –0.33
VSS+0.33
V (min)
V (max)
VOUT = 5V, VDD = 5V
350
mA
VOUT = 2.5V, VDD = 2.5V
160
mA
Maximum Output Voltage Swing
IOUT
(1)
0.1V < VDD – 1.6V
pA/√Hz
2.25
IOUT = 0mA, VDD = 5V
0.7
1.1
mA (max)
IOUT = 0mA, VDD = 2.5V
0.64
1.0
mA (max)
Typical values represent most likely parametric norms at TA = +25ºC, and at the Recommended Operation Conditions at the time of
product characterization and are not ensured.
Datasheet min/max specification limits are specified by test or statistical analysis.
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
LME49726
www.ti.com
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS
THD+N vs Output Voltage
VDD = 1.25V, VSS = –1.25V, RL = 600Ω
AV = –1, f = 1kHz, BW = 22–22kHz
THD+N vs Frequency
VDD = 1.25V, VSS = –1.25V, RL = 600Ω
VO = 1.5VP-P, BW = 22–80kHz
0.1
0.01
0.01
THD+N (%)
THD+N (%)
0.1
0.001
0.0001
0.01
0.001
0.1
1
0.0001
10
10
100
1k
10k
100k
FREQUENCY (Hz)
OUTPUT VOLTAGE (V)
Figure 6.
Figure 7.
THD+N vs Output Voltage
VDD = 1.25V, VSS = –1.25V, RL = 10kΩ
AV = –1, f = 1kHz, BW = 22–22kHz
THD+N vs Frequency
VDD = 1.25V, VSS = –1.25V, RL = 10kΩ
VO = 1VP-P, BW = 22–80kHz
0.1
0.01
0.01
THD+N (%)
THD+N (%)
0.1
0.001
0.0001
0.01
0.001
0.1
1
0.0001
10
10
100
1k
10k
100k
FREQUENCY (Hz)
OUTPUT VOLTAGE (V)
Figure 8.
Figure 9.
THD+N vs Output Voltage
VDD = 2.50V, VSS = –2.50V, RL = 600Ω
AV = –1, f = 1kHz, BW = 22–22kHz
THD+N vs Frequency
VDD = 2.50V, VSS = –2.50V, RL = 600Ω
VO = 3.5VP-P, BW = 22–80kHz
0.1
0.01
0.01
THD+N (%)
THD+N (%)
0.1
0.001
0.0001
0.01
0.001
0.1
1
10
0.0001
10
100
1k
10k
100k
FREQUENCY (Hz)
OUTPUT VOLTAGE (V)
Figure 10.
Figure 11.
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
5
LME49726
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
THD+N vs Output Voltage
VDD = 2.50V, VSS = –2.50V, RL = 10kΩ
AV = –1, f = 1kHz, BW = 22–22kHz
THD+N vs Frequency
VDD = 2.50V, VSS = –2.50V, RL = 10kΩ
VO = 1VP-P, BW = 22–80kHz
0.1
0.1
0.01
THD+N (%)
THD+N (%)
0.01
0.001
0.001
0.0001
0.00001
0.01
0.1
1
0.0001
10
10
100
1k
10k
100k
FREQUENCY (Hz)
OUTPUT VOLTAGE (V)
Figure 12.
Figure 13.
THD+N vs Output Voltage
VDD = 2.75V, VSS = –2.75V, RL = 600Ω
AV = –1, f = 1kHz, BW = 22–22kHz
THD+N vs Frequency
VDD = 2.75V, VSS = –2.75V, RL = 600Ω
VO = 3.5VP-P, BW = 22–80kHz
0.1
0.1
0.01
THD+N (%)
THD+N (%)
0.01
0.001
0.001
0.0001
0.01
0.1
1
0.0001
10
10
100
1k
10k
100k
OUTPUT VOLTAGE (V)
FREQUENCY (Hz)
Figure 14.
Figure 15.
THD+N vs Output Voltage
VDD = 2.75V, VSS = –2.75V, RL = 10kΩ
AV = –1, f = 1kHz, BW = 22–22kHz
THD+N vs Frequency
VDD = 2.75V, VSS = –2.75V, RL = 10kΩ
VO = 3.5VP-P, BW = 22–80kHz
0.1
0.1
0.01
THD+N (%)
THD+N (%)
0.01
0.001
0.001
0.0001
0.00001
0.01
0.1
1
10
0.0001
10
1k
10k
100k
FREQUENCY (Hz)
OUTPUT VOLTAGE (V)
Figure 16.
6
100
Figure 17.
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
LME49726
www.ti.com
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
PSRR– vs Frequency
VDD = 1.25V, VSS = –1.25V, VRIPPLE = 200mVP-P
Input terminated, BW = 22–80kHz
0
0
-10
-10
-20
-20
-30
-30
-40
-40
PSRR (dB)
PSRR (dB)
PSRR+ vs Frequency
VDD = 1.25V, VSS = –1.25V, VRIPPLE = 200mVP-P
Input terminated, BW = 22–80kHz
-50
-60
-70
-50
-60
-70
-80
-80
-90
-90
-100
-100
-110
-120
10
-110
-120
10
100
1k
10k
100k
1M
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 18.
Figure 19.
PSRR+ vs Frequency
VDD = 2.50V, VEE = –2.50V, VRIPPLE = 200mVP-P
Input terminated, BW = 22–80kHz
PSRR– vs Frequency
VDD = 2.50V, VSS = –2.50V, VRIPPLE = 200mVP-P
Input terminated, BW = 22–80kHz
0
-10
-20
-20
-30
-30
-40
-40
-50
PSRR (dB)
PSRR (dB)
0
-10
-60
-70
-80
-50
-60
-70
-80
-90
-90
-100
-100
-110
-120
10
-110
-120
10
100
1k
10k
100k
1M
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 20.
Figure 21.
PSRR+ vs Frequency
VDD = 2.75V, VSS = –2.75V, VRIPPLE = 200mVP-P
Input terminated, BW = 22–80kHz
PSRR– vs Frequency
VDD = 2.75V, VSS = –2.75V, VRIPPLE = 200mVP-P
Input terminated, BW = 22–80kHz
0
-10
-10
-20
-20
-30
-30
-40
-40
PSRR (dB)
PSRR (dB)
0
-50
-60
-70
-50
-60
-70
-80
-80
-90
-90
-100
-100
-110
-120
10
-110
-120
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 22.
Figure 23.
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
7
LME49726
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Output Voltage vs Supply Voltage
RL = 10kΩ, AV = –1
f = 1kHz, THD+N = 1%, BW = 22–80kHz
2.5
2.5
2.0
2.0
OUTPUT VOLTAGE
OUTPUT VOLTAGE
Output Voltage vs Supply Voltage
RL = 600Ω, AV = –1
f = 1kHz, THD+N = 1%, BW = 22–80kHz
1.5
1.0
1.5
1.0
0.5
0.0
2.5
0.5
3.0
3.5
4.5
4.0
5.0
0.0
2.5
5.5
3.5
4.0
4.5
5.0
5.5
POWER SUPPLY (Vs)
Figure 24.
Figure 25.
Crosstalk vs Frequency
VDD = 2.50V, VSS = –2.50V, RL = 10kΩ
AV = –1, f = 1kHz, BW = 80kHz
CMRR vs Frequency
VDD = 2.5V, VSS = –2.5V, VRIPPLE = 200mVP-P
0
0
-10
-10
-20
-20
-30
-30
-40
-40
CMRR (dB)
CROSSTALK (dB)
3.0
POWER SUPPLY (Vs)
-50
-60
-70
-50
-60
-70
-80
-80
-90
-90
-100
-100
-110
-120
10
-110
-120
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 26.
Figure 27.
Input Voltage Noise vs Frequency
VDD = 5V
160.0
VOLTAGE NOISE (nV/ Hz)
140.0
120.0
100.0
80.0
60.0
40.0
20.0
0.0
10
100
1000
10000
100000
FREQUENCY (Hz)
Figure 28.
8
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
LME49726
www.ti.com
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
APPLICATION INFORMATION
DISTORTION MEASUREMENTS
The vanishingly low residual distortion produced by LME49726 is below the capabilities of all commercially
available equipment. This makes distortion measurements just slightly more difficult than simply connecting a
distortion meter to the amplifier's inputs and outputs. The solution. however, is quite simple: an additional
resistor. Adding this resistor extends the resolution of the distortion measurement equipment.
The LME49726's low residual is an input referred internal error. As shown in Figure 29, adding the 10Ω resistor
connected between athe amplifier's inverting and non-inverting inputs changes the amplifier's noise gain. The
result is that the error signal (distortion) is amplified by a factor of 101. Although the amplifier's closed-loop gain
is unaltered, the feedback available to correct distortion errors is reduced by 101. To ensure minimum effects on
distortion measurements, keep the value of R1 low as shown in Figure 29.
This technique is verified by duplicating the measurements with high closed loop gain and/or making the
measurements at high frequencies. Doing so, produces distortion components that are within measurement
equipment capabilities. This datasheet's THD+N and IMD values were generated using the above described
circuit connected to an Audio Precision System Two Cascade.
R2
1k
R1
1k
R3
10
LME49726
+
Generator Output
Distortion Signal Gain = 1 + (R2/R3)
Analyzer Input
Audio Precision
System Two
Cascade
Figure 29. THD+N and IMD Distortion Test Circuit
OPERATING RATINGS AND BASIC DESIGN GUIDELINES
The LME49726 has a supply voltage range from +2.5V to +5.5V single supply or ±1.25 to ±2.75V dual supply.
Bypassed capacitors for the supplies should be placed as close to the amplifier as possible. This will help
minimize any inductance between the power supply and the supply pins. In addition to a 10μF capacitor, a 0.1μF
capacitor is also recommended in CMOS amplifiers.
The amplifier's inputs lead lengths should also be as short as possible. If the op amp does not have a bypass
capacitor, it may oscillate.
BASIC AMPLIFIER CONFIGURATIONS
The LME49726 may be operated with either a single supply or dual supplies. Figure 2 shows the typical
connection for a single supply inverting amplifier. The output voltage for a single supply amplifier will be centered
around the common-mode voltage, VCM. Note, the voltage applied to the VCM insures the output stays above
ground. Typically, the VCM should be equal to VDD/2. This is done by putting a resistor divider circuit at this node,
see Figure 30.
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
9
LME49726
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
www.ti.com
R2
R1
VDD
VDD
R3
VOUT
VCM
+
R4
Figure 30. Single Supply Inverting Op Amp
Figure 31 shows the typical connection for a dual supply inverting amplifier. The output voltage is centered on
zero.
VIN
R1
R2
VDD
-
VOUT
+
VSS
Figure 31. Dual Supply Inverting Configuration
Figure 32 shows the typical connection for the Buffer Amplifier or also called a Voltage Follower. The Buffer is a
unity gain stable amplifier.
VDD
-
VOUT
VIN
+
Figure 32. Unity-Gain Buffer Configuration
10
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
LME49726
www.ti.com
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
Typical Applications
AV = 34.5
F = 1 kHz
En = 0.38 μV
A Weighted
Figure 33. NAB Preamp
AV = 34.5
F = 1 kHz
En = 0.38 μV
A Weighted
Figure 34. NAB Preamp Voltage Gain vs Frequency
R
R
-
V2
1/2 LME49726
R
V0
+
V1
R
VO = V1–V2
Figure 35. Balanced to Single Ended Converter
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
11
LME49726
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
www.ti.com
R
V1
+
V2
R
1/2 LME49726
R
V0
-
R
V3
V4
R
R
VO = V1 + V2 − V3 − V4
Figure 36. Adder/Subtracter
Figure 37. Sine Wave Oscillator
R1
11k
C1
C2
0.01 PF 0.01 PF
V1
+
1/2 LME49726
R2
22k
V0
-
Illustration is f0 = 1 kHz
Figure 38. Second Order High Pass Filter
(Butterworth)
12
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
LME49726
www.ti.com
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
C1
0.022 PF
R1
10k
R2
10k
+
V1
V0
1/2 LME49726
C2
0.011 PF
-
Illustration is f0 = 1 kHz
Figure 39. Second Order Low Pass Filter
(Butterworth)
R2
10k
RG
10k
R2
R1
10k
16k
R1
0.01 PF
16k
C1
0.01 PF
-
VHP
1/2 LME49726
VBP
1/2 LME49726
1/2 LME49726
+
+
VIN
C1
R0
R2
556
10k
VLP
+
Illustration is f0 = 1 kHz, Q = 10, ABP = 1
Figure 40. State Variable Filter
R5
20k
R2
20k
C1
10 PF
R3
10k
R4
20k
R1
20k
VIN
D1
1S1588
1/2 LME49726
+
R6
15k
1/2 LME49726
D2
1S1588
V0 = VIN
+
R7
6.2k
Figure 41. AC/DC Converter
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
13
LME49726
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
www.ti.com
R1
15k
3.41R1
51k
R1
15k
V01
1/2 LME49726
+
VI
0.707R1
10k
V02
1/2 LME49726
+
R1
15k
R1
15k
3.41R1
51k
Figure 42. 2 Channel Panning Circuit (Pan Pot)
R2
R1
V1
-
1/2 LME49726
+
VCC
R3
10k
Q1
R9
10k
R7
33
R5
10k
BIAS
R8
33
V0
Q2
R6
10k
-VEE
Figure 43. Line Driver
14
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
LME49726
www.ti.com
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
BOOST-BASS-CUT
R1
R2
R1
11k
100k
11k
V1
C1
0.05 PF
C1
0.05 PF
R3
11k
C2
0.005 PF
R5
3.6k
1/2 LME49726
R5
3.6k
V0
+
R4
500k
BOOST-TREBLE-CUT
Illustration is:
fL = 32 Hz, fLB = 320 Hz
fH =11 kHz, fHB = 1.1 kHz
Figure 44. Tone Control
Figure 45.
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
15
LME49726
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
www.ti.com
Av = 35 dB
En = 0.33 μV
S/N = 90 dB
f = 1 kHz
A Weighted
A Weighted, VIN = 10 mV
@f = 1 kHz
Figure 46.
V1
R
R4
10k
R3
10k
+
1/2 LME49726
R2
V0
1/2 LME49726
10k
R1
200
+
R5
10k
-
R6
R7
10k
10k
1/2 LME49726
V2
+
R
Illustration is:
V0 = 101(V2 − V1)
Figure 47. Balanced Input Mic Amp
16
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
LME49726
www.ti.com
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
Figure 48.
fo (Hz)
C1
C2
R1
R2
32
0.12μF
4.7μF
75kΩ
500Ω
64
0.056μF
3.3μF
68kΩ
510Ω
125
0.033μF
1.5μF
62kΩ
510Ω
250
0.015μF
0.82μF
68kΩ
470Ω
500
8200pF
0.39μF
62kΩ
470Ω
1k
3900pF
0.22μF
68kΩ
470Ω
2k
2000pF
0.1μF
68kΩ
470Ω
4k
1100pF
0.056μF
62kΩ
470Ω
8k
510pF
0.022μF
68kΩ
510Ω
16k
330pF
0.012μF
51kΩ
510Ω
At volume of change = ±12 dB Q = 1.
LME49726 Bill of Materials
Description
Designator
Part Number
Manufacturer
AVX
Quantity/Brd
Ceramic Capacitor 0.1uF, 10%,
50V 0805 SMD
C1, C2, C5–C8
08055C104KAT2A
Tantalum Capacitor 2.2uF,10%,
20V, A-size
C9, C11
T491A225K020AT
Tantalum Capacitor 10uF,10%,
20V, B-size
C3, C4
T491B106K020AT
Resistor 0Ω, 1/8W 1% 0805 SMD
R1, R4, R6, R9, R13,
R14
CRCW08050000Z0EA
Header, 2-Pin
JP1, JP2, JP3, JP4
HDR1X2
Header 2
4
Header, 3-Pin
JP5
HDR1X3
Header 3
1
Resistor 10kΩ, 1/8W 1% 0805 SMD
R2, R3, R7, R8
CRCW080510K0FKEA
Vishay
4
Dual Rail-to-Rail Op Amp
U1
LME49726
Texas
Instruments
1
Resistor 100meg/open
1/8W 0805 SMD
R5, R10, R11, R12
OPEN N/A
N/A
0
Kemet
Kemet
Vishay
2
Not Stuff
2
6
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
17
LME49726
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
www.ti.com
LME49726 Board Circuit
18
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
LME49726
www.ti.com
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
LME49726 Demo Board Views
Figure 49. Top Silkscreen
Figure 50. Top Layer
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
19
LME49726
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
www.ti.com
Figure 51. Bottom Layer
20
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
LME49726
www.ti.com
SNAS432C – NOVEMBER 2008 – REVISED APRIL 2013
REVISION HISTORY
Rev
Date
1.0
11/05/08
Description
Initial release.
1.01
05/25/10
Increased Operating Temperature Range.
1.02
07/14/11
Added curves 30038602 and 03 and input text edits.
1.03
07/19/11
Re-released the D/S to the WEB after adding curves 30038602 and
03 .
C
04/04/13
Changed layout of National Data Sheet to TI format.
Submit Documentation Feedback
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LME49726
21
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LME49726MY/NOPB
ACTIVE
HVSSOP
DGN
8
1000
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 85
ZA3
LME49726MYX/NOPB
ACTIVE
HVSSOP
DGN
8
3500
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 85
ZA3
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
