LMH0346SQE/NOPB

LMH0346 www.ti.com SNLS248J – APRIL 2007 – REVISED APRIL 2013 3 Gbps HD/SD SDI Reclocker with Dual Differential Outputs Check for Samples: LMH0346 FEATURES DESCRIPTION • The LMH0346 3 Gbps HD/SD SDI Reclocker retimes serial digital video data conforming to the SMPTE 424M, SMPTE 292M, and SMPTE 259M (C) standards. The LMH0346 operates at serial data rates of 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps. The LMH0346 supports DVBASI operation at 270 Mbps. 1 2 • • • • • • • • • • • • • • • • • Supports SMPTE 424M, SMPTE 292M, and SMPTE 259M (C) Serial Digital Video Standards Supports 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps Serial Data Rate Operation Supports DVB-ASI at 270 Mbps Single 3.3V Supply Operation 370 mW Typical Power Consumption Two Differential, Reclocked Outputs Choice of Second Reclocked Output or LowJitter, Differential, Data-Rate Clock Output Single 27 MHz External Crystal or Reference Clock Input Manual or Automatic Rate Select Input SD/HD Operating Rate Indicator Output Lock Detect Indicator Output Output Mute Function for Data and Clock Auto/Manual Reclocker Bypass Differential LVPECL Compatible Serial Data Inputs and Outputs LVCMOS Control Inputs and Indicator Outputs 20-Pin HTSSOP or 24-Pin WQFN Package Industrial Temperature Range: -40°C to +85°C Footprint Compatible With the LMH0046 and LMH0026 (HTSSOP Package) The LMH0346 automatically detects the incoming data rate and adjusts itself to retime the incoming data to suppress accumulated jitter. The LMH0346 recovers the serial data-rate clock and optionally provides it as an output. The LMH0346 has two differential serial data outputs; the second output may be selected as a low-jitter, data-rate clock output. Controls and indicators are: serial clock or second serial data output select, manual rate select input, SD/HD rate indicator output, lock detect output, auto/manual data bypass and output mute. The serial data inputs, outputs, and serial clock outputs are differential LVPECL compatible. The CML serial data and serial clock outputs are suitable for driving 100Ω differentially terminated networks. The control logic inputs and outputs are LVCMOS compatible. The LMH0346 is powered from a single 3.3V supply. Power dissipation is typically 370 mW. The device is available in two space-saving packages: a 6.5 X 4.4 mm 20-pin HTSSOP and an even more space–efficient 5 X 4 mm 24-pin WQFN package. APPLICATIONS • SDTV/HDTV and 3 Gbps Serial Digital Video Interfaces for: – Digital Video Routers and Switchers – Digital Video Processing and Editing Equipment – DVB-ASI Equipment – Video Standards and Format Converters 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007–2013, Texas Instruments Incorporated LMH0346 SNLS248J – APRIL 2007 – REVISED APRIL 2013 www.ti.com Typical Application SERIAL DATA CABLE EQUALIZER LMH0344 3 Gbps/HD/SD RECLOCKER LMH0346 CABLE EQUALIZER LMH0344 3 Gbps/HD/SD RECLOCKER LMH0346 CABLE EQUALIZER LMH0344 3 Gbps/HD/SD CROSSPOINT SWITCH 3 Gbps/HD/SD RECLOCKER LMH0346 CABLE EQUALIZER LMH0344 3 Gbps/HD/SD RECLOCKER LMH0346 CABLE DRIVER LMH0302 CABLE DRIVER LMH0302 CABLE DRIVER LMH0302 CABLE DRIVER LMH0302 Block Diagram SCO_EN BYPASS/ AUTO BYPASS RATE0 SD/ HD CONTROL LOGIC LOCK DETECT RATE1 VCCO BYPASS 50 50 XTAL IN/EXT CLK XTAL OUT LOOP FILTER 1 SCO/SDO2 VCO / PLL SCO/SDO2 LOOP FILTER 2 VCCO O/P MUTE 50 50 SDI SDI 2 SDO RETIMER / FIFO SDO Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMH0346 LMH0346 www.ti.com SNLS248J – APRIL 2007 – REVISED APRIL 2013 Connection Diagram 1 2 3 4 5 6 7 8 9 10 20 SCO_EN 19 LF2 SD/ HD 18 VCCO RATE0 17 SDO RATE1 16 SDO SDI LMH0346MH VCCO 15 SDI 14 VCC SCO/SDO2 13 SCO/SDO2 BP/ AUTO-BP 12 OP MUTE LOCK DET 11 XTAL IN/EXT CLK XTAL OUT LF1 The exposed die attach pad is the negative electrical terminal for this device. It must be connected to the negative power supply voltage. LF1 VEE RSVD SCO_EN SD/ HD Figure 1. 20-Pin HTSSOP See Package Number PWP 24 23 22 21 20 LF2 1 19 VCCO RATE0 2 18 SDO RATE1 3 17 SDO SDI 4 16 VCCO SDI 5 15 SCO/SDO2 VCC 6 14 SCO/SDO2 BP/ AUTO-BP 7 13 LOCK DET 8 9 10 11 12 OP MUTE XTAL IN/EXT CLK VEE VEE XTAL OUT LMH0346SQ (top view) The exposed die attach pad is the primary negative electrical terminal for this device. It must be connected to the negative power supply voltage. Figure 2. 24-Pin WQFN See Package Number NHZ Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMH0346 3 LMH0346 SNLS248J – APRIL 2007 – REVISED APRIL 2013 www.ti.com PIN DESCRIPTIONS HTSSOP Pin WQFN Pin 1 24 LF1 Loop Filter. 2 1 LF2 Loop Filter. 3 2 RATE 0 Data Rate select input. This pin has an internal pulldown. 4 3 RATE 1 Data Rate select input. This pin has an internal pulldown. 5 4 SDI Data Input True. 6 5 SDI Data Input Complement. 7 6 VCC Positive power supply. 8 7 BYPASS/AUTO BYPASS Bypass/Auto Bypass mode select. Bypasses reclocking when high. This pin has an internal pulldown. 9 8 OUTPUT MUTE Data and Clock Output Mute Input. Mutes the output when low. This pin has an internal pullup. 10 9 XTAL IN/EXT CLK Crystal or External Oscillator Input. 11 12 XTAL OUT Crystal Oscillator Output. 12 13 LOCK DETECT PLL Lock Detect Output (active high). 13 14 SCO/SDO2 Serial Clock or Serial Data Output 2 Complement. 14 15 SCO/SDO2 Serial Clock or Serial Data Output 2 True. 15 16 VCCO Positive power supply (Output Driver). 16 17 SDO Data Output Complement. 17 18 SDO Data Output True. 18 19 VCCO Positive power supply (Output Driver). 19 20 SD/HD Data Rate Range Output. Output is high for SD and low for HD or 3G. 20 21 SCO_EN Serial Clock or Serial Data 2 Output select. Sets second output to output the clock when high and the data when low. This pin has an internal pulldown. — 10, 11, 23 VEE Negative power supply. — 22 RSVD Reserved for future use. Do not connect. DAP DAP VEE Connect exposed DAP to negative power supply (ground). Name Description These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 4 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMH0346 LMH0346 www.ti.com SNLS248J – APRIL 2007 – REVISED APRIL 2013 ABSOLUTE MAXIMUM RATINGS (1) Supply Voltage (VCC–VEE) 4.0V VEE−0.15V to VCC+0.15V Logic Input Voltage (Vi) Logic Input Current (single input) Vi = VEE−0.15V −5 mA Vi = VCC+0.15V +5 mA VEE−0.15V to VCC+0.15V Logic Output Voltage (Vo) Logic Output Source/Sink Current ±8 mA Serial Data Output Sink Current (ISDO) Package Thermal Resistance 24 mA θJA 20-pin HTSSOP 26.6°C/W θJA 24-pin WQFN 33.0°C/W θJC 20-pin HTSSOP θJC 24-pin WQFN 2.4°C/W 3.2°C/W −65°C to +150°C Storage Temperature Range Junction Temperature +125°C Lead Temperature (Soldering 4 Sec) ESD Rating +260°C (Pb-free) HBM 8 kV MM 400V CDM (1) 2 kV “Absolute Maximum Ratings” are those parameter values beyond which the life and operation of the device cannot be ensured. The stating herein of these maximums shall not be construed to imply that the device can or should be operated at or beyond these values. DC ELECTRICAL CHARACTERISTICS and AC ELECTRICAL CHARACTERISTICS specify acceptable device operating conditions. RECOMMENDED OPERATING CONDITIONS Supply Voltage (VCC–VEE) 3.3V ±5% Logic Input Voltage VEE to VCC Differential Serial Input Voltage 800 mV ±10% Serial Data or Clock Output Sink Current (ISO) 16 mA max. −40°C to +85°C Operating Free Air Temperature (TA) Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMH0346 5 LMH0346 SNLS248J – APRIL 2007 – REVISED APRIL 2013 www.ti.com DC ELECTRICAL CHARACTERISTICS Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. (1) (2) Symbol Parameter Conditions Reference Logic inputs Units 2 VCC V VEE 0.8 V Input Voltage High Level Input Voltage Low Level IIH Input Current High Level VIH = VCC 47 65 µA IIL Input Current Low Level VIL = VEE −18 −25 µA VOH Output Voltage High Level IOH = −2 mA VOL Output Voltage Low Level IOL = +2 mA VSDID Serial Input Voltage, Differential See (3) VCMI Input Common Mode Voltage VSDID = 200 mV (3) VSDOD Serial Data Output Voltage, Differential 100Ω differential load SDO, SDO2 VSCOD Serial Clock Output Voltage, Differential 100Ω differential load, 2970 MHz (3) SCO ICC 6 Max VIL VCMO (2) (3) Typ VIH Logic outputs SDI 100Ω differential load, 1485 or 270 MHz Mbps (1) Min Output Common Mode Voltage 100Ω differential load Supply Current 2970 Mbps SDO, SCO 2 V VEE + 0.6 V 200 1600 mVP-P VEE+0.95 VCC−0.2 V 620 750 880 mVP-P 400 525 650 mVP-P 750 mVP-P VCC− VSDOD V 111 126 mA Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are referenced to VEE (equal to zero volts). Typical values are stated for: VCC = +3.3V, TA = +25°C. This parameter is ensured by characterization over voltage and temperature limits. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMH0346 LMH0346 www.ti.com SNLS248J – APRIL 2007 – REVISED APRIL 2013 AC ELECTRICAL CHARACTERISTICS Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. (1) Symbol Conditions Reference Min SDI, SDO Typ Max Units BRSD Serial Data Rate SMPTE 259M, C 270 Mbps BRSD Serial Data Rate SMPTE 292M 1483, 1485 Mbps BRSD Serial Data Rate SMPTE 424M 2967, 2970 Mbps TOLJIT Serial Input Jitter Tolerance 270 Mbps (2) (3) (4) TOLJIT Serial Input Jitter Tolerance 270 Mbps (2) (3) (5) SDI Serial Input Jitter Tolerance 1483 or 1485 Mbps TOLJIT Serial Input Jitter Tolerance 1483 or 1485 Mbps (2) (3) (5) TOLJIT Serial Input Jitter Tolerance 2967 or 2970 Mbps (2) (3) (4) TOLJIT Serial Input Jitter Tolerance 2967 or 2970 Mbps (2) (3) (5) Serial Data Output Jitter 270 Mbps >6 UIP-P >0.6 UIP-P >6 UIP-P >0.6 UIP-P >6 UIP-P >0.6 UIP-P (2) (3) (4) TOLJIT tJIT (3) (6) 0.01 0.03 UIP-P (3) (7) SDO tJIT Serial Data Output Jitter 1483 or 1485 Mbps 0.03 0.04 UIP-P tJIT Serial Data Output Jitter 2967 or 2970 Mbps (3) (8) 0.06 0.08 UIP-P Loop Bandwidth 270 Mbps,