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LMH0356
SNLS270L – AUGUST 2007 – REVISED JANUARY 2016
LMH0356 3-Gbps HD/SD SDI Reclocker with 4:1 Input Mux and FR4 EQs
1 Features
3 Description
•
The LMH0356 3-Gbps HD/SD SDI Reclocker with 4:1
Input Mux and FR4 EQs retimes serial digital video
data conforming to the SMPTE ST-424, ST-292, and
ST-259 standards. The LMH0356 operates at serial
data rates of 270 Mbps, 1.483 Gbps, 1.485 Gbps,
2.967 Gbps, and 2.97 Gbps. The LMH0356 supports
DVB-ASI operation at 270 Mbps. The LMH0356
includes an integrated 4:1 input multiplexer for
selecting one of four input data streams for retiming.
In addition, the four inputs of the LMH0356 each have
an FR4 equalizer capable of equalizing 0 to 30 inches
of FR4 trace length.
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Supports SMPTE ST-424, ST-292, and ST-259
Serial Digital Video Standards
Supports 270-Mbps, 1.483-Gbps, 1.485-Gbps,
2.967-Gbps, and 2.97-Gbps Serial Data Rate
Operation
Supports DVB-ASI at 270 Mbps
Single 3.3-V Supply Operation
430-mW Typical Power Consumption
Integrated 4:1 Multiplexed Input
0 to 30-inch FR4 Equalizer on Each Multiplexed
Input
Two Differential, Reclocked Outputs
Choice of Second Reclocked Output or
Recovered Clock Output
Single 27-MHz External Crystal or Reference
Clock Input
Manual Rate Select Input
SD/HD Operating Rate Indicator Output
Lock Detect Indicator Output
Output Mute Function for Data and Clock
Auto/Manual Reclocker Bypass
Power Saver Mode With Device Power-Down
Control (10-mW Typical Power Consumption in
Disabled State)
Differential LVPECL-Compatible Serial Data
Inputs and Outputs
LVCMOS Control Inputs and Indicator Outputs
48-Pin WQFN or 40-Pin WQFN Package
Industrial Temperature Range: –40°C to 85°C
48-Pin WQFN Version Footprint-Compatible with
the LMH0056 and LMH0036
The LMH0356 automatically detects the incoming
data rate and adjusts itself to retime the incoming
data to suppress accumulated jitter. The LMH0356
recovers the serial data-rate clock and optionally
provides it as an output. The LMH0356 has two
differential serial data outputs; the second output may
be selected as a low-jitter, data-rate clock output.
Controls and indicators are: serial clock or second
serial data output select, manual rate select input,
SD/HD rate indicator output, lock detect output,
auto/manual data bypass, output mute, and device
enable. The serial data inputs, outputs, and serial
clock outputs are differential LVPECL compatible.
The CML serial data and serial clock outputs are
suitable for driving 100-Ω differentially terminated
networks. The control logic inputs and outputs are
LVCMOS compatible.
Device Information(1)
PART NUMBER
LMH0356
SDTV/HDTV and 3-Gbps Serial Digital Video
Interfaces for:
– Digital Video Routers and Switchers
– Digital Video Processing and Editing
Equipment
– DVB-ASI Equipment
– Video Standards and Format Converters
BODY SIZE (NOM)
5.00 mm x 5.00 mm
WQFN (48)
7.00 mm x 7.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Functional Block Diagram
2 Applications
•
PACKAGE
WQFN (40)
SCO_EN
BYPASS/ AUTO BYPASS
RATE0
SD/ HD
CONTROL LOGIC
LOCK DETECT
RATE1
ENABLE
VCCO
BYPASS
50
50
XTAL IN/EXT CLK
XTAL OUT
LOOP FILTER 1
SCO/SDO2
VCO / PLL
SCO/SDO2
LOOP FILTER 2
O/P MUTE
SDI0
SDI0
EQUALIZER
SDI1
SDI1
EQUALIZER
VCCO
50
50
SDO
RETIMER / FIFO
SDO
SDI2
SDI2
EQUALIZER
SDI3
SDI3
EQUALIZER
SEL0
SEL1
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LMH0356
SNLS270L – AUGUST 2007 – REVISED JANUARY 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Description (continued).........................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
6
7.1
7.2
7.3
7.4
7.5
7.6
7.7
6
6
6
6
7
8
9
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
DC Electrical Characteristics ....................................
AC Electrical Characteristics.....................................
AC Timing Requirements..........................................
Detailed Description ............................................ 10
8.1 Overview ................................................................. 10
8.2 Functional Block Diagram ....................................... 10
8.3 Feature Description................................................. 11
8.4 Device Functional Modes ....................................... 14
9
Application and Implementation ........................ 15
9.1 Application Information............................................ 15
9.2 Typical Application ................................................. 15
10 Power Supply Recommendations ..................... 19
11 Layout................................................................... 20
11.1 Layout Guidelines ................................................. 20
11.2 Layout Example .................................................... 20
12 Device and Documentation Support ................. 21
12.1
12.2
12.3
12.4
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
21
21
21
21
13 Mechanical, Packaging, and Orderable
Information ........................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision K (April 2013) to Revision L
•
2
Page
Added ESD Ratings table, Thermal Information table, Feature Description section, Device Functional Modes
section, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ............................. 1
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SNLS270L – AUGUST 2007 – REVISED JANUARY 2016
5 Description (continued)
The LMH0356 is powered from a single 3.3-V supply. Power dissipation is typically 430 mW. The device is
available in two space-saving packages: a 7-mm x 7-mm, 48-pin WQFN and even more space-efficient
5-mm x 5-mm, 40-pin WQFN package.
6 Pin Configuration and Functions
43
42
41
40
39
38
SCO_EN
LF1
44
VEE
LF2
45
VEE
RATE0
46
VEE
RATE1
47
VEE
SEL0
48
VEE
SEL1
RHS Package
48-Pin WQFN
Top View
37
SDI0
1
36
SD/HD
SDI0
2
35
VCC
VCC
3
34
VCC
SDI1
4
33
SDO
SDI1
5
32
SDO
VCC
6
31
VCC
SDI2
7
30
VCC
SDI2
8
29
SCO/SDO2
ENABLE
9
28
SCO/SDO2
SDI3
10
27
VEE
SDI3
11
26
VEE
VCC
12
25
VEE
14
15
16
17
18
19
20
21
22
23
VCC
BYPASS/
AUTO BP
OP MUTE
VEE
XTAL IN/
EXT CLK
VEE
VEE
VEE
XTAL OUT
VEE
24
LOCK DET
13
VEE
LMH0356SQ
(top view)
The exposed die attach pad is the primary negative electrical terminal for this device. It must be connected to the
negative power supply voltage.
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LMH0356
SNLS270L – AUGUST 2007 – REVISED JANUARY 2016
www.ti.com
LF2
LF1
37
36
35
34
33
SD/HD
RATE0
38
SCO_EN
RATE1
39
VEE
SEL0
40
VEE
SEL1
RSB Package
40-Pin WQFN
Top View
32
31
SDI0
1
30
VCC
SDI0
2
29
VCC
VCC
3
28
SDO
SDI1
4
27
SDO
SDI1
5
26
VCC
SDI2
6
25
SCO/SDO2
SDI2
7
24
SCO/SDO2
ENABLE
8
23
LOCK DET
SDI3
9
22
NC
SDI3
10
21
NC
BYPASS/
AUTO BP
17
18
19
20
VEE
VCC
16
XTAL OUT
VEE
15
VEE
14
VEE
13
XTAL IN/
EXT CLK
12
OP MUTE
11
VCC
LMH0356SQ-40
(top view)
The exposed die attach pad is the primary negative electrical terminal for this device. It must be connected to the
negative power supply voltage.
Pin Functions
PIN
NAME
BYPASS/
AUTO BYPASS
DESCRIPTION
WQFN
48 PIN
WQFN
40 PIN
15
14
Bypass/Auto Bypass mode select. Bypasses reclocking when high. This pin has
an internal pulldown.
ENABLE
9
8
Device Enable. Powers down device when low. This pin has an internal pullup.
LF1
43
35
Loop Filter.
LF2
44
36
Loop Filter.
LOCK DETECT
24
23
PLL Lock Detect output (active high).
OUTPUT MUTE
16
15
Data and Clock Output Mute input. Mutes the output when low. This pin has an
internal pullup.
RATE0
45
37
Data Rate select input. This pin has an internal pulldown.
RATE1
46
38
Data Rate select input. This pin has an internal pulldown.
SCO/SDO2
28
24
Serial Clock or Serial Data Output 2 Complement.
SCO/SDO2
29
25
Serial Clock or Serial Data Output 2 True.
SCO_EN
37
32
Serial Clock or Serial Data 2 Output select. Sets second output to output the
clock when high and the data when low. This pin has an internal pulldown.
SD/HD
36
31
Data Rate Range output. Output is high for SD and low for HD or 3G.
4
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SNLS270L – AUGUST 2007 – REVISED JANUARY 2016
Pin Functions (continued)
PIN
DESCRIPTION
WQFN
48 PIN
WQFN
40 PIN
SDI0
1
1
Data Input 0 True.
SDI0
2
2
Data Input 0 Complement.
SDI1
4
4
Data Input 1 True.
SDI1
5
5
Data Input 1 Complement.
SDI2
7
6
Data Input 2 True.
SDI2
8
7
Data Input 2 Complement.
SDI3
10
9
Data Input 3 True.
SDI3
11
10
Data Input 3 Complement.
SDO
32
27
Data Output Complement.
SDO
33
28
Data Output True.
SEL0
47
39
Data Input select input. This pin has an internal pulldown.
SEL1
48
40
Data Input select input. This pin has an internal pulldown.
NAME
VCC
3, 6, 12, 14,
30, 31, 34,
35,
VEE
DAP, 13, 17,
19, 20, 21,
23, 25, 26,
27, 38, 39,
40, 41, 42
12, 17, 18,
20, 33, 34
XTAL IN/EXT CLK
18
16
Crystal or External Oscillator input.
XTAL OUT
22
19
Crystal Oscillator output.
NC
—
21, 22
3, 11, 13, 26,
Positive power supply input.
29, 30
Negative power supply input.
No connect.
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LMH0356
SNLS270L – AUGUST 2007 – REVISED JANUARY 2016
www.ti.com
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
Supply voltage (VCC – VEE)
Logic supply voltage
VEE – 0.15
Logic input current (single input)
UNIT
4
v
VCC + 0.15
V
Vi = VEE – 0.15 V
–5
Vi = VCC + 0.15 V
5
Logic output voltage
mA
VEE – 0.15
VCC + 0.15
V
–8
8
mA
24
mA
125
°C
150
°C
Logic output source/sink current
Serial data output sink current
Junction temperature (TJ)
Storage temperature (Tstg)
(1)
MAX
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±8000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±1250
Machine model (MM)
±400
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions. Pins listed as ±8000 V may actually have higher performance.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions. Pins listed as ±1250 V may actually have higher performance.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
Supply voltage
MAX
UNIT
3.3 – 5%
3.3 + 5%
VEE
VCC
800 – 10%
800 + 10%
mV
16
mA
85
°C
Logic input voltage
Differential serial input voltage
NOM
Serial data or clock output sink current
Operating free-air temperature
–40
V
V
7.4 Thermal Information
LMH0356
THERMAL METRIC (1)
RHS (WQFN)
RSB (WQFN)
48 PINS
40 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
28.3
31.2
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
8.8
16.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
1.3
1.2
°C/W
(1)
6
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report (SPRA953).
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LMH0356
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SNLS270L – AUGUST 2007 – REVISED JANUARY 2016
7.5 DC Electrical Characteristics
over supply voltage and recommended operating temperature ranges (unless otherwise noted) (1) (2)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIH
Logic input voltage high level
VIL
Logic input voltage low level
IIH
Logic input current high level
VIH = VCC
IIL
Logic input current low level
VIL = VEE
VOH
Logic output voltage high level
IOH = −2 mA
VOL
Logic output voltage low level
IOL = 2 mA
VSDID
Serial input voltage, differential
VCMI
Input common mode voltage
VSDID = 200 mV
VSDOD
Serial data output voltage,
differential
SDO, SDO2 100-Ω differential
load
620
750
880
mVP-P
SCO 100-Ω differential load,
2970 MHz (3)
400
525
650
mVP-P
VSCOD
Serial clock output voltage,
differential
VCMO
Output common mode voltage
ICC
Power supply current, 3.3-V
supply, total
(1)
(2)
(3)
SDI
2
VCC
VEE
0.8
V
47
65
µA
−18
−25
µA
2
V
VEE + 0.6
(3)
(3)
200
1600
VEE + 0.95
VCC − 0.2
SCO 100-Ω differential load,
1485 or 270 MHz
750
SDO, SCO 100-Ω differential
load
VCC − VSDOD
2970 Mbps, device enabled
Device disabled
(ENABLE = 0)
V
130
3
V
mVP-P
V
mVP-P
V
150
mA
mA
Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are referenced to
VEE (equal to zero volts).
Typical values are stated for: VCC = 3.3 V, TA = 25°C.
This parameter is ensured by characterization over voltage and temperature limits.
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LMH0356
SNLS270L – AUGUST 2007 – REVISED JANUARY 2016
www.ti.com
7.6 AC Electrical Characteristics
over supply voltage and recommended operating temperature ranges (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
BRSD
Serial data rate
ST-259
270
Mbps
BRSD
Serial data rate
ST-292
1483, 1485
Mbps
BRSD
Serial data rate
ST-424
2967, 2970
Mbps
TOLJIT
Serial input jitter tolerance 270 Mbps (2) (3) (4)
>6
UIP-P
TOLJIT
Serial input jitter tolerance 270 Mbps
(2) (3) (5)
>0.6
UIP-P
TOLJIT
Serial input jitter tolerance 1483 or 1485 Mbps (2) (3) (4)
>6
UIP-P
TOLJIT
Serial input jitter tolerance 1483 or 1485 Mbps (2) (3) (5)
>0.6
UIP-P
TOLJIT
Serial input jitter tolerance 2967 or 2970 Mbps
(2) (3) (4)
>6
UIP-P
TOLJIT
Serial input jitter tolerance 2967 or 2970 Mbps
tJIT
Serial data output jitter
>0.6
(2) (3) (5)
UIP-P
270 Mbps (3) (6)
0.01
0.03
UIP-P
(3) (7)
tJIT
Serial data output jitter
1483 or 1485 Mbps
0.04
0.05
UIP-P
tJIT
Serial data output jitter
2967 or 2970 Mbps (3) (8)
0.08
0.09
UIP-P
270-Mbps,
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