LMH1980MMEVAL/NOPB

User's Guide SNLA096B – July 2007 – Revised April 2013 AN-1618 LMH1980 Evaluation Board Instruction Manual 1 General Description The LMH1980 evaluation board can be used to test the LMH1980 auto-detecting SD/HD/PC video sync separator and as a reference for printed circuit board (PCB) layout design. 2 Power Supply The board can be powered using a clean supply voltage, between 3.3 V and 5.0 V, connected to VCC (J1) and GND (J2) via banana jacks. The LMH1980 supply voltage should be regulated within ±10% variation of the voltage range and should not be shared directly with other digital circuitry. 3 Video Input A clean, 75 Ω video source can be connected to the board via the video input BNC (J3), which is terminated with a 75 Ω load resistor on the board. Because the input can accept either SD or HD video inputs, a switch-controlled chroma filter, consisting of R9 and C2, is provided on the board. If a PC video input is used, C2 should be removed to disable the chroma filter. 4 Input Filtering When an HD tri-level sync input signal is applied, the HD flag (pin 5) will output logic low (following a brief delay for auto format detection) and Q1 will turn off, disabling the SD video chroma filter. When an SD bilevel sync input signal (NTSC/PAL) is applied, HD will output logic high and Q1 will turn on, enabling the chroma filter. When enabled, this low-pass filter will attenuate any chroma subcarrier amplitude extending near the sync pulse so it does not interfere with sync separation. The filter will also improve the input signal-to-noise ratio. The filter cutoff frequency (fCO), set by R9 and C2, can be changed depending on the attenuation needed for the SD video signal. Keep in mind that as fCO decreases, the LMH1980 output propagation delays increase, which will affect the timing relationship between the sync and video signals. Important: If fCO is set too low and HD video is applied, the filter can severely roll off and attenuate the input's high-bandwidth tri-level sync pulses such that the LMH1980 cannot detect a valid HD input signal. If the LMH1980 cannot detect a valid HD input, then the HD flag will never change from logic high to low and the switch-controlled filter will never be disabled via Q1. In other words, fCO should not be set so low that the filter impairs the LMH1980's ability to detect a valid HD input. The values of R9 and C2 shown in Figure 1 give fCO = 2.79 MHz (about -4 dB at 3.58 MHz NTSC subcarrier frequency) and does not impair auto format detection. If a PC video input is to be used, C2 should be removed to disable chroma filtering. This is necessary because HD will output logic high (as in the SD video input case) and enable the filter. A chroma filter could severely band-limit a high-bandwidth PC video signal, which could roll-off and attenuate the sync pulses such that the LMH1980 cannot detect a valid input signal. If some high-frequency noise filtering is needed for all video signal inputs, a small capacitor may be optionally placed at C1. The RC filter formed by R9 and C1 is always connected regardless of Q1’s switch state. When Q1 is turned on, C1 and C2 will be connected in parallel (C1+C2). 5 Test Points Test points and ground points are provided to measure the input and output signals using 10 MΩ oscilloscope probes with 10 pF load capacitance. All trademarks are the property of their respective owners. SNLA096B – July 2007 – Revised April 2013 Submit Documentation Feedback AN-1618 LMH1980 Evaluation Board Instruction Manual Copyright © 2007–2013, Texas Instruments Incorporated 1 Board Schematic 6 www.ti.com Board Schematic J1 VCC TP8 VCC J2 GND REXT 1 1 1 10 k: 1% 1 1 U2 R2 TP7 GND C4 10 PF 2 GND C3 0.1 PF 3 + R9 100: C5 0.1 PF 4 VIN R1 75: C1 *OPT C2 560 pF Q1 MMBT3904 R3 10 k: 5 BPOUT LMH1980 VCC BNC J3 OEOUT HD CSOUT VSOUT HSOUT 10 R4 100: 9 R5 100: 8 R6 100: 7 R7 100: 6 R8 100: 2 2 TP3 Burst/Back Porch Output 2 TP4 Composite Sync Output 2 TP5 Vertical Sync Output 2 TP6 Horizontal Sync Output 1 1 1 1 R10 100: 1 2 TP2 Odd/Even Field Output 1 TP1 HD Detect Flag Output Figure 1. LMH1980 Eval Board 870013153–200 Rev A 7 Board Layout Figure 2. Top Side 2 AN-1618 LMH1980 Evaluation Board Instruction Manual Copyright © 2007–2013, Texas Instruments Incorporated SNLA096B – July 2007 – Revised April 2013 Submit Documentation Feedback Bill of Materials www.ti.com Figure 3. Bottom Side 8 Bill of Materials Item Part Number 1 LMH1980 2 MMBT3904 3 Part Description Qty Ref Designator 1 U2 NPN Transistor, SOT-23 1 Q1 Digi-key PCC1762CTND Capacitor Ceramic 0.1 μF, X7R, 0603, 16V 1 C3 4 Digi-key PCC1828CTND Capacitor Ceramic 0.1 μF, X7R, 0805, 25V 1 C5 5 Digi-key PCC561BNCTND Capacitor Ceramic 560 pF, NPO, 0805, 50V 1 C2 6 Digi-key PCC561BNCTND Capacitor Ceramic 560 pF, NPO, 0805, 50V 1 C4 7 Digi-key P10.0KHCT-ND Resistor, 10 kΩ, 1%, 1/10W 0603 1 R2 8 Digi-key P10.0KCCT-ND Resistor, 10 kΩ, 1%, 1/8W 0805 1 R3 9 Digi-key P75.0CCT-ND Resistor, 75Ω, 1%, 1/8W 0805 1 R1 10 Digi-key P100CCT-ND Resistor, 100Ω, 1%, 1/8W 0805 7 R4, R5, R6, R7, R8, R9, R10 11 MOUSER 16BJ381 Banana Jack, Red 1 J1 12 12 MOUSER 16BJ382 Banana Jack, Black 1 J2 13 Newark 22C4690 EDGE-MOUNT BNC 1 J3 14 Digi-key 5001K-ND Test Point, Black 1 TP7 15 Digi-key 5000K-ND Test Point, Red 1 TP8 16 Digi-key 5001K-ND, 5004-ND Test Points, Black and Yellow 6 TP1, TP2, TP3, TP4, TP5, TP6 SNLA096B – July 2007 – Revised April 2013 Submit Documentation Feedback Remark Must be 1% or better Trompeter UCBJE20-1 Use black for GND points AN-1618 LMH1980 Evaluation Board Instruction Manual Copyright © 2007–2013, Texas Instruments Incorporated 3 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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