LMH6503MAX/NOPB

LMH6503 www.ti.com SNOSA78E – OCTOBER 2003 – REVISED APRIL 2013 LMH6503 Wideband, Low Power, Linear Variable Gain Amplifier Check for Samples: LMH6503 FEATURES DESCRIPTION • The LMH™6503 is a wideband, DC coupled, differential input, voltage controlled gain stage followed by a high-speed current feedback Op Amp which can directly drive a low impedance load. Gain adjustment range is more than 70dB for up to 10MHz. 1 23 • • • • • • • • • • • • VS = ±5V, TA = 25°C, RF = 1kΩ, RG = 174Ω, RL = 100Ω, AV = AV(MAX) = 10, Typical Values Unless Specified. -3dB BW 135MHz Gain Control BW 100MHz Adjustment Range (Typical Over Temp) 70dB Gain Matching (Limit) ±0.7dB Slew Rate 1800V/µs Supply Current (No Load) 37mA Linear Output Current ±75mA Output Voltage (RL = 100Ω) ±3.2V Input Voltage Noise 6.6nV/√Hz Input Current Noise 2.4pA/√Hz THD (20MHz, RL = 100Ω, VO = 2VPP) −57dBc Replacement for CLC522 APPLICATIONS • • • • Variable Attenuator AGC Voltage Controller Filter Multiplier Maximum gain is set by external components and the gain can be reduced all the way to cut-off. Power consumption is 370mW with a speed of 135MHz . Output referred DC offset voltage is less than 350mV over the entire gain control voltage range. Device-todevice Gain matching is within 0.7dB at maximum gain. Furthermore, gain at any VG is tested and the tolerance is ensured. The output current feedback Op Amp allows high frequency large signals (Slew Rate = 1800V/μs) and can also drive heavy load current (75mA). Differential inputs allow common mode rejection in low level amplification or in applications where signals are carried over relatively long wires. For single ended operation, the unused input can easily be tied to ground (or to a virtual half-supply in single supply application). Inverting or non-inverting gains could be obtained by choosing one input polarity or the other. To further increase versatility when used in a single supply application, gain control range is set to be from −1V to +1V relative to pin 11 potential (ground pin). In single supply operation, this ground pin is tied to a "virtual" half supply. Gain control pin has high input impedance to simplify its drive requirement. Gain control is linear in V/V throughout the gain adjustment range. Maximum gain can be set to be anywhere between 1V/V to 100V/V or higher. For linear in dB gain control applications, see LMH6502 datasheet. The LMH6503 is available in the SOIC-14 and TSSOP-14 package. 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LMH is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2013, Texas Instruments Incorporated LMH6503 SNOSA78E – OCTOBER 2003 – REVISED APRIL 2013 www.ti.com 30 11 dB 20 9 85°C -40°C 0 25°C -10 GAIN (dB) -40°C 8 7 85°C -20 6 25°C -30 5 -40 4 -50 GAIN (V/V) 10 10 3 V/V -60 2 -70 1 VIN_DIFF = ±0.1V -80 0 -1.2 -0.8 -0.4 0 0.4 0.8 1.2 VG (V) Figure 1. Gain vs. VG for Various Temperature Typical Application +5V +VIN 3 R1 50: RF 1k: NC 1 14 12 4 13 RG 170: VOUT LMH6503 10 5 -VIN 6 2 8 7 R2 50: 9 RL 100: 11 -5V VG Figure 2. AVMAX = 10V/V These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6503 LMH6503 www.ti.com SNOSA78E – OCTOBER 2003 – REVISED APRIL 2013 Absolute Maximum Ratings (1) (2) ESD Tolerance: (3) Human Body 2KV Machine Model 200V Input Current ±10mA ±(V+ −V−) VIN Differential 120mA (4) Output Current + − Supply Voltages (V - V ) 12.6V V+ +0.8V,V− - 0.8V Voltage at Input/ Output pins Soldering Information: Infrared or Convection (20 sec) 235°C Wave Soldering (10 sec) 260°C −65°C to +150°C Storage Temperature Range Junction Temperature (1) (2) (3) (4) +150°C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see the Electrical Characteristics tables. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. Human body model: 1.5kΩ in series with 100pF. Machine model: 0Ω in series with 200pF. The maximum output current (IOUT) is determined by device power dissipation limitations or value specified, whichever is lower. Operating Ratings (1) Supply Voltages (V+ - V−) 5V to 12V −40°C to +85°C Temperature Range θJA θJC 14-Pin SOIC 138°C/W 45°C/W 14-Pin TSSOP 160°C/W 51°C/W Thermal Resistance: (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see the Electrical Characteristics tables. Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6503 3 LMH6503 SNOSA78E – OCTOBER 2003 – REVISED APRIL 2013 www.ti.com Electrical Characteristics (1) Unless otherwise specified, all limits ensured for TJ = 25°C, VS = ±5V, AV(MAX) = 10, VCM = 0V, RF = 1kΩ, RG = 174Ω, VIN_DIFF = ±0.1V, RL = 100Ω, VG = +1V. Boldface limits apply at the temperature extremes. Parameter Test Conditions Min (2) Typ (2) Max (2) Units Frequency Domain Response BW -3dB Bandwidth VOUT < 0.5PP 135 VOUT < 0.5PP, AV(MAX) = 100 50 40 MHz GF Gain Flatness VOUT < 0.5VPP, −1V < VG < 1V, ±0.2dB MHz Att Range Flat Band (Relative to Max Gain) Attenuation Range (3) ±0.2dB Flatness, f < 30MHZ 20 ±0.1dB, f < 30MHZ 6.6 BW Control Gain Control Bandwidth VG = 0V (4) 100 MHz PL Linear Phase Deviation DC to 60MHz 1.6 deg G Delay Group Delay DC to 130MHz 2.6 ns CT (dB) Feed-through VG = −1.2V, 30MHz (Output Referred) −48 dB GR Gain Adjustment Range f < 10MHz 79 f < 30MHz 68 MHz dB Time Domain Response tr , tf Rise and Fall Time 0.5V Step 2.2 ns OS% Overshoot 0.5V Step 10 % SR Slew Rate 4V Step (5) 1800 V/µs ΔG Rate Gain Change Rate VIN = 0.3V, 10%−90% of final output 4.6 dB/ns Distortion & Noise performance HD2 2nd Harmonic Distortion 2VPP, 20MHz −60 dBc HD3 3rdHarmonic Distortion 2VPP, 20MHz −61 dBc THD Total Harmonic Distortion 2VPP, 20MHz −57 dBc En tot Total Equivalent Input Noise 1MHz to 150MHz 6.6 nV/√Hz In Input Noise Current 1MHz to 150MHz 2.4 pA/√Hz DG Differential Gain f = 4.43MHz, RL = 150Ω, Neg. Sync 0.15 % DP Differential Phase f = 4.43MHz, RL = 150Ω, Neg. Sync 0.22 deg (1) (2) (3) (4) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Typical values represent the most likely parametric norm. Bold numbers refer to over temperature limits. Flat Band Attenuation (Relative To Max Gain) Range Definition: Specified as the attenuation range from maximum which allows gain flatness specified (either ±0.2dB or ±0.1dB), relative to AVMAX gain. For example, for f 50dB (6) ±2.0 ±1.80 ±2.2 Differential Input Voltage Across pins 3 & 6 ±0.34 ±0.28 ±0.37 RG Current Pins 4 & 5 ±1.70 ±1.60 ±2.30 Bias Current Pins 3 & 6 (7) 11 18 20 Pins 3 & 6 (7), VS= ±2.5V 3 10 13 VIN_ IRG DIFF MAX IBIAS dB dB V/V V V mA µA TCBIAS Bias Current Drift Pin 3 & 6 (8) 100 I OFF Offset Current Pin 3 & 6 0.01 TC IOFF Offset Current Drift See (8) 5 nA/°C RIN Input Resistance Pin 3 & 6 750 kΩ CIN Input Capacitance Pin 3 & 6 5 pF IVG VG Bias Current Pin 2, VG = 1.4V (7) 45 µA TC IVG VG Bias Drift Pin 2 (8) 20 nA/°C R VG VG Input Resistance Pin 2 70 KΩ C VG VG Input Capacitance Pin 2 1.3 pF VOUT Output Voltage Range RL = 100Ω ±3.00 ±2.97 ±3.20 RL Open ±3.95 ±3.90 ±4.05 0.1 Ω ±75 ±70 ±90 mA nA/°C 2.0 2.5 µA V ROUT Output Impedance DC IOUT Output Current VOUT ±4V from Rails VO Output Offset Voltage −1V < VG < 1V ±80 ±350 ±380 mV +PSRR +Power Supply Rejection Ratio (See (9)) Input Referred, 1V change, VG = 1.4V −80 −58 −56 dB −PSRR −Power Supply Rejection Ratio (See (9)) Input Referred, 1V change, VG = 1.4V −67 −57 −51 dB CMRR Common Mode Rejection Ratio (See (10)) Input Referred, VG = 1V −1.8V < VCM < 1.8V −67 OFFSET dB CMRR definition: [|ΔVOUT/ΔVCM|/AV] with 0.1V differential input voltage. ΔVOUT is the change in output voltage with offset shift subtracted out. (7) Positive current correspondes to current flowing in the device. (8) Drift determined by dividing the change in parameter distribution at temperature extremes by the total temperature change. (9) +PSRR definition: [|ΔVOUT/ΔV+| /AV], -PSRR definition: [|ΔVOUT/ΔV−| /AV] with 0.1V differential input voltage. ΔVOUT is the change in output voltage with offset shift subtracted out. (10) CMRR definition: [|ΔVOUT/ΔVCM|/AV] with 0.1V differential input voltage. ΔVOUT is the change in output voltage with offset shift subtracted out. (6) Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6503 5 LMH6503 SNOSA78E – OCTOBER 2003 – REVISED APRIL 2013 www.ti.com Electrical Characteristics(1) (continued) Unless otherwise specified, all limits ensured for TJ = 25°C, VS = ±5V, AV(MAX) = 10, VCM = 0V, RF = 1kΩ, RG = 174Ω, VIN_DIFF = ±0.1V, RL = 100Ω, VG = +1V. Boldface limits apply at the temperature extremes. Parameter IS Min (2) Typ (2) Max (2) RL = Open 37 50 53 RL = Open, VS = ±2.5V 12 20 23 Test Conditions Supply Current Units mA Connection Diagram Top View V + 14 1 13 2 NC VG 3 12 +VIN +RG I 4 11 5 10 -VIN - - GND VOUT -RG V + V 9 6 VREF 7 8 - V Figure 3. 14-Pin SOIC AND TSSOP Packages See Package Numbers D0014A and PW0014A 6 Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6503 LMH6503 www.ti.com SNOSA78E – OCTOBER 2003 – REVISED APRIL 2013 Typical Performance Charateristics Unless otherwise specified: VS = ±5V, 25°C, VG = VG_MAX, VCM = 0V, RF = 1kΩ, RG = 174Ω, both inputs terminated in 50Ω, RL = 100Ω, Typical values, results referred to device output: Small Signal Frequency Response (AV = 2) Large Signal Frequency Response (AV = 2) 5 5 90 RF = 920:, RG = 820: 3 GAIN 45 0 0 -5 0 -3 GAIN (dB) RF = 2.4k:, RG = 2.1k: -18 -15 -90 -20 -13 -15 -45 -25 VOUT = 0.5VPP 1M 10M 100M 1G -225 RG = 2.15k: -35 100k -20 -180 AVMAX = 2 RF = 2.4k: -30 AVMAX = 2 -135 VOUT = 5VPP -270 1M 10M Figure 4. Figure 5. Frequency Response over Temperature (AV = 10) GAIN 0 -40°C -1 Frequency Response for Various VG (AVMAX = 10) 150 1 100 0 50 -1 0 -2 20 1.2V -0.4V -50 25°C -100 -4 85°C -150 -5 AVMAX = 10, VG = VGMAX -6 GAIN/PHASE DATA -7 GAIN (dB) GAIN (dB) -40°C PHASE (°) 25°C -3 PHASE FREQUENCY VALUE AT 25°C -9 1k 10k 100k 1M 10M 100M -60 -4 -1.0V -80 -5 -200 -6 -250 -7 -300 -8 -350 -9 -160 1k 1 0V -2 -40 0V -60 -0.48V -80 25°C VS = ±2.5V -100 AVMAX = 10 GAIN NORMALIZED TO LOW FREQUENCY -120 -160 VALUE AT EACH VG -7 1k 10k 100k 1M 10M 100M -7 1G 270 2 VOUT = 0.5VPP 1 GAIN 0 -1 GAIN (dB) GAIN (dB) 0 PHASE (°) 0.55V GAIN 1G Small Signal Frequency Response -20 -1 100M 3 40 0 -6 10M Figure 7. 20 -5 1M 100k FREQUENCY (Hz) PHASE -4 10k Figure 6. 2 -120 -140 EACH VG FREQUENCY (Hz) -0.48V -100 AVMAX = 10 GAIN NORMALIZED TO LOW FREQUENCY VALUE AT Frequency Response for Various VG (AVMAX = 10) (±2.5V) -3 -40 -0.4V 1G 3 0 -20 1.2V -3 NORMALIZED TO LOW -8 40 -1.0V GAIN 85°C -2 PHASE 1G FREQUENCY (Hz) FREQUENCY (Hz) 1 100M PHASE (°) -8 -10 -10 -2 AVMAX RF(k:) 225 100 10 2 750 1k 2.4k 180 90 45 100 -3 135 10 2 0 -45 -4 PHASE -5 -90 -6 -135 -7 -180 -8 -9 PHASE (°) GAIN (dB) -5 PHASE (°) PHASE -225 SEE NOTE 12 -270 f (25 MHz/DIV) FREQUENCY (Hz) Figure 8. Figure 9. Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6503 7 LMH6503 SNOSA78E – OCTOBER 2003 – REVISED APRIL 2013 www.ti.com Typical Performance Charateristics (continued) Unless otherwise specified: VS = ±5V, 25°C, VG = VG_MAX, VCM = 0V, RF = 1kΩ, RG = 174Ω, both inputs terminated in 50Ω, RL = 100Ω, Typical values, results referred to device output: Frequency Response for Various VG (AVMAX = 100) (Small Signal) 270 2 VOUT = 5VPP AVMAX RF(k:) 225 1 GAIN 100 10 2 750 1k 2.4k 180 GAIN (dB) -2 100 -3 135 90 -2 45 2 0 10 -4 -45 PHASE -5 -90 PIN = -42dBm 20 0 PHASE -20 -40 -4 1.1V -60 -5 0.5V -135 -7 -180 -8 -225 -7 -270 -8 SEE NOTE 12 40 AVMAX = 100 -3 -6 -9 60 SEE NOTE 12 GAIN 0 -1 GAIN (dB) 0 -1 1 PHASE (°) 3 PHASE (°) Large Signal Frequency Response -80 -6 0V -100 -0.5V 0 f (25 MHz/DIV) -120 100M 50M f (10 MHz/DIV) Figure 10. Figure 11. Frequency Response for Various VG (AVMAX = 100) (Large Signal) 1 Gain Control Frequency Response 5 60 SEE NOTE 12 GAIN 40 AVMAX = 100 -1 PIN = -22dBm 0 PHASE -3 -20 -40 -4 1.1V S21 (dB) GAIN (dB) -2 0 20 PHASE (°) 0 -5 -10 0.5V -80 -6 -15 0V -100 -7 0 -120 100M 50M AVMAX = 2V/V S21 (dB) + 20 PLOTTED SEE NOTE 11 -20 100k 1M -0.5V -8 VG = 0V AVERAGE PIN = 0dBm -60 -5 f (10 MHz/DIV) 10M 100M 1G FREQUENCY (Hz) Figure 12. Figure 13. IS vs. VS IS vs. VS 60 60 85°C 50 50 85°C 25°C 25°C 40 -40°C IS (mA) IS (mA) 40 30 20 30 -40°C 20 RL = OPEN 10 RL = OPEN 10 VG = VG_MAX VG = VG_MIN 0 0 2.5 8 3 3.5 4 4.5 5 5.5 6 2.5 3 3.5 4 4.5 5 ±SUPPLY VOLTAGE (V) ±SUPPLY VOLTAGE (V) Figure 14. Figure 15. Submit Documentation Feedback 5.5 6 Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6503 LMH6503 www.ti.com SNOSA78E – OCTOBER 2003 – REVISED APRIL 2013 Typical Performance Charateristics (continued) Unless otherwise specified: VS = ±5V, 25°C, VG = VG_MAX, VCM = 0V, RF = 1kΩ, RG = 174Ω, both inputs terminated in 50Ω, RL = 100Ω, Typical values, results referred to device output: Input Bias Current vs. VS AVMAX vs. VS 18 12 -40°C 16 10 85°C 14 85°C IB (PA) 25°C 10 -40°C 8 8 AVMAX (V/V) 12 6 6 25°C 4 -40°C 4 2 VG = VG_MAX 2 VIN_DIFF = 0.1V 0 0 2.5 3 3.5 4 4.5 5 5.5 6 2.5 2 3 ±SUPPLY VOLTAGES (V) 3.5 Figure 16. 4.5 5 5.5 6 Figure 17. PSRR ±5V PSRR ±2.5V 0 0 SEE NOTE 10 SEE NOTE 10 -10 -10 -20 -20 -30 -40 PSRR (dB) -30 PSRR (dB) 4 ±Supply Voltage (V) +PSRR -50 -60 +PSRR -40 -50 -60 -PSRR -70 -80 -70 VS = ±5V VS = ±2.5V -PSRR -80 VG = VGMAX -90 VG = VGMAX -90 1k 10k 100k 1M 10M 100M 1k 10k 10M Figure 18. Figure 19. 100M CMRR ±2.5V 0 SEE NOTE 9 SEE NOTE 9 -20 -20 -40 CMRR (dB) -40 CMRR (dB) 1M FREQUENCY (Hz) CMRR ±5V 0 100k FREQUENCY (Hz) MAXGAIN -60 MAXGAIN -60 -80 -80 VS = ±5V -100 VS = ±2.5V -100 AVMAX = 10 AVMAX = 10 PIN = 0dBm MIDGAIN PIN = 0dBm MIDGAIN -120 -120 1k 10k 100k 1M 10M 100M 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 20. Figure 21. 10M 100M Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6503 9 LMH6503 SNOSA78E – OCTOBER 2003 – REVISED APRIL 2013 www.ti.com Typical Performance Charateristics (continued) Unless otherwise specified: VS = ±5V, 25°C, VG = VG_MAX, VCM = 0V, RF = 1kΩ, RG = 174Ω, both inputs terminated in 50Ω, RL = 100Ω, Typical values, results referred to device output: AVMAX vs. VCM AVMAX vs. VCM 12 12 10 10 8 85°C 6 25°C 4 -40°C 8 2 AVMAX (V/V) AVMAX (V/V) 85°C VS = ±2.5V 4 VS = ±5V VIN_DIFF = 0.1V -2 VG = VGMAX -40°C 2 0 VIN_DIFF = 0.1V 0 25°C 6 VG = VGMAX -4 -2 -2 -3 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 -1 1 0 2 3 VCM (V) VCM (V) Figure 22. Figure 23. Supply Current vs. VCM 60 Supply Current vs. VCM 28 85°C 85°C 85°C 25°C 26 50 24 40 22 -40°C IS (mA) IS (mA) 25°C 30 20 20 -40°C 18 16 14 VS = ±5V 10 VS = ±2.5V 12 VG = VGMAX 0 VG = VGMAX 10 -3 -2 -1 0 1 2 -1.5 3 -1 -0.5 0 0.5 1 1.5 VCM (V) VCM (V) Figure 24. Figure 25. Output Offset Voltage vs.VCM (Typical Unit 1) Output Offset Voltage vs.VCM (Typical Unit 2) 0 120 85°C -5 -40°C 110 25°C -10 VO_OFFSET (mV) VO_OFFSET (mV) 100 90 80 85°C 70 25°C -20 -25 -30 -40°C 60 -35 VS = ±5V 50 VS = ±5V -40 VG = VGMAX VG = VGMAX -45 40 -3 -2 -1 0 1 2 3 VCM (V) -3 -2 -1 0 1 2 3 VCM (V) Figure 26. 10 -15 Figure 27. Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LMH6503 LMH6503 www.ti.com SNOSA78E – OCTOBER 2003 – REVISED APRIL 2013 Typical Performance Charateristics (continued) Unless otherwise specified: VS = ±5V, 25°C, VG = VG_MAX, VCM = 0V, RF = 1kΩ, RG = 174Ω, both inputs terminated in 50Ω, RL = 100Ω, Typical values, results referred to device output: Output Offset Voltage vs.VCM (Typical Unit 3) Feed through Isolation 60 -100 40 -110 -40°C 0 85°C GAIN (dB) VO_OFFSET (mV) 20 -120 -130 -140 -40 AVMAX = 100 AVMAX = 2 -60 25°C -150 AVMAX = 10 -20 -80 -160 VS = ±5V -100 VG = VGMAX -120 100k -170 -2 -3 -1 1 0 2 3 1M Figure 28. Gain Flatness and Linear Phase Deviation -1.0V 1.6 0.10 1.2 1.2V 0.00 0.8 PHASE -0.10 0.4 -0.20 0 1.2V -0.30 -0.4V -1.0V -0.40 -0.4 -0.8 GAIN DATA NORMALIZED TO LOW FREQUENCY VALUE AT EACH VG 10M RF = 1k: 1M RG = 170: ±0.1dB PIN = -10dBm -1.2 VG VARIED 100k -1.6 -0.60 ±0.2dB 100M 2 -0.4V GAIN FLATNESS (Hz) (RELATIVE TO MAX GAIN) GAIN LINEAR PHASE DEVIATION (°) GAIN (dB) (1) Gain Flatness Frequency vs. Gain 2.4 0.20 -0.50 100M Figure 29. 0.40 0.30 10M FREQUENCY (Hz) VCM (V) 0 f (3 MHz/DIV) 1 2 3 4 5 6 7 8 9 10 AV (V/V) Figure 30. Figure 31. Group Delay vs. Frequency K Factor vs. RG 2.80 2.1 VG = VGMAX RF = 477: 2 AVMAX = 10 RF = 690: 1.9 2.60 1.8 2.50 K (V/V) GROUP DELAY (ns) 2.70 2.40 2.30 1.7 RF = 6.18k: 1.6 RF = 1.3k: 1.5 2.20 1.4 2.10 1.3 2.00 1.2 10 f (5 MHz/DIV) 100 1k 2k RG (:) Figure 32. (1) Figure 33. Flat Band Attenuation (Relative To Max Gain) Range Definition: Specified as the attenuation range from maximum which allows gain flatness specified (either ±0.2dB or ±0.1dB), relative to AVMAX gain. For example, for f