LMH6554LE/NOPB

Sample & Buy Product Folder Support & Community Tools & Software Technical Documents LMH6554 SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 LMH6554 2.8-GHz Ultra Linear Fully Differential Amplifier 1 Features 3 Description • • • • • • • • • • • The LMH6554 device is a high-performance fully differential amplifier designed to provide the exceptional signal fidelity and wide large-signal bandwidth necessary for driving 8- to 16-bit highspeed data acquisition systems. Using TI’s proprietary differential current mode input stage architecture, the LMH6554 has unity gain, smallsignal bandwidth of 2.8 GHz and allows operation at gains greater than unity without sacrificing response flatness, bandwidth, harmonic distortion, or output noise performance. 1 Small-Signal Bandwidth 2.8 GHz 2 VPP Large-Signal Bandwidth 1.8 GHz 0.1 dB Gain Flatness 830 MHz OIP3 at 150 MHz 46.5 dBm HD2/HD3 at 75 MHz –96 / –97 dBc Input Noise Voltage 0.9 nV/√Hz Input Noise Current 11 pA/√Hz Slew Rate 6200 V/μs Power 260 mW Typical Supply Current 52 mA 14-Lead UQFN Package The low-impedance differential output of the device is designed to drive ADC inputs and any intermediate filter stage. The LMH6554 delivers 16-bit linearity up to 75 MHz when driving 2-V peak-to-peak into loads as low as 200 Ω. 2 Applications • • • • • • • • • Differential ADC Driver Single-Ended to Differential Converter High-Speed Differential Signaling IF/RF and Baseband Gain Blocks SAW Filter Buffer/Driver Oscilloscope Probes Automotive Safety Applications Video Over Twisted Pair Differential Line Driver The LMH6554 is fabricated in TI's advanced complementary BiCMOS process and is available in a space-saving 14-lead UQFN package for higher performance. Device Information(1) PART NUMBER LMH6554 PACKAGE UQFN (14) BODY SIZE (NOM) 2.50 mm × 2.50 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 4 Typical Application Schematic 200: 91: RS = 50: VS C a V 76.8: AC-Coupled Source 0.1 PF + 50: VCM + - 30: 0.1 PF Up To 16-Bit Data Converter LMH6554 - + 91: 50: - VCMO V 0.1 PF 200: ADC VEN 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LMH6554 SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Typical Application Schematic............................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 1 2 3 4 7.1 7.2 7.3 7.4 7.5 7.6 4 4 4 4 5 7 Absolute Maximum Ratings ..................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics: +5 V ................................. Typical Performance Characteristics VS = ±2.5 V .... Detailed Description ............................................ 11 8.1 8.2 8.3 8.4 Overview ................................................................. Functional Block Diagram ....................................... Feature Description................................................. Device Functional Modes........................................ 11 11 11 12 9 Application and Implementation ........................ 13 9.1 Application Information............................................ 13 9.2 Typical Applications ................................................ 13 10 Power Supply Recommendations ..................... 20 10.1 Power Supply Bypassing ...................................... 20 11 Layout................................................................... 21 11.1 11.2 11.3 11.4 Layout Guidelines ................................................. Layout Example .................................................... Power Dissipation ................................................. ESD Protection...................................................... 21 21 22 22 12 Device and Documentation Support ................. 23 12.1 12.2 12.3 12.4 12.5 Device Support...................................................... Documentation Support ........................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 23 23 23 23 23 13 Mechanical, Packaging, and Orderable Information ........................................................... 23 5 Revision History Changes from Revision O (March 2013) to Revision P • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .................................................................................................. 1 Changes from Revision N (March 2013) to Revision O • 2 Page Page Changed layout of National Data Sheet to TI format ........................................................................................................... 23 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 LMH6554 www.ti.com SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 6 Pin Configuration and Functions NHJ Package 14 Pins Top View V - 3 + VCM V 2 1 14 NC +FB 4 RF -IN 5 13 +OUT +IN 6 12 -OUT -FB 7 11 NC RG RG RF 8 V - 9 10 VEN V + Pin Functions PIN NAME NO. I/O DESCRIPTION -FB 7 O Feedback from -OUT +FB 4 O Feedback from +OUT +IN 6 I Positive Input -IN 5 I Negative Input NC 11 — No Connection NC 14 — No Connection -OUT 12 O Negative Output +OUT 13 O Positive Output VCM 2 I Output Common Mode Voltage VEN 9 I Enable V- 3 P Negative Supply V- 8 P Negative Supply V+ 1 P Positive Supply V+ 10 P Positive Supply Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 3 LMH6554 SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings (1) (2) (3) MIN Supply Voltage (VS = V+ - V−) V- Common Mode Input Voltage Maximum Operating Junction Temperature Maximum Input Current Infrared or Convection (30 sec) −65 Storage Temperature, Tstg (3) (4) V V+ V 150 °C 30 mA mA Soldering Information (2) UNIT 5.5 (4) Maximum Output Current (pins 12, 13) (1) MAX 260 °C 150 °C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating Conditions indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see the Electrical Characteristics: +5 V tables. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. For soldering specifications, see SNOA549. The maximum output current (IOUT) is determined by device power dissipation limitations. See Power Dissipation for more details. 7.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000 Charged-device model (CDM), per JEDEC specification JESD22C101 (2) ±750 Machine model (MM) ±250 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions (1) See MIN Operating Temperature Range Total Supply Voltage Temperature Range (1) MAX UNIT −40 NOM +125 °C 4.7 5.25 V Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating Conditions indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see the Electrical Characteristics: +5 V tables. 7.4 Thermal Information LMH6554 THERMAL METRIC (1) NHJ UNIT 14 PINS RθJA (1) 4 Junction-to-ambient thermal resistance 60 °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 LMH6554 www.ti.com SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 7.5 Electrical Characteristics: +5 V Unless otherwise specified, all limits are ensured for TA = +25°C, AV = +2, V+ = +2.5 V, V− = −2.5 V, RL = 200 Ω, VCM = (V++V-)/2, RF = 200 Ω, for single-ended in, differential out. (1) PARAMETER TEST CONDITIONS MIN (2) TYP (3) MAX (2) UNIT AC PERFORMANCE (DIFFERENTIAL) SSBW LSBW Small Signal −3 dB Bandwidth (2) Large Signal Bandwidth AV = 1, VOUT = 0.2 VPP 2800 AV = 2, VOUT = 0.2 VPP 2500 AV = 4, VOUT = 0.2 VPP 1600 AV = 1, VOUT = 2 VPP 1800 AV = 2, VOUT = 2 VPP 1500 AV = 2, VOUT = 1.5 VPP 1900 0.1 dBBW 0.1 dB Bandwidth AV = 2, VOUT = 0.2 VPP, RF = 250Ω SR Slew Rate 4V Step MHz MHz 830 MHz 6200 V/μs 2V Step, 10–90% 290 0.4V Step, 10–90% 150 tr/tf Rise/Fall Time ps Ts_0.1 0.1% Settling Time 2V Step, RL = 200Ω 4 ns Overdrive Recovery Time VIN = 2V, AV = 5 V/V 6 ns DISTORTION AND NOISE RESPONSE HD2 2nd Harmonic Distortion VOUT = 2 VPP, f = 20 MHz -102 VOUT = 2 VPP, f = 75 MHz -96 VOUT = 2 VPP, f = 125 MHz -87 VOUT = 2 VPP, f = 250 MHz −79 −81 VOUT = 1.5 VPP, f = 250 MHz HD3 rd 3 Harmonic Distortion dBc VOUT = 2 VPP, f = 20 MHz −110 VOUT = 2 VPP, f = 75 MHz −97 VOUT = 2 VPP, f = 125 MHz −87 VOUT = 2 VPP, f = 250 MHz −70 dBc VOUT = 1.5 VPP, f = 250 MHz −75 OIP3 Output 3rd-Order Intercept f = 150 MHz, VOUT = 2VPP Composite 46.5 IMD3 Two-Tone Intermodulation f = 150 MHz, VOUT = 2VPP Composite −97 dBc en Input Voltage Noise Density f = 10 MHz 0.9 nV/√Hz in+ Input Noise Current f = 10 MHz 11 pA/√Hz in- Input Noise Current f = 10 MHz 11 pA/√Hz NF Noise Figure 50Ω System, AV = 7.3, 100 MHz 7.7 dB (4) dBm INPUT CHARACTERISTICS −75 IBI+ / IBITCIbi Input Bias Current Temperature Drift IBID Input Bias Current TCIbo Input Bias Current Diff Offset Temperature Drift (3) CMRR Common Mode Rejection Ratio (1) (2) (3) (4) (5) (5) −29 20 8 VCM = 0V, VID = 0V, IBOFFSET = (IB- - IB+)/2 −10 1 0.006 DC, VCM = 0V, VID = 0V µA µA/°C μA 10 µA/°C 83 dB Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. See Thermal Information for information on temperature de-rating of this device." Min/Max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material. For test schematic, refer to Figure 34. IBI is referred to a differential output offset voltage by the following relationship: VOD(OFFSET) = IBI*2RF. Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 5 LMH6554 SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 www.ti.com Electrical Characteristics: +5 V (continued) Unless otherwise specified, all limits are ensured for TA = +25°C, AV = +2, V+ = +2.5 V, V− = −2.5 V, RL = 200 Ω, VCM = (V++V-)/2, RF = 200 Ω, for single-ended in, differential out.(1) PARAMETER TEST CONDITIONS MIN (2) TYP (3) MAX (2) UNIT 19 Ω 1 pF ±1.3 V RIN Differential Input Resistance Differential CIN Differential Input Capacitance Differential CMVR Input Common Mode Voltage Range CMRR > 32 dB ±1.25 Single-Ended Output ±1.35 ±1.42 V VOUT = 0V ±120 ±150 mA OUTPUT PERFORMANCE Output Voltage Swing (3) (3) IOUT Output Current ISC Short Circuit Current One Output Shorted to Ground VIN = 2V Single-Ended (6) 150 mA Output Balance Error ΔVOUT Common Mode /ΔVOUT Differential, ΔVOD = 1V, f < 1 Mhz −64 dB Common Mode Small Signal Bandwidth VIN+ = VIN− = 0V 500 MHz Slew Rate VIN+ = VIN− = 0V Input Offset Voltage Common Mode, VID = 0, VCM = 0V OUTPUT COMMON MODE CONTROL CIRCUIT VOSCM IOSCM Input Offset Current 200 CMRR −6.5 4 mV 6 18 μA ±1.18 ±1.25 V 82 dB (7) Voltage Range Measure VOD, VID = 0V Input Resistance 180 ΔVOCM/ΔVCM Gain V/μs −16 0.99 0.995 kΩ 1.0 V/V MISCELLANEOUS PERFORMANCE ZT Open Loop Transimpedance Gain Differential PSRR Power Supply Rejection Ratio DC, ΔV+ = ΔV− = 1V IS Supply Current (3) Enable Voltage Threshold Disable Voltage Threshold 180 RL = ∞ 74 95 46 52 At extreme temperatures (6) (7) (8) 6 Supply Current, Disabled dB 57 60 mA Single 5V Supply (8) 2.5 V Single 5V Supply (8) 2.5 V Enable/Disable Time ISD kΩ 15 Enable=0, Single 5-V supply 450 510 At extreme temperatures ns 570 600 μA Short circuit current should be limited in duration to no more than 10 seconds. See Power Dissipation for more details. Negative input current implies current flowing out of the device. VEN threshold is typically +/-0.3V centered around (V+ + V-) / 2 relative to ground. Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 LMH6554 www.ti.com SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 7.6 Typical Performance Characteristics VS = ±2.5 V (TA = 25°C, RF = 200 Ω, RG = 90 Ω, RT = 76.8 Ω, RL = 200 Ω, AV = +2, for single ended in, differential out, unless specified). 2 2 RF = 200: 1 0 -1 NORMALIZED GAIN (dB) 0 NORMALIZED GAIN (dB) AV = 1 V/V 1 RF = 250: -2 -3 RF = 300: -4 -5 -6 -7 -1 AV = 2 V/V -2 -3 AV = 4 V/V -4 -5 AV = 8 V/V -6 -7 -8 -8 -9 -10 1 -9 VOD = 0.2 VPP 10 100 1000 -10 1 10000 VOD = 0.2 VPP 10 FREQUENCY (MHz) Figure 1. Frequency Response vs RF RL = 1k: 0 RL = 500: NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) VOD = 0.2 VPP 1 2 0 -2 RL = 200: -4 -6 -1 VOD = 1.6 VPP -2 -3 -4 VOD = 2 VPP -5 -6 -7 -8 -8 -9 VOD = 0.2 VPP 10 100 1000 -10 1 10000 10 FREQUENCY (MHz) 0.2 1.0 0.1 0.5 VOD (V) 1.5 0 -0.5 -0.2 -1.0 3 4 5 6 7 10000 0 -0.1 2 1000 Figure 4. Frequency Response vs Output Voltage (VOD) 0.3 1 100 FREQUENCY (MHz) Figure 3. Frequency Response vs RL VOD (V) 10000 Figure 2. Frequency Response vs Gain 2 4 -0.3 0 1000 FREQUENCY (MHz) 6 -10 1 1100 8 9 -1.5 0 10 TIME (ns) 1 2 3 4 5 6 7 8 9 10 TIME (ns) Figure 5. 0.5 VPP Pulse Response Single-Ended Input Figure 6. 2 VPP Pulse Response Single-Ended Input Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 7 LMH6554 SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 www.ti.com Typical Performance Characteristics VS = ±2.5 V (continued) (TA = 25°C, RF = 200 Ω, RG = 90 Ω, RT = 76.8 Ω, RL = 200 Ω, AV = +2, for single ended in, differential out, unless specified). -60 2.0 -65 1.5 -70 DISTORTION (dBc) 2.5 VOD (V) 1.0 0.5 0 -0.5 -1.0 -75 -80 -90 -2.0 -105 2 3 4 5 6 7 8 9 HD3 -95 -100 1 HD2 -85 -1.5 -2.5 0 RL = 200: VOD = 2 VPP VOCM = 0V -110 25 10 75 125 TIME (ns) -40 RL = 200: VOD = 2 VPP fc = 25 MHz RL = 200: VOD = 2 VPP fc = 75 MHz -50 DISTORTION (dBc) -60 DISTORTION (dBc) 275 300 Figure 8. Distortion vs Frequency Single-Ended Input -50 -70 HD3 -80 -90 HD2 -100 -60 -70 HD3 -80 HD2 -90 -0.5 0 0.5 -100 -1.0 1.0 -0.5 0 VOCM (V) 0.5 1.0 VOCM (V) Figure 9. Distortion vs Output Common Mode Voltage Figure 10. Distortion vs Output Common Mode Voltage -20 -80 RL = 200: VOD = 2 VPP fc = 150 MHz -30 -85 -40 150 MHz -50 IMD 3 (dBc) DISTORTION (dBc) 225 FREQUENCY (MHz) Figure 7. 4 VPP Pulse Response Single-Ended Input -110 -1.0 175 -60 HD3 -70 -90 -95 75 MHz -80 -100 HD2 -90 -100 -1.0 -0.5 0 0.5 -105 0.8 1.0 Figure 11. Distortion vs Output Common Mode Voltage 8 1.0 1.2 1.4 1.6 1.8 2 DIFFERENTIAL VOUT (VPP_EACH_TONE) VOCM (V) Figure 12. 3rd Order Intermodulation Products vs VOUT Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 LMH6554 www.ti.com SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 Typical Performance Characteristics VS = ±2.5 V (continued) (TA = 25°C, RF = 200 Ω, RG = 90 Ω, RT = 76.8 Ω, RL = 200 Ω, AV = +2, for single ended in, differential out, unless specified). 55 55 150 MHz 75 MHz 50 50 45 45 OIP3 (dBm) OIP3 (dBm) 40 40 250 MHz 35 35 30 25 30 450 MHz 20 25 15 20 -4 -3 -2 -1 0 1 2 3 10 50 100 150 200 250 300 350 400 450 500 4 DIFFERENTIAL OUTPUT POWER POD (dBm/tone) CENTER FREQUENCY (MHz) Figure 13. OIP3 vs Output Power POUT Figure 14. OIP3 vs Center Frequency 1.6 8.0 1.4 MAXIMUM VOUT (V) 7.6 7.4 Av= 7.3 V/V Rs= 50 Single Ended Input 7.2 1.2 1.0 0.8 0.6 0.4 0.2 VIN = 1.7V SINGLE-ENDED INPUT 7.0 0 100 200 300 400 FREQUENCY (MHz) 0 0 500 -20 Figure 15. Noise Figure vs Frequency -80 INPUT -0.2 0.8 OUTPUT VOLTAGE (VOD) 2 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4 20 40 60 80 -100 1.2 3 VIN = 1.7V SINGLE-ENDED INPUT MINIMUM VOUT (V) -60 Figure 16. Maximum VOUT vs IOUT 0 -1.6 0 -40 OUTPUT CURRENT (mA) 100 OUTPUT CURRENT (mA) 0.4 1 OUTPUT 0 0 -1 -0.4 -2 -0.8 -3 0 200 400 600 800 INPUT VOLTAGE (V) NOISE FIGURE (dB) 7.8 -1.2 1000 TIME (ns) Figure 17. Minimum VOUT vs IOUT Figure 18. Overdrive Recovery Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 9 LMH6554 SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 www.ti.com Typical Performance Characteristics VS = ±2.5 V (continued) (TA = 25°C, RF = 200 Ω, RG = 90 Ω, RT = 76.8 Ω, RL = 200 Ω, AV = +2, for single ended in, differential out, unless specified). 90 90 85 +PSRR 80 80 75 75 CMRR (dB) PSRR (dBc DIFFERENTIAL) 85 70 -PSRR 65 60 70 65 60 55 55 50 50 45 45 VIN = 0V 40 1 10 100 VIN = 0V VOD = 1VPP 40 1 1000 10 FREQUENCY (MHz) 100 1000 FREQUENCY (MHz) Figure 19. PSRR Figure 20. CMRR -30 120 0 100 -30 80 -60 60 -90 40 -120 AV = 1 V/V -45 -50 PHASE (°) -40 |Z| (dB. ) BALANCE ERROR (dBc) -35 -55 20 -60 -150 Gain Phase 0 -65 1 10 100 1000 100k -180 1M 10M 100M 1G FREQUECNY (Hz) FREQUENCY (MHz) 10G Figure 22. Open Loop Transimpedance Figure 21. Balance Error 10 1k 0 -10 MAGNITUDE (dB) |Z| ( ) 100 10 1 -20 S11 S22 S21 -30 -40 -50 S11 -60 (SINGLE-ENDED INPUT) -70 S12 -80 -90 100m 1 10 100 FREQUENCY (MHz) 1k AV = 1 V/V 10 100 1000 3000 FREQUENCY (MHz) Figure 23. Closed-Loop Output Impedance 10 -100 1 Figure 24. Differential S-Parameter Magnitude vs Frequency Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 LMH6554 www.ti.com SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 8 Detailed Description 8.1 Overview The LMH6554 is a fully differential, current feedback amplifier with integrated output common mode control, designed to provide low distortion amplification to wide bandwidth differential signals. The common mode feedback circuit sets the output common mode voltage independent of the input common mode, as well as forcing the V+ and V− outputs to be equal in magnitude and opposite in phase, even when only one of the inputs is driven as in single to differential conversion. The proprietary current feedback architecture of the LMH6554 offers gain and bandwidth independence with exceptional gain flatness and noise performance, even at high values of gain, simply with the appropriate choice of RF1 and RF2. Generally RF1 is set equal to RF2, and RG1 equal to RG2, so that the gain is set by the ratio RF/RG. Matching of these resistors greatly affects CMRR, DC offset error, and output balance. 8.2 Functional Block Diagram V+ +FB +OUT -IN ± 2.5 k High-Aol + Differential I/O Amplifier ± +IN 2.5 k + -OUT -FB V+ ± Vcm Error Amplifier + VEN High Impedance VCM Buffer V± 8.3 Feature Description The proprietary current feedback architecture of the LMH6554 offers gain and bandwidth independence with exceptional gain flatness and noise performance, even at high values of gain, simply with the appropriate choice of RF1 and RF2. Generally RF1 is set equal to RF2, and RG1 equal to RG2, so that the gain is set by the ratio RF/RG. Matching of these resistors greatly affects CMRR, DC offset error, and output balance. A maximum of 0.1% tolerance resistors are recommended for optimal performance, and the amplifier is internally compensated to operate with optimum gain flatness with RF value of 200 Ω depending on PCB layout, and load resistance. The output common mode voltage is set by the VCM pin with a fixed gain of 1 V/V. This pin should be driven by a low impedance reference and should be bypassed to ground with a 0.1-μF ceramic capacitor. Any unwanted signal coupling into the VCM pin will be passed along to the outputs, reducing the performance of the amplifier. The LMH6554 can be configured to operate on a single 5V supply connected to V+ with V- grounded or configured for a split supply operation with V+ = +2.5 V and V− = −2.5 V. Operation on a single 5-V supply, depending on gain, is limited by the input common mode range; therefore, AC coupling may be required. Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 11 LMH6554 SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 www.ti.com 8.4 Device Functional Modes This wideband FDA requires external resistors for correct signal-path operation. When configured for the desired input impedance and gain setting with these external resistors, the amplifier can be either on with the PD pin asserted to a voltage greater than Vs– + 1.7 V, or turned off by asserting PD low. Disabling the amplifier shuts off the quiescent current and stops correct amplifier operation. The signal path is still present for the source signal through the external resistors. The Vocm control pin sets the output average voltage. Left open, Vocm defaults to an internal midsupply value. Driving this high-impedance input with a voltage reference within its valid range sets a target for the internal Vcm error amplifier. 12 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 LMH6554 www.ti.com SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The LMH6554 is a fully differential, current feedback amplifier with integrated output common mode control, designed to provide low distortion amplification to wide bandwidth differential signals. The common mode feedback circuit sets the output common mode voltage independent of the input common mode, as well as forcing the V+ and V− outputs to be equal in magnitude and opposite in phase, even when only one of the inputs is driven as in single to differential conversion. The proprietary current feedback architecture of the LMH6554 offers gain and bandwidth independence with exceptional gain flatness and noise performance, even at high values of gain, simply with the appropriate choice of RF1 and RF2. Generally RF1 is set equal to RF2, and RG1 equal to RG2, so that the gain is set by the ratio RF/RG. Matching of these resistors greatly affects CMRR, DC offset error, and output balance. A maximum of 0.1% tolerance resistors are recommended for optimal performance, and the amplifier is internally compensated to operate with optimum gain flatness with RF value of 200 Ω depending on PCB layout, and load resistance. The output common mode voltage is set by the VCM pin with a fixed gain of 1 V/V. This pin should be driven by a low impedance reference and should be bypassed to ground with a 0.1-µF ceramic capacitor. Any unwanted signal coupling into the VCM pin will be passed along to the outputs, reducing the performance of the amplifier. The LMH6554 can be configured to operate on a single 5-V supply connected to V+ with V- grounded or configured for a split supply operation with V+ = +2.5 V and V− = −2.5 V. Operation on a single 5-V supply, depending on gain, is limited by the input common mode range; therefore, AC coupling may be required. Split supplies will allow much less restricted AC and DC coupled operation with optimum distortion performance. 9.2 Typical Applications 9.2.1 Single-Ended Input to Differential Output Operation 200: 91: RS = 50: VS C a V 76.8: AC-Coupled Source 0.1 PF + 50: VCM + LMH6554 - + 91: 30: 0.1 PF 50: - VCMO V 0.1 PF 200: ADC Up To 16-Bit Data Converter VEN Figure 25. Single-Ended Input to Differential Output Schematic 9.2.1.1 Design Requirements One typical application for the LMH6554 is to drive an ADC as shown in Figure 25. The following design is a single-ended to differential circuit with an input impedance of 50 Ω and an output impedance of 100 Ω. The VCM voltage of the amplifier needs to be set to the same voltage as the ADC reference voltage, which is typically 1.2 V. Figure 27 shows the design equations required to set the external resistor values. This design also requires a gain of 2 and -96 dBc THD at 75 MHz. Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 13 LMH6554 SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 www.ti.com Typical Applications (continued) 9.2.1.2 Detailed Design Procedure To match the input impedance of the circuit in Figure 27 to a specified source resistance, RS, requries that RT || RIN = RS. The equations governing RIN and AV for single-to-differential operation are also provided in Figure 27. These equations, along with the source matching condition, must be solved iteratively to achieve the desired gain with the proper input termination. Component values for several common gain configuration in a 50 Ω environment are given in Table 1. 9.2.1.2.1 Enable / Disable Operation The LMH6554 is equipped with an enable pin (VEN) to reduce power consumption when not in use. The VEN pin, when not driven, floats high (on). When the VEN pin is pulled low, the amplifier is disabled and the amplifier output stage goes into a high impedance state so the feedback and gain set resistors determine the output impedance of the circuit. For this reason input to output isolation will be poor in the disabled state and the part is not recommended in multiplexed applications where outputs are all tied together. With a 5V difference between V+ and V-, the VEN threshold is ½ way between the supplies (e.g. 2.5V with 5V single supply) as shown in Figure 26. R2 ensures active (enable) mode with VEN floating, and R1 provides input current limiting. VEN also has ESD diodes to either supply. LMH6554 Bias Circuitry R Supply Mid-Point Q2 R2 20k R1 10k Q1 ESD Proteciont V+ VEN R I Tail V- Figure 26. Enable Block Diagram 9.2.1.2.2 Single-Ended Input to Differential Output Operation In many applications, it is required to drive a differential input ADC from a single ended source. Traditionally, transformers have been used to provide single to differential conversion, but these are inherently bandpass by nature and cannot be used for DC coupled applications. The LMH6554 provides excellent performance as a single-ended input to differential output converter down to DC. Figure 27 shows a typical application circuit where an LMH6554 is used to produce a balanced differential output signal from a single ended source. 14 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 LMH6554 www.ti.com SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 Typical Applications (continued) RF AV, RIN V RS VS a + RO RG + VCM RT - IN+ RO RG +- ADC + RM IN- VO LMH6554 V - RF § ¨ ¨ © § RG E1 = ¨R + R ¨ G F © § ¨ ¨ © § ¨ ¨ © §2RG + RM (1-E2) RIN = ¨¨ 1 + E2 © § ¨ ¨ © § 2(1 - E1) AV = ¨¨ © E1 + E2 § RG + RM E2 = ¨¨R + R + R F M © G RS = RT || RIN RM = RT || RS Figure 27. Single-Ended Input with Differential Output When using the LMH6554 in single-to-differential mode, the complimentary output is forced to a phase inverted replica of the driven output by the common mode feedback circuit as opposed to being driven by its own complimentary input. Consequently, as the driven input changes, the common mode feedback action results in a varying common mode voltage at the amplifier's inputs, proportional to the driving signal. Due to the non-ideal common mode rejection of the amplifier's input stage, a small common mode signal appears at the outputs which is superimposed on the differential output signal. The ratio of the change in output common mode voltage to output differential voltage is commonly referred to as output balance error. The output balance error response of the LMH6554 over frequency is shown in the Typical Performance Characteristics VS = ±2.5 V. To match the input impedance of the circuit in Figure 27 to a specified source resistance, RS, requries that RT || RIN = RS. The equations governing RIN and AV for single-to-differential operation are also provide in Figure 27. These equations, along with the source matching condition, must be solved iteratively to achieve the desired gain with the proper input termination. Component values for several common gain configuration in a 50Ω environment are given in Table 1. Table 1. Gain Component Values for 50 Ω System GAIN RF RG RT RM 0dB 200Ω 6dB 200Ω 191Ω 62Ω 27.7Ω 91Ω 76.8Ω 12dB 200Ω 30.3Ω 35.7Ω 147Ω 37.3Ω 9.2.1.2.3 Driving Capacitive Loads As noted previously, capacitive loads should be isolated from the amplifier output with small valued resistors. This is particularly the case when the load has a resistive component that is 500 Ω or higher. A typical ADC has capacitive components of around 10 pF and the resistive component could be 1000 Ω or higher. If driving a transmission line, such as 50-Ω coaxial or 100-Ω twisted pair, using matching resistors will be sufficient to isolate any subsequent capacitance. For other applications, see Figure 29 in Typical Performance Characteristics VS = ±2.5 V. 9.2.1.3 Application Curves Many application circuits will have capacitive loading. As shown in Figure 28, amplifier bandwidth is reduced with increasing capacitive load, so parasitic capacitance should be strictly limited. Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 15 LMH6554 SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 www.ti.com In order to ensure stability resistance should be added between the capacitive load and the amplifier output pins. The value of the resistor is dependent on the amount of capacitive load as shown in Figure 29. This resistive value is a suggestion. System testing will be required to determine the optimal value. Using a smaller resistor will retain more system bandwidth at the expense of overshoot and ringing, while larger values of resistance will reduce overshoot but will also reduce system bandwidth. 3 70 LOAD = 1k: || CAP LOAD 2 CL=2.2 pF, RO=38: 60 0 -1 -2 CL=6.8 pF, RO=22: -3 -4 CL=18 pF, RO=14: SUGGESTED RO (:) NORMALIZED GAIN (dB) 1 -5 -6 CL=68 pF, RO=5: 50 40 30 20 -7 -8 10 -9 V = 200 mV OD PP -10 1 10 100 1000 0 5 10000 10 FREQUENCY (MHz) 15 20 25 30 35 40 CAPACITIVE LOAD (pF) Figure 28. Frequency Response vs Capacitive Load Figure 29. Suggested ROUT vs Capacitive Load 9.2.2 Fully Differential Operation The LMH6554 will perform best in a fully differential configuration. The circuit shown in Figure 30 is a typical fully differential application circuit as might be used to drive an analog to digital converter (ADC). In this circuit the closed loop gain is AV= VOUT / VIN = RF / RG, where the feedback is symmetric. The series output resistors, RO, are optional and help keep the amplifier stable when presented with a capacitive load. Refer to the Driving Capacitive Loads section for details. Here is the expression for the input impedance, RIN, as defined in Figure 30: RIN = 2RG When driven from a differential source, the LMH6554 provides low distortion, excellent balance, and common mode rejection. This is true provided the resistors RF, RG and RO are well matched and strict symmetry is observed in board layout. With an intrinsic device CMRR of greater than 70 dB, using 0.1% resistors will give a worst case CMRR of around 50 dB for most circuits. The circuit configuration shown in Figure 30 was used to measure differential S-parameters in a 100Ω environment at a gain of 1 V/V. Refer to Figure 24 in Typical Performance Characteristics VS = ±2.5 V for measurement results. 200: RF RS 50: VS 200: RG + VIN - a RS 50: 50: 67: RIN RG + VCM LMH6554 VOUT + RL=100: - 200: 67: VEN 50: RF 200: Figure 30. Differential S-Parameter Test Circuit 16 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 LMH6554 www.ti.com SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 9.2.3 Single Supply Operation Single 5V supply operation is possible: however, as discussed earlier, AC input coupling is recommended due to input common mode limitations. An example of an AC coupled, single supply, single-to-differential circuit is shown in Figure 31. Note that when AC coupling, both inputs need to be AC coupled irrespective of single-todifferential or differential-differential configuration. For higher supply voltages DC coupling of the inputs may be possible provided that the output common mode DC level is set high enough so that the amplifier's inputs and outputs are within their specified operation ranges. RF RO 0.1 PF RG RS + VS a RT VCM LMH6554 CL RL VO RG RM 0.1 PF RO RF VEN Figure 31. AC Coupled for Single Supply Operation For optimum performance, split supply operation is recommended using +2.5-V and −2.5-V supplies; however, operation is possible on split supplies as low as +2.35 V and −2.35 V and as high as +2.65 V and −2.65 V. Provided the total supply voltage does not exceed the 4.7-V to 5.3-V operating specification, non-symmetric supply operation is also possible and in some cases advantageous. For example, if a 5-V DC coupled operation is required for low power dissipation but the amplifier input common mode range prevents this operation, it is still possible with split supplies of (V+) and (V-). Where (V+)-(V-) = 5 V and V+ and V- are selected to center the amplifier input common mode range to suit the application. Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 17 LMH6554 SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 www.ti.com 9.2.4 Driving Analog-to-Digital Converters Analog-to-digital converters present challenging load conditions. They typically have high impedance inputs with large and often variable capacitive components. Figure 32 shows the LMH6554 driving an ultra-high-speed Gigasample ADC the ADC10D1500. The LMH6554 common mode voltage is set by the ADC10D1500. The circuit in Figure 32 has a 2nd order bandpass LC filter across the differential inputs of the ADC10D1500. The ADC10D1500 is a dual channel 10–bit ADC with maximum sampling rate of 3 GSPS when operating in a single channel mode and 1.5 GSPS in dual channel mode. 200: 91: RS = 50: VS C a V 76.8: AC-Coupled Source 0.1 PF + 50: VCM Up To 16-Bit Data Converter LMH6554 - + 91: 50: - 30: 0.1 PF ADC + - VCMO V 0.1 PF 200: VEN Figure 32. Driving a 10-bit Gigasample ADC Figure 33 shows the SFDR and SNR performance vs. frequency for the LMH6554 and ADC10D1500 combination circuit with the ADC input signal level at −1dBFS. In order to properly match the input impedance seen at the LMH6554 amplifier inputs, RM is chosen to match ZS || RT for proper input balance. The amplifier is configured to provide a gain of 2 V/V in single to differential mode. An external bandpass filter is inserted in series between the input signal source and the amplifier to reduce harmonics and noise from the signal generator. 90 85 80 75 SFDR (dBm) (dB) 70 65 60 55 50 SNR (dBFs) 45 40 0 100 200 300 400 500 600 700 750 INPUT FREQUENCY (MHz) Figure 33. LMH6554 / ADC10D1500 SFDR and SNR Performance vs. Frequency The amplifier and ADC should be located as close together as possible. Both devices require that the filter components be in close proximity to them. The amplifier needs to have minimal parasitic loading on it's outputs and the ADC is sensitive to high frequency noise that may couple in on its inputs. Some high performance ADCs have an input stage that has a bandwidth of several times its sample rate. The sampling process results in all input signals presented to the input stage mixing down into the first Nyquist zone (DC to Fs/2). 18 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 LMH6554 www.ti.com SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 9.2.5 Output Noise Performance and Measurement Unlike differential amplifiers based on voltage feedback architectures, noise sources internal to the LMH6554 refer to the inputs largely as current sources, hence the low input referred voltage noise and relatively higher input referred current noise. The output noise is therefore more strongly coupled to the value of the feedback resistor and not to the closed loop gain, as would be the case with a voltage feedback differential amplifier. This allows operation of the LMH6554 at much higher gain without incurring a substantial noise performance penalty, simply by choosing a suitable feedback resistor. Figure 34 shows a circuit configuration used to measure noise figure for the LMH6554 in a 50-Ω system. A feedback resistor value of 200Ω is chosen for the UQFN package to minimize output noise while simultaneously allowing both high gain (7 V/V) and proper 50-Ω input termination. Refer to Single-Ended Input to Differential Output Operation for the calculation of resistor and gain values. 200: V RS = 50: VS + 1 PF 2:1 (TURNS) 8: VCM a + - + 50: 50: VO LMH6554 8: 1 PF V - 200: AV = 7 V/V Figure 34. Noise Figure Circuit Configuration 9.2.6 Balanced Cable Driver With up to 5.68 VPP differential output voltage swing the LMH6554 can be configured as a cable driver. The LMH6554 is also suitable for driving differential cables from a single ended source as shown in Figure 35. 200: 50: 91: RS = 50: + VS a Input Source 76.8: VCM 2 VPP LMH6554 91: VEN 30.3: 200: 50: 100: TWISTED PAIR Figure 35. Fully Differential Cable Driver Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 19 LMH6554 SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 www.ti.com 10 Power Supply Recommendations The LMH6554 can be used with any combination of positive and negative power supplies as long as the combined supply voltage is between 4.7 V and 5.25 V. The LMH6554 will provide best performance when the output voltage is set at the mid supply voltage, and when the total supply voltage is set to 5 V. Power supply bypassing as shown in Power Supply Bypassing is important and power supply regulation should be within 5% or better. 10.1 Power Supply Bypassing The LMH6554 requires supply bypassing capacitors as shown in Figure 36 and Figure 37. The 0.01-μF and 0.1μF capacitors should be leadless SMT ceramic capacitors and should be no more than 3 mm from the supply pins. These capacitors should be star routed with a dedicated ground return plane or trace for best harmonic distortion performance. Thin traces or small vias will reduce the effectiveness of bypass capacitors. Also shown in both figures is a capacitor from the VCM and VEN pins to ground. These inputs are high impedance and can provide a coupling path into the amplifier for external noise sources, possibly resulting in loss of dynamic range, degraded CMRR, degraded balance and higher distortion. + V 0.1 PF 10 PF 0.01 PF VCM +IN + -IN - -OUT LMH6554 +OUT VEN 0.1 PF 0.1 PF - V 0.1 PF 10 PF 0.01 PF Figure 36. Split Supply Bypassing Capacitors V + 0.01 PF 0.1 PF 10 PF +IN VCM + -OUT LMH6554 -IN 0.1 PF +OUT VEN 0.01 PF Figure 37. Single Supply Bypassing Capacitors 20 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 LMH6554 www.ti.com SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 11 Layout 11.1 Layout Guidelines The LMH6554 is a high speed, high performance amplifier. In order to get maximum benefit from the differential circuit architecture board layout and component selection is very critical. The circuit board should have a low inductance ground plane and well bypassed broad supply lines. External components should be leadless surface mount types. The feedback network and output matching resistors should be composed of short traces and precision resistors (0.1%). The output matching resistors should be placed within 3 or 4 mm of the amplifier as should the supply bypass capacitors. Refer to Power Supply Bypassing for recommendations on bypass circuit layout. Evaluation boards are available through the product folder on ti.com. By design, the LMH6554 is relatively insensitive to parasitic capacitance at its inputs. Nonetheless, ground and power plane metal should be removed from beneath the amplifier and from beneath RF and RG for best performance at high frequency. With any differential signal path, symmetry is very important. Even small amounts of asymmetry can contribute to distortion and balance errors. 11.2 Layout Example Figure 38. Layout Schematic Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 21 LMH6554 SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 www.ti.com 11.3 Power Dissipation The LMH6554 is optimized for maximum speed and performance in a small form factor 14 lead UQFN package. To ensure maximum output drive and highest performance, thermal shutdown is not provided. Therefore, it is of utmost importance to make sure that the TJMAX is never exceeded due to the overall power dissipation. Follow these steps to determine the maximum power dissipation for the LMH6554: 1. Calculate the quiescent (no-load) power: PAMP = ICC * (VS) where VS = V+ − V-. (Be sure to include any current through the feedback network if VCM is not mid-rail) • (1) 2. Calculate the RMS power dissipated in each of the output stages: PD (rms) = rms ((VS − V+OUT) * I+OUT) + rms ((VS − V-OUT) * I-OUT) where • • • VOUT and IOUT are the voltage the current measured at the output pins of the differential amplifier as if they were single ended amplifiers VS is the total supply voltage (2) 3. Calculate the total RMS power: PT = PAMP + PD (3) The maximum power that the LMH6554 package can dissipate at a given temperature can be derived with the following equation: PMAX = (150° − TAMB)/ θJA where • • • TAMB = Ambient temperature (°C) θJA = Thermal resistance, from junction to ambient, for a given package (°C/W) For the 14 lead UQFN package, θJA is 60°C/W (4) NOTE If VCM is not 0V then there will be quiescent current flowing in the feedback network. This current should be included in the thermal calculations and added into the quiescent power dissipation of the amplifier. 11.4 ESD Protection The LMH6554 is protected against electrostatic discharge (ESD) on all pins. The LMH6554 can survive 2000 V Human Body model and 250 V Machine model events. Under normal operation the ESD diodes have no affect on circuit performance. There are occasions, however, when the ESD diodes will be evident. If the LMH6554 is driven by a large signal while the device is powered down the ESD diodes will conduct. The current that flows through the ESD diodes will either exit the chip through the supply pins or will flow through the device, hence it is possible to power up a chip with a large signal applied to the input pins. Using the shutdown mode is one way to conserve power and still prevent unexpected operation. 22 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 LMH6554 www.ti.com SNOSB30P – OCTOBER 2008 – REVISED JANUARY 2015 12 Device and Documentation Support 12.1 Device Support 12.1.1 Third-Party Products Disclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE. 12.2 Documentation Support 12.2.1 Related Documentation See LMH6554 Product Folder for evaluation board availability and ordering information. 12.3 Trademarks All trademarks are the property of their respective owners. 12.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LMH6554 23 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LMH6554LE/NOPB ACTIVE UQFN NHJ 14 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 AJA LMH6554LEE/NOPB ACTIVE UQFN NHJ 14 250 RoHS & Green SN Level-3-260C-168 HR -40 to 125 AJA LMH6554LEX/NOPB ACTIVE UQFN NHJ 14 4500 RoHS & Green SN Level-3-260C-168 HR -40 to 125 AJA (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of