LMH6628MA

LMH6628 www.ti.com SNOSA02D – MAY 2002 – REVISED MARCH 2013 LMH6628 Dual Wideband, Low Noise, Voltage Feedback Op Amp Check for Samples: LMH6628 FEATURES DESCRIPTION • • • • • • • The Texas Instruments LMH6628 is a high speed dual op amp that offers a traditional voltage feedback topology featuring unity gain stability and slew enhanced circuitry. The LMH6628's low noise and very low harmonic distortion combine to form a wide dynamic range op amp that operates from a single (5V to 12V) or dual (±5V) power supply. 1 23 Wide Unity Gain Bandwidth: 300MHz Low Noise: 2nV/√hZ Low Distortion: −65/−74dBc (10MHz) Settling Time: 12ns to 0.1% Wide Supply Voltage Range: ±2.5V to ±6V High Output Current: ±85mA Improved Replacement for CLC428 APPLICATIONS • • • • • • High Speed Dual Op Amp Low Noise Integrators Low Noise Active Filters Driver/receiver for Transmission Systems High Speed Detectors I/Q Channel Amplifiers Each of the LMH6628's closely matched channels provides a 300MHz unity gain bandwidth and low input voltage noise density (2nV/√hZ). Low 2nd/3rd harmonic distortion (−65/−74dBc at 10MHz) make the LMH6628 a perfect wide dynamic range amplifier for matched I/Q channels. With its fast and accurate settling (12ns to 0.1%), the LMH6628 is also an excellent choice for wide dynamic range, anti-aliasing filters to buffer the inputs of hi resolution analog-to-digital converters. Combining the LMH6628's two tightly matched amplifiers in a single 8-pin SOIC package reduces cost and board space for many composite amplifier applications such as active filters, differential line drivers/receivers, fast peak detectors and instrumentation amplifiers. The LMH6628 is fabricated using TI’s VIP10™ complimentary bipolar process. To reduce design times and assist in board layout, the LMH6628 is supported by an evaluation board (CLC730036). Connection Diagram Figure 1. 8-Pin SOIC, Top View 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. VIP10 is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2002–2013, Texas Instruments Incorporated LMH6628 SNOSA02D – MAY 2002 – REVISED MARCH 2013 www.ti.com Figure 2. Inverting Frequency Response These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Human Body Model ESD Tolerance (3) 2kV Machine Model 200V Supply Voltage 13.5 See (4) Short Circuit Current Common-Mode Input Voltage V+ - V− Differential Input Voltage V+ - V− Maximum Junction Temperature +150°C −65°C to +150°C Storage Temperature Range Lead Temperature (soldering 10 sec) (1) (2) (3) (4) +300°C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see the Electrical Characteristics tables. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Human body model, 1.5kΩ in series with 100pF. Machine model, 0Ω In series with 200pF. Output is short circuit protected to ground, however maximum reliability is obtained if output current does not exceed 160mA. Operating Ratings (1) Thermal Resistance (2) Package (θJC) (θJA) SOIC 65°C/W 145°C/W −40°C to +85°C Temperature Range Nominal Supply Voltage (1) (2) 2 ±2.5V to ±6V Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see the Electrical Characteristics tables. The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX)-TA)/ θJA. All numbers apply for packages soldered directly onto a PC board. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6628 LMH6628 www.ti.com SNOSA02D – MAY 2002 – REVISED MARCH 2013 Electrical Characteristics (1) VCC = ±5V, AV = +2V/V, RF = 100Ω, RG = 100Ω, RL = 100Ω; unless otherwise specified. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response GB Gain Bandwidth Product VO < 0.5VPP SSBW -3dB Bandwidth, AV = +1 VO < 0.5VPP SSBW -3dB Bandwidth, AV = +2 VO < 0.5VPP GFL Gain Flatness VO< 0.5VPP GFP Peaking GFR Rolloff LPD Linear Phase Deviation 200 MHz 300 MHz 100 MHz DC to 200MHz 0.0 dB DC to 20MHz .1 dB DC to 20MHz .1 deg 180 Time Domain Response TR Rise and Fall Time 1V Step 4 ns TS Settling Time 2V Step to 0.1% 12 ns OS Overshoot 1V Step SR Slew Rate 4V Step 300 1 % 550 V/µs Distortion And Noise Response HD2 2nd Harmonic Distortion 1VPP, 10MHz −65 dBc HD3 3rd Harmonic Distortion 1VPP, 10MHz −74 dBc 2 nV/√Hz Equivalent Input Noise VN IN XTLKA Voltage 1MHz to 100MHz Current 1MHz to 100MHz Crosstalk Input Referred, 10MHz 2 pA/√Hz −62 dB 63 dB Static, DC Performance GOL Open-Loop Gain VIO Input Offset Voltage DVIO IBN DIBN IOS 56 53 ±.5 Average Drift 5 Input Bias Current ±.7 Average Drift 150 Input Offset Current IOSD 0.3 Average Drift ±2 ±2.6 mV µV/°C ±20 ±30 µA nA/°C ±6 µA 5 nA/°C PSRR Power Supply Rejection Ratio 60 46 70 dB CMRR Common-Mode Rejection Ratio 57 54 62 dB ICC Supply Current 7.5 7.0 9 Per Channel, RL = ∞ 12 12.5 mA Miscellaneous Performance RIN Input Resistance CIN Input Capacitance ROUT (1) Output Resistance Common-Mode 500 kΩ Differential-Mode 200 kΩ Common-Mode 1.5 pF Differential-Mode 1.5 pF Closed-Loop .1 Ω Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA. See Note 6 for information on temperature de-rating of this device." Min/Max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6628 3 LMH6628 SNOSA02D – MAY 2002 – REVISED MARCH 2013 www.ti.com Electrical Characteristics(1) (continued) VCC = ±5V, AV = +2V/V, RF = 100Ω, RG = 100Ω, RL = 100Ω; unless otherwise specified. Boldface limits apply at the temperature extremes. Symbol VO Parameter Output Voltage Range VOL RL = 100Ω CMIR Input Voltage Range IO Output Current 4 Conditions Min RL = ∞ ±3.2 ±3.1 Common- Mode ±50 Submit Documentation Feedback Typ Max Units ±3.8 V ±3.5 V ±3.7 V ±85 mA Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6628 LMH6628 www.ti.com SNOSA02D – MAY 2002 – REVISED MARCH 2013 Typical Performance Characteristics (TA = +25°, AV = +2, VCC = ±5V, Rf =100Ω, RL = 100Ω, unless specified) Non-Inverting Frequency Response Inverting Frequency Response Figure 3. Figure 4. Frequency Response vs. Load Resistance Frequency Response vs. Output Amplitude Figure 5. Figure 6. Frequency Response vs. Capacitive Load Gain Flatness & Linear Phase Figure 7. Figure 8. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6628 5 LMH6628 SNOSA02D – MAY 2002 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) (TA = +25°, AV = +2, VCC = ±5V, Rf =100Ω, RL = 100Ω, unless specified) 6 Channel Matching Channel to Channel Crosstalk Figure 9. Figure 10. Pulse Response (VO = 2V) Pulse Response (VO = 100mV) Figure 11. Figure 12. 2nd Harmonic Distortion vs. Output Voltage 3rd Harmonic Distortion vs. Output Voltage Figure 13. Figure 14. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6628 LMH6628 www.ti.com SNOSA02D – MAY 2002 – REVISED MARCH 2013 Typical Performance Characteristics (continued) (TA = +25°, AV = +2, VCC = ±5V, Rf =100Ω, RL = 100Ω, unless specified) 2nd & 3rd Harmonic Distortion vs. Frequency PSRR and CMRR (±5V) Figure 15. Figure 16. PSRR and CMRR (±2.5V) Closed Loop Output Resistance (±2.5V) Figure 17. Figure 18. Closed Loop Output Resistance (±5V) Open Loop Gain & Phase (±2.5V) Figure 19. Figure 20. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6628 7 LMH6628 SNOSA02D – MAY 2002 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) (TA = +25°, AV = +2, VCC = ±5V, Rf =100Ω, RL = 100Ω, unless specified) Open Loop Gain & Phase (±5V) Recommended RS vs. CL Figure 21. Figure 22. DC Errors vs. Temperature Maximum VO vs. RL 0.5 0.2 0.2 VIO 0 0.1 -0.2 0 -0.4 IBN -0.1 -0.2 -0.3 -40 -0.6 IBI IBN, IBI (PA) 0.4 0.3 MAXIMUM VO (VOLTS) 0.6 0.4 VIO (mV) 4 0.8 VS = ±5V 3.5 3 -0.8 0 40 80 120 -1 160 2.5 TEMPERATURE (°) Figure 23. 8 25 125 75 50 100 LOAD RESISTANCE (:) 150 Figure 24. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6628 LMH6628 www.ti.com SNOSA02D – MAY 2002 – REVISED MARCH 2013 Typical Performance Characteristics (continued) (TA = +25°, AV = +2, VCC = ±5V, Rf =100Ω, RL = 100Ω, unless specified) Voltage & Current Noise vs. Frequency 2-Tone, 3rd Order Intermodulation Intercept 1000 40 30 20 1000 100 100 CURRENT NOISE 10 10 VOLTAGE NOISE 10 1 1 100 10 1 10 FREQUENCY (MHz) 100 1k 10k 100k 1M CURRENT NOISE (pA/ Hz) VOLTAGE NOISE (nV/ Hz) INTERCEPT POINT (+dBm) 50 1 10M FREQUENCY (Hz) Figure 25. Figure 26. Settling Time vs. Accuracy 1 SETTLING ACCURACY (%) VO = 2VPP 0.1 0.01 5 10 15 20 25 30 35 TIME (ns) Figure 27. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6628 9 LMH6628 SNOSA02D – MAY 2002 – REVISED MARCH 2013 www.ti.com APPLICATION SECTION LOW NOISE DESIGN Ultimate low noise performance from circuit designs using the LMH6628 requires the proper selection of external resistors. By selecting appropriate low valued resistors for RF and RG, amplifier circuits using the LMH6628 can achieve output noise that is approximately the equivalent voltage input noise of 2nV/ multiplied by the desired gain (AV). DC BIAS CURRENTS AND OFFSET VOLTAGES Cancellation of the output offset voltage due to input bias currents is possible with the LMH6628. This is done by making the resistance seen from the inverting and non-inverting inputs equal. Once done, the residual output offset voltage will be the input offset voltage (VOS) multiplied by the desired gain (AV). Application Note OA-7 (SNOA365) offers several solutions to further reduce the output offset. OUTPUT AND SUPPLY CONSIDERATIONS With ±5V supplies, the LMH6628 is capable of a typical output swing of ±3.8V under a no-load condition. Additional output swing is possible with slightly higher supply voltages. For loads of less than 50Ω, the output swing will be limited by the LMH6628's output current capability, typically 85mA. Output settling time when driving capacitive loads can be improved by the use of a series output resistor. See Figure 22. LAYOUT Proper power supply bypassing is critical to insure good high frequency performance and low noise. De-coupling capacitors of 0.1μF should be placed as close as possible to the power supply pins. The use of surface mounted capacitors is recommended due to their low series inductance. A good high frequency layout will keep power supply and ground traces away from the inverting input and output pins. Parasitic capacitance from these nodes to ground causes frequency response peaking and possible circuit oscillation. See OA-15 (SNOA367) for more information. Texas Instruments suggests the CLC730036 (SOIC) dual op amp evaluation board as a guide for high frequency layout and as an aid in device evaluation. ANALOG DELAY CIRCUIT (ALL-PASS NETWORK) The circuit in Figure 28 implements an all-pass network using the LMH6628. A wide bandwidth buffer (LM7121) drives the circuit and provides a high input impedance for the source. As shown in Figure 29, the circuit provides a 13.1ns delay (with R = 40.2Ω, C = 47pF). RF and RG should be of equal and low value for parasitic insensitive operation. 499: 499: VIN + 499: LM7121 - - ½ LMH6628 499: - ½ LMH6628 + Rf VOUT + C R C R Figure 28. Circuit That Implements an All-pass Network Using the LMH6628 10 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6628 LMH6628 www.ti.com SNOSA02D – MAY 2002 – REVISED MARCH 2013 VIN, VOUT (100mV/DIV) VIN VOUT TIME (10 ns/DIV) Figure 29. Delay Circuit Response to 0.5V Pulse The circuit gain is +1 and the delay is determined by the following equations. (1) Td 1 dI ; (2) 360 df where Td is the delay of the op amp at AV = +1. The LMH6628 provides a typical delay of 2.8ns at its −3dB point. FULL DUPLEX DIGITAL OR ANALOG TRANSMISSION Simultaneous transmission and reception of analog or digital signals over a single coaxial cable or twisted-pair line can reduce cabling requirements. The LMH6628's wide bandwidth and high common-mode rejection in a differential amplifier configuration allows full duplex transmission of video, telephone, control and audio signals. In the circuit shown in Figure 30, one of the LMH6628's amps is used as a "driver" and the other as a difference "receiver" amplifier. The output impedance of the "driver" is essentially zero. The two R's are chosen to match the characteristic impedance of the transmission line. The "driver" op amp gain can be selected for unity or greater. Receiver amplifier A2 (B2) is connected across R and forms differential amplifier for the signals transmitted by driver A2 (B2). If RF equals RG, receiver A2 (B1) will then reject the signals from driver A1 (B1) and pass the signals from driver B1 (A1). Vin Rin R Rg + - R Rf + A2 Rin Rg Rf Vout Vin B1 Coax Cable + - Vout + B2 Figure 30. Full Duplex Transmit and Receive Using the LMH6628 The output of the receiver amplifier will be: (3) Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6628 11 LMH6628 SNOSA02D – MAY 2002 – REVISED MARCH 2013 www.ti.com Care must be given to layout and component placement to maintain a high frequency common-mode rejection. The plot of Figure 31 shows the simultaneous reception of signals transmitted at 1MHz and 10MHz. Figure 31. Simultaneous Reception of Signals Transmitted at 1MHz and 10MHz POSITIVE PEAK DETECTOR The LMH6628's dual amplifiers can be used to implement a unity-gain peak detector circuit as shown in Figure 32. Figure 32. LMH6628's Dual Amplifiers Used to Implement a Unity-Gain Peak Detector Circuit The acquisition speed of this circuit is limited by the dynamic resistance of the diode when charging Chold. A plot of the circuit's performance is shown in Figure 33 with a 1MHz sinusoidal input. Figure 33. Circuit's Performance With a 1MHz Sinusoidal Input 12 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6628 LMH6628 www.ti.com SNOSA02D – MAY 2002 – REVISED MARCH 2013 A current source, built around Q1, provides the necessary bias current for the second amplifier and prevents saturation when power is applied. The resistor, R, closes the loop while diode D2 prevents negative saturation when VIN is less than VC. A MOS-type switch (not shown) can be used to reset the capacitor's voltage. The maximum speed of detection is limited by the delay of the op amps and the diodes. The use of Schottky diodes will provide faster response. ADJUSTABLE OR BANDPASS EQUALIZER A "boost" equalizer can be made with the LMH6628 by summing a bandpass response with the input signal, as shown in Figure 34. Figure 34. "Boost" Equalizer Made With the LMH6628 by Summing a Bandpass Response With the Input Signal The overall transfer function is shown in Equation 4. (4) To build a boost circuit, use the design equations Equation 5 and Equation 6. (5) (6) Select R2 and C using Equation 5. Use reasonable values for high frequency circuits - R2 between 10Ω and 5kΩ, C between 10pF and 2000pF. Use Equation 6 to determine the parallel combination of Ra and Rb. Select Ra and Rb by either the 10Ω to 5kΩ criteria or by other requirements based on the impedance Vin is capable of driving. Finish the design by determining the value of K from Equation 7. (7) Figure 35 shows an example of the response of the circuit of Figure 34, where fo is 2.3MHz. The component values are as follows: Ra=2.1kΩ, Rb = 68.5Ω, R2 = 4.22kΩ, R = 500Ω, KR = 50Ω, C = 120pF. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6628 13 LMH6628 SNOSA02D – MAY 2002 – REVISED MARCH 2013 www.ti.com Figure 35. Example of Response of Circuit of Figure 34, Where fo is 2.3MHz 14 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6628 LMH6628 www.ti.com SNOSA02D – MAY 2002 – REVISED MARCH 2013 REVISION HISTORY Changes from Revision C (March 2013) to Revision D • Page Changed layout of National Data Sheet to TI format .......................................................................................................... 14 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMH6628 15 PACKAGE OPTION ADDENDUM www.ti.com 30-Sep-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LMH6628MA NRND SOIC D 8 95 Non-RoHS & Green Call TI Level-1-235C-UNLIM -40 to 85 LMH66 28MA LMH6628MA/NOPB ACTIVE SOIC D 8 95 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 LMH66 28MA LMH6628MAX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 LMH66 28MA (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of