Sample &
Buy
Product
Folder
Support &
Community
Tools &
Software
Technical
Documents
LMH6672
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
LMH6672 Dual, High Output Current, High Speed Op Amp
1 Features
2 Applications
•
•
•
•
1
•
•
•
•
•
•
•
•
High Output Drive
–
19.2 VPP Differential Output Voltage,
RL = 50 Ω
–
9.6 VPP Single-ended Output Voltage,
RL = 25 Ω
High Output Current
–
±200 mA @ VO = 9 VPP, VS = 12 V
Low Distortion
–
105 dB SFDR @ 100 kHz, VO = 8.4 VPP,
RL = 25Ω
–
98 dB SFDR @ 1MHz, VO = 2 VPP,
RL = 100 Ω
High Speed
–
90 MHz 3 dB Bandwidth (G = 2)
–
135 V/µs Slew Rate
Low Noise
–
3.1 nV/√Hz: Input Noise Voltage
–
1.8 pA/√Hz: Input Noise Current
Low Supply Current: 7.2mA/amp
Single-supply Operation: 5 V to 12 V
Stable for Gain of +2V/V or Higher
Available in 8-pin SOIC and SO PowerPAD (DDA)
ADSL PCI Modem Cards
xDSL External Modems
Line Drivers
3 Description
The LMH6672 is a low cost, dual high speed op amp
capable of driving signals to within 1 V of the power
supply rails. It features the high output drive with low
distortion required for the demanding application of a
single supply xDSL line driver.
When connected as a differential output driver, the
LMH6672 can drive a 50-Ω load to 16.8 VPP swing
with only −98 dBc distortion, fully supporting the peak
upstream power levels for upstream full-rate ADSL.
The LMH6672 is fully specified for operation with 5-V
and 12-V supplies. Ideal for PCI modem cards and
xDSL modems.
Device Information(1)
PART NUMBER
LMH6672
PACKAGE
SOIC (8)
BODY SIZE (NOM)
4.89 mm × 3.90 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Typical Application
+
+
1/2
LMH6672
RO
12.5
Rf1
1:N
VIN
(VPP)
AV . VIN
Rg
RL = 100:
VOUT
(1.2)
Rf2
Note: Supply and Bypassing not shown.
RO
12.5
-
1/2
LMH6672
+
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LMH6672
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
4
4
4
4
5
Absolute Maximum Ratings ......................................
Handling Ratings.......................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
6.6 ±2.5V Electrical Characteristics ................................ 6
6.7 Typical Performance Characteristics ........................ 7
7
Detailed Description ............................................ 15
8
Power Supply Recommendations...................... 16
9
Device and Documentation Support.................. 18
7.1 Functional Block Diagram ....................................... 15
8.1 Thermal Management ............................................. 16
9.1 Trademarks ............................................................. 18
9.2 Electrostatic Discharge Caution .............................. 18
9.3 Glossary .................................................................. 18
10 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (March 2013) to Revision H
Page
•
Changed data sheet flow and layout to conform with new TI standards. Added the following sections: Device
Information Table, Application and Implementation; Device and Documentation Support; Mechanical, Packaging,
and Ordering Information ....................................................................................................................................................... 1
•
Added "Stable for Gain of +2V/V or Higher" in Features ....................................................................................................... 1
•
Changed from "Junction Temperature Range" to "Operating Temperature Range" in Recommended Operating
Conditions............................................................................................................................................................................... 4
•
Deleted TJ = 25°C in Electrical Characteristics ...................................................................................................................... 5
•
Deleted TJ = 25°C and "Slew Rate" in ±2.5V Electrical Characteristics................................................................................. 6
•
Added condition "Av = + 2V/V" in Typical Performance Characteristics ................................................................................ 7
•
Added "Vs= +/-2.5V" and "Vs=+/-6V" as curve labels for Figure 36 .................................................................................... 11
•
Changed curve label from 31 MHz to 13 MHz. Changed title from +5V to +5V/V in Figure 37........................................... 12
•
Changed "10V" to + "10V/V" in caption title for Figure 38.................................................................................................... 12
•
Added "Vs = 12V" to Figure 39 caption title ......................................................................................................................... 13
•
Added "Vs = 5V" to Figure 40 caption title ........................................................................................................................... 13
•
Changed from "40 = 346 mW" to "40 mW lower or 346 mW" in Thermal Management...................................................... 17
•
Changed from 41 mW to 17 mW.......................................................................................................................................... 17
•
Added "from ambient"........................................................................................................................................................... 17
•
Changed sentence beginning with "Using the same PDRIVER as above..." ........................................................................... 17
•
Added caution note............................................................................................................................................................... 17
Changes from Revision F (March 2013) to Revision G
•
2
Page
Changed layout of National Data Sheet to TI format ........................................................................................................... 17
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
LMH6672
www.ti.com
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
5 Pin Configuration and Functions
8-Pin
SOIC (D) / SO PowerPAD (DDA)
(Top View)
1
8
OUT A
+
V
A
-
2
+
7
-IN A
+IN A
3
6
B
+
-
V
OUT B
-IN B
-
4
5
+IN B
Pin Functions
PIN
I/O
DESCRIPTION
NUMBER
NAME
1
OUT A
O
ChA Output
2
-IN A
I
ChA Inverting Input
3
+IN A
I
ChA Non-inverting Input
4
V-
I
Negative Supply
5
+IN B
I
ChB Non-inverting Input
6
-IN B
I
ChB Inverting Input
7
OUT B
O
ChB Output
I
Positive Supply
8
+
V
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
3
LMH6672
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
VIN Differential
Output Short Circuit Duration
See
V
13.2
V
V+ +0.8
V− −0.8
Voltage at Input/Output pins
Junction Temperature
V
+150
Soldering Information
(2)
(3)
UNIT
±1.2
(2)
Supply Voltage (V+ − V−)
(1)
MAX
(3)
°C
Infrared or Convection (20 sec)
235
°C
Wave Soldering (10 sec)
260
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Shorting the output to either supply or ground will exceed the absolute maximum TJ and can result in failure.
The maximum power dissipation is a function of TJ(MAX), RθJA and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX) − TA)/RθJA. All numbers apply for packages soldered directly onto a PC board.
6.2 Handling Ratings
Tstg
Storage temperature range
V(ESD)
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
(2)
Electrostatic discharge (1) pins
Machine Model (MM)l (3)
(1)
(2)
(3)
MIN
MAX
UNIT
−65
+150
°C
2
2000
V
200
Human body model, 1.5 kΩ in series with 100 pF. Machine model, 200 Ω in series with 100 pF.
JEDEC document JEP155 states that 2000-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 200-V MM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
Supply Voltage (V - V )
±2.5
±6.5
V
Operating Temperature Range
−40
150
°C
+
−
UNIT
6.4 Thermal Information
THERMAL METRIC (1)
RθJA
(1)
4
Junction-to-ambient thermal resistance
SOIC
Package D
SO PowerPAD
Package DDA
8 PINS
8 PINS
172
58.6
UNIT
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
LMH6672
www.ti.com
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
6.5 Electrical Characteristics
Unless otherwise specified, all limits are ensured for G = +2, VS = ±2.5 to ±6V, RF = RIN = 470Ω, RL = 100Ω.
PARAMETER
TEST CONDITIONS
MIN (1)
TYP (2)
MAX (1)
UNIT
DYNAMIC PERFORMANCE
−3dB Bandwidth
90
MHz
12
MHz
VS = ±6V, 4V Step, 10-90%
135
V/μs
VS = 6V, 4V Step, 10-90%
23.5
ns
−105
dBc
VO = 8.4 VPP, f = 1 MHz, RL = 100Ω
−90
dBc
VO = 8.4 VPP, f = 100 kHz, RL = 25Ω
−110
dBc
VO = 8.4 VPP, f = 1 MHz, RL = 100Ω
−87
dBc
0.1dB Bandwidth
VS = ±6V
Slew Rate
Rise and Fall Time
DISTORTION and NOISE RESPONSE
2nd Harmonic Distortion
3rd Harmonic Distortion
VO = 8.4 VPP, f = 100 kHz, RL = 25Ω
Input Noise Voltage
f = 100 kHz
3.1
nV√Hz
Input Noise Current
f = 100 kHz
1.8
pA/√Hz
INPUT CHARACTERISTICS
VOS
Input Offset Voltage
TJ = −40°C to 125°C
−5.5
0.1
5.5
−4
−0.2
4
IB
Input Bias Current
TJ = −40°C to 125°C
IOS
Input Offset Current
TJ = −40°C to 125°C
−2.1
CMVR
Common Voltage Range
VS = ±6V
CMRR
Common-Mode Rejection Ratio
VS = ±6V, TJ = −40°C to 125°C
mV
8
16
µA
0
2.1
µA
−6.0 −5.7 to 4.5
4.5
150
V
7.5
µV/V
V/mV
TRANSFER CHARACTERISTICS
AVOL
VO
Voltage Gain
Output Swing
VO
Output Swing
Output Current (3)
ISC
RL = 1k, TJ = −40°C to 125°C
1.0
5
RL = 25Ω, TJ = −40°C to 125°C
0.67
3.4
RL = 25Ω, VS = ±6V
−4.5
±4.8
4.5
RL = 25Ω, TJ = −40°C to 125°C,
VS = ±6V
−4.4
±4.8
4.4
RL = 1k, VS = ±6V
−4.8
±4.8
4.8
RL = 1k, TJ = −40°C to 125°C,
VS = ±6V
−4.7
±4.8
4.7
VO = 0, VS = ±6V
350
525
VO = 0, VS = ±6V,
TJ = −40°C to 125°C
260
600
V/mV
V
V
mA
mA
POWER SUPPLY
IS
Supply Current/Amp
VS = ±6V
8
VS = ±6V, TJ = −40°C to 125°C
PSRR
(1)
(2)
(3)
Power Supply Rejection Ratio
VS = ±2.5V to ±6V,
TJ = −40°C to 125°C
7.2
72
9
88.5
mA
dB
All limits are specified by testing, characterization or statistical analysis.
Typical values represent the most likely parametric norm.
Shorting the output to either supply or ground will exceed the absolute maximum TJ and can result in failure.
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
5
LMH6672
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
www.ti.com
6.6 ±2.5V Electrical Characteristics
Unless otherwise specified, all limits are ensured for G = +2, VS = ±2.5 to ±6V, RF = RIN = 470Ω, RL = 100Ω.
PARAMETER
TEST CONDITIONS
MIN (1)
TYP (2)
MAX (1)
UNIT
DYNAMIC PERFORMANCE
−3 dB Bandwidth
80
MHz
0.1 dB Bandwidth
12
MHz
14
ns
VO = 2 VPP, f = 100 kHz, RL = 25Ω
−96
dBc
VO = 2 VPP, f = 1 MHz, RL = 100Ω
−85
dBc
VO = 2 VPP, f = 100 kHz, RL = 25Ω
−98
dBc
VO = 2 VPP, f = 1 MHz, RL = 100Ω
−87
dBc
Rise and Fall Time
2V Step, 10-90%
DISTORTION and NOISE RESPONSE
2nd Harmonic Distortion
rd
3 Harmonic Distortion
INPUT CHARACTERISTICS
VOS
Input Offset Voltage
TJ = −40°C to 125°C
−5.5
−4.0
IB
Input Bias Current
CMVR
Common-Mode Voltage Range
CMRR
Common-Mode Rejection Ratio
TJ = −40°C to 125°C
5.5
0.02
8.0
−2.5
TJ = −40°C to 125°C
150
8
RL = 25Ω, TJ = −40°C to 125°C
0.67
3
1.0
4
RL = 25Ω
1.20
1.45
RL = 25Ω, TJ = −40°C to 125°C
1.10
1.35
RL = 1k
1.30
1.60
RL = 1k, TJ = −40°C to 125°C
1.25
1.50
4.0
mV
16
µA
1.0
V
µV/V
TRANSFER CHARACTERISTICS
AVOL
Voltage Gain
RL = 1k, TJ = −40°C to 125°C
V/mV
OUTPUT CHARACTERISTICS
VO
Output Voltage Swing
V
POWER SUPPLY
IS
Supply Current/Amp
8.0
TJ = −40°C to 125°C
(1)
(2)
6
6.7
9.0
mA
All limits are specified by testing, characterization or statistical analysis.
Typical values represent the most likely parametric norm.
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
LMH6672
www.ti.com
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
6.7 Typical Performance Characteristics
Av = + 2V/V
1.2
14
-40°C
1k:
12
1.0
VSUPPLY - VOUT (V)
SWING (V)
10
25:
8
6
4
0.8
85°C
25°C
0.6
0.4
0.2
2
0
0
0
2
4
6
8
10
12
0
14
1
2
3
4
5
6
7
VS (V)
±VSUPPLY (V)
Figure 1. Output Swing RL = 25Ω, 1 kΩ @ −40°C, 25°C, 85°C
Figure 2. Positive Output Swing into 1kΩ
1.0
1.6
-40°C
0.9
1.4
-40°C
1.2
0.7
VSUPPLY - VOUT (V)
VOUT - VSUPPLY (V)
0.8
0.6
85°C
25°C
0.5
0.4
0.3
1.0
85°C
0.8
25°C
0.6
0.4
0.2
0.2
0.1
0
0
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
±VSUPPLY (V)
±VSUPPLY (V)
Figure 3. Negative Output Swing into 1 kΩ
Figure 4. Positive Output Swing into 25Ω
1.4
5.5
5.4
VS = ±6V
5.3
-40°C
1.0
5.2
25°C
25°C
0.8
+VOUT (V)
VOUT - VSUPPLY (V)
1.2
85°C
0.6
5.1
85°C
5.0
4.9
4.8
0.4
4.7
0.2
-40°C
4.6
0
4.5
0
1
2
3
4
5
6
7
0
50
100
150
200
±VSUPPLY (V)
ILOAD (mA)
Figure 5. Negative Output Swing into 25Ω
Figure 6. +VOUT vs. ILOAD
250
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
7
LMH6672
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
www.ti.com
Typical Performance Characteristics (continued)
Av = + 2V/V
5.5
2.0
5.4
5.3
1.8
85°C
1.7
+VOUT (V)
5.2
-VOUT (V)
VS = ±2.5V
1.9
VS = ±6V
5.1
5.0
4.9
4.8
1.6
85°C
1.5
1.4
1.3
25°C
25°C
4.7
1.2
-40°C
4.6
1.1
4.5
1.0
0
50
100
150
200
250
-40°C
0
50
100
150
200
ILOAD (mA)
ILOAD (mA)
Figure 7. −VOUT vs. ILOAD
Figure 8. +VOUT vs. ILOAD
250
16
2.0
85°C
1.9
VS = ±2.5V
14
SUPPLY CURRENT (mA)
1.8
-VOUT (V)
1.7
85°C
1.6
1.5
1.4
25°C
1.3
1.2
-40°C
1.1
12
25°C
-40°C
10
8
6
4
2
0
1.0
0
50
100
150
200
0
250
2
4
6
8
10
12
14
16
SUPPLY VOLTAGE (V)
ILOAD (mA)
Figure 10. Supply Current vs. Supply Voltage
Figure 9. −VOUT vs. ILOAD
700
700
-40°C
-40°C
600
ISOURCE (mA)
ISOURCE (mA)
600
500
85°C
25°C
400
300
25°C
85°C
400
300
200
200
3
4
5
6
7
8
9
10 11 12 13
3
VS (V)
4
5
6
7
8
9
10 11 12 13
VS (V)
Figure 11. Sourcing Current vs. Supply Voltage
8
500
Figure 12. Sinking Current vs. Supply Voltage
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
LMH6672
www.ti.com
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
Typical Performance Characteristics (continued)
Av = + 2V/V
1
3
2
0.5
VOS (mV)
VOS (mV)
1
25°C
-40°C
0
-40°C
25°C
0
85°C
-1
-0.5
85°C
-2
-1
3
4
5 6
-3
-0.5 1
9 10 11 12 13 14 15
7 8
2.5
4
VS (V)
7
8.5 10 11.5 13
VCM (V)
Figure 13. VOS vs. VS
Figure 14. VOS vs. VCM, VS = 12V
10
3
85°C
25°C
INPUT BIAS CURRENT (PA)
2
-40°C
1
VOS (mV)
5.5
0
-1
-2
8
25°
85°C
-40°C
6
4
2
0
-3
-0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
2
4
6
8
10
12
14
VCM (V)
SUPPLY VOLTAGE (V)
Figure 15. VOS vs. VCM, VS = 5V
Figure 16. Bias Current vs. VSUPPLY
3
0.1
TJ = -40°C to 85°C
2
1
VIN (mV)
IOFFSET (µA)
0.08
0.06
-40°C
25°C
0
-1
85°C
0.04
-2
RL = 1k:
0.02
2
4
6
8
10
12
14
-3
-2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 2.5
VSUPPLY (V)
VOUT (V)
Figure 17. Offset Current vs. VSUPPLY
Figure 18. VOUT vs. VIN
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
9
LMH6672
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
www.ti.com
Typical Performance Characteristics (continued)
Av = + 2V/V
-45
2
-55
VIN (mV)
1
HARMONIC DISTORTION (dBc)
3
-40°C
25°C
0
-1
85°C
-2
VS = ±6V
f = 1 MHz
VOUT = 2 VPP
-65
-75
-85
2ND
-95
-105
RL = 25:
3RD
-115
-3
-2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 2.5
0
100
300
400
500
Figure 20. Harmonic Distortion vs. Load
Figure 19. VOUT vs. VIN
-45
-45
HARMONIC DISTORTION (dBc)
VS = ±2.5V
f = 1 MHz
-55
HARMONIC DISTORTION (dBc)
200
LOAD RESISTANCE
VOUT (V)
VOUT = 2 VPP
-65
-75
3RD
-85
-95
2ND
-105
VS = ±6V
f = 1 MHz
-55
-65
-75
3RD
-85
-95
-105
2ND
-115
-115
0
200
300
400
500
0
1
2
3
4
5
6
7
8
9 10 11
OUTPUT VOLTAGE PEAK TO PEAK
Figure 21. Harmonic Distortion vs. Load
Figure 22. Harmonic Distortion vs. Output Voltage
-35
-45
VS = ±6V
-45 f = 1 MHz
-55
HARMONIC DISTORTION (dBc)
HARMONIC DISTORTION (dBc)
LOAD RESISTANCE
RL = 25:
-55
-65
2ND
-75
-85
-95
3RD
-105
0
10
100
1
2
3
4
5
6
7
8
-65
-75
2ND
-85
-95
3RD
-105
-115
0.0
9 10 11
VS = ±2.5V
f = 1 MHz
0.5
1.0
1.5
2.0
2.5
3.0
OUTPUT VOLTAGE PEAK TO PEAK
OUTPUT VOLTAGE PEAK TO PEAK
Figure 23. Harmonic Distortion vs. Output Voltage
Figure 24. Harmonic Distortion vs. Output Voltage
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
LMH6672
www.ti.com
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
Typical Performance Characteristics (continued)
Av = + 2V/V
-55
VS = ±2.5V
f = 1 MHz
-55
HARMONIC DISTORTION (dBc)
HARMONIC DISTORTION (dBc)
-45
RL = 25:
-65
-75
2ND
-85
-95
3RD
-105
VS = ±6V
-65 f = 100 kHz
-75
-85
-95
2ND
-105
-115
3RD
-115
0.0
-125
0.5
1.0
2.0
1.5
2.5
3.0
0
1
2
3
4
5
6
7
8
9 10 11
OUTPUT VOLTAGE PEAK TO PEAK
OUTPUT VOLTAGE PEAK TO PEAK
Figure 25. Harmonic Distortion vs. Output Voltage
Figure 26. Harmonic Distortion vs. Output Voltage
-20
VS = ±6V
f = 100 kHz
-45
HARMONIC DISTORTION (dBc)
HARMONIC DISTORTION (dBc)
-35
RL = 25:
-55
-65
-75
-85
-95
2ND
3RD
-105
-115
VS = ±6V
-30
VOUT = 2 VPP
-40
-50
-60
-70
2ND
-80
-90
-100
-110
3RD
-125
0
1
2
3
4
5
6
7
8
9
-120
0.1
10 11
OUTPUT VOLTAGE PEAK TO PEAK
1
10
FREQUENCY (MHz)
Figure 27. Harmonic Distortion vs. Output Voltage
Figure 28. Harmonic Distortion vs. Frequency
-30
-40
-20
VS = ±6V
HARMONIC DISTORTION (dBc)
HARMONIC DISTORTION (dBc)
-20
100
RL = 25:
VOUT = 2 VPP
-50
-60
-70
2ND
-80
-90
-100
3RD
-110
-120
0.1
-30
VS = ±2.5V
VOUT = 2 VPP
-40
-50
-60
3RD
-70
-80
-90
2ND
-100
-110
-120
1
10
FREQUENCY (MHz)
100
0.1
1
10
100
FREQUENCY (MHz)
Figure 29. Harmonic Distortion vs. Frequency
Figure 30. Harmonic Distortion vs. Frequency
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
11
LMH6672
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
www.ti.com
Typical Performance Characteristics (continued)
Av = + 2V/V
-30
-40
VS = ±2.5V
RL = 25:
VOUT = 2 VPP
-50
2ND
1 V/DIV
HARMONIC DISTORTION (dBc)
-20
-60
-70
0
-80
-90
-100
-110
-120
0.1
3RD
1
10
FREQUENCY (MHz)
20 ns/DIV
100
Figure 32. Pulse Response, VS= ±6V
1 V/DIV
40 mV/DIV
Figure 31. Harmonic Distortion vs. Frequency
0
0
20 ns/DIV
20 ns/DIV
Figure 33. Pulse Response, VS= ±2.5V, ±6V
Figure 34. Pulse Response, AVCL = −1, VS= ±6V
7
Vs = 6 V
6
Vs = ±2.5 V
Vs = -6 V
GAIN (dB)
40 mV/DIV
4
6.5
3
6.4
2
6.3
6.2
1
0
6.1
0.1 dB/div
6
-1
20 ns/DIV
6.7
6.6
5
0
6.8
-2
5.9
-3
0.1
5.8
1
10
100
FREQUENCY (MHz)
Figure 35. Pulse Response, AVCL = −1, VS= ±2.5V, ±6V
12
Submit Documentation Feedback
Figure 36. Frequency Response
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
LMH6672
www.ti.com
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
Typical Performance Characteristics (continued)
Av = + 2V/V
26
23
20
17
GAIN (dB)
13 MHz
14
11
8
12V
5
2
-1
5V
-4
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 38. Frequency Response, AVCL = +10V/V
120
120
100
100
80
80
CMRR (dB)
CMRR (dB)
Figure 37. Frequency Response, AVCL = +5V/V
60
60
40
40
20
20
0
0
1k
10k
100k
1M
10M
1k
100M
10k
FREQUENCY (Hz)
100
90
90
80
80
70
70
60
50
40
40
20
20
10
10
100k
100M
60
30
10k
10M
50
30
1k
1M
Figure 40. CMRR vs. Frequency, Vs = 5V
100
PSRR (dB)
PSRR (dB)
Figure 39. CMRR vs. Frequency, Vs = 12V
0
100
100k
FREQUENCY (Hz)
1M
0
100
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 41. PSRR+ vs. Frequency, VS = 5V and 12V
Figure 42. PSRR− vs. Frequency VS = 5V and 12V
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
13
LMH6672
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
www.ti.com
Typical Performance Characteristics (continued)
Av = + 2V/V
100
10
10
en
CURRENT NOISE (pA/ Hz)
VOLTAGE NOISE (nV/ Hz)
100
in
1
100
1k
10k
100k
1M
1
10M
FREQUENCY (Hz)
Figure 43. en & in vs. Frequency, VS = 5V and 12V
14
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
LMH6672
www.ti.com
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
7 Detailed Description
7.1 Functional Block Diagram
+
+
1/2
LMH6672
RO
12.5
Rf1
1:N
VIN
(VPP)
AV . VIN
Rg
RL = 100:
VOUT
(1.2)
Rf2
Note: Supply and Bypassing not shown.
RO
12.5
-
1/2
LMH6672
+
Figure 44. LMH6672 Block Diagram
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
15
LMH6672
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
www.ti.com
8 Power Supply Recommendations
8.1 Thermal Management
The LMH6672 is a high-speed, high power, dual operational amplifier with a very high slew rate and very low
distortion. For ease of use, it uses conventional voltage feedback. These characteristics make the LMH6672
ideal for applications where driving low impedances of 25 to 100 Ω such as xDSL and active filters.
A class AB output stage allows the LMH6672 to deliver high currents to low impedance loads with low distortion
while consuming low quiescent supply current. For most op-amps, class AB topology means that internal power
dissipation is rarely an issue, even with the trend to smaller surface mount packages. However, the LMH6672
has been designed for applications where high levels of power dissipation may be encountered.
Several factors contribute to power dissipation and consequently higher junction temperatures. These factors
need to be well understood if the LMH6672 is to perform to specifications in all applications. This section will
examine the typical application shown in Figure 44 as an example. Because both amplifiers are in a single
package, the calculations are for the total power dissipated by both amplifiers.
There are two separate contributors to the internal power dissipation:
1. The product of the supply voltage and the quiescent current when no signal is being delivered to the external
load.
2. The additional power dissipated while delivering power to the external load.
The first of these components appears easy to calculate simply by inspecting the data sheet. The typical
quiescent supply current for this part is 7.2 mA per amplifier. Therefore, with a ±6 volt supply, the total power
dissipation is:
PD = VS × 2 × lQ = 12 × (14.4×10-3) = 173 mW
where
•
(VS = VCC + VEE)
(1)
With a thermal resistance of 172°C/W for the SOIC package, this level of internal power dissipation will result in a
junction temperature (TJ) of 30°C above ambient.
Using the worst-case maximum supply current of 18 mA and an ambient of 85°C, a similar calculation results in a
power dissipation of 216 mW, or a TJ of 122°C.
This is approaching the maximum allowed TJ of 150°C before a signal is applied. Fortunately, in normal
operation, this term is reduced, for reasons that will soon be explained.
The second contributor to high TJ is the power dissipated internally when power is delivered to the external load.
This cause of temperature rise is more difficult to calculate, even when the actual operating conditions are
known.
To maintain low distortion, in a Class AB output stage, an idle current, IQ, is maintained through the output
transistors when there is little or no output signal. In the LMH6672, about 4.8 mA of the total quiescent supply
current of 14.4 mA flows through the output stages.
Under normal large signal conditions, as the output voltage swings positive, one transistor of the output pair will
conduct the load current, while the other transistor shuts off, and dissipates no power. During the negative signal
swing this situation is reversed, with the lower transistor sinking the load current while the upper transistor is cut
off. The current in each transistor will approximate a half wave rectified version of the total load current.
Because the output stage idle current is now routed into the load, 4.8 mA can be subtracted from the quiescent
supply current when calculating the quiescent power when the output is driving a load.
16
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
LMH6672
www.ti.com
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
Thermal Management (continued)
The power dissipation caused by driving a load in a DSL application, using a 1:2 turns ratio transformer driving
20 mW into the subscriber line and 20 mW into the back termination resistors, can be calculated as follows:
PDRIVER = PTOT – (PTERM + PLINE)
Where
•
•
•
•
•
PDRIVER is the LMH6672 power dissipation
PTOT is the total power drawn from the power supply
PTERM is the power dissipated in the back termination resistors
PLINE is the power sent into the subscriber line
At full specified power, PTERM = PLINE = 20 mW, PTOT = VS × IS
(2)
In this application, VS = 12V.
IS = IQ + AVG |IOUT|
IQ = the LMH6672 quiescent current minus the output stage idle current.
IQ = 14.4 – 4.8 = 9.6 mA
(3)
(4)
(5)
Average (AVG) |IOUT| for a full-rate ADSL CPE application, using a 1:2 turns ratio transformer, is
mA RMS.
(40 mW/50:)
= 28.28
For a Gaussian signal, which the DMT ADSL signal approximates, AVG |IOUT| = 2/S x IRMS = 22.6 mA. Therefore,
PTOT = (22.6 mA + 9.6 mA) × 12V = 386 mW and PDRIVER is 40 mW lower or 346 mW.
In the SOIC package, with a θJA of 172°C/W, this causes a temperature rise of 60°C. With an ambient
temperature at the maximum recommended 85°C, the TJ is at 145°C, which is below the specified 150°C
maximum.
Even if it is assumed that the absolute maximum IS over temperature of 18 mA, when the IQ is scaled up
proportionally to 7 mA, the PDRIVER only goes up by 17 mW causing a 62°C rise from ambient to 147°C.
Although very few CPE applications will ever operate in an environment as hot as 85°C, if a lower TJ is desired
or the LMH6672 is to be used in an application where the power dissipation is higher, the SO PowerPAD (DDA)
package provides a much lower RθJA of only 58.6° C/W. Using the same PDRIVER as above, we find that the
temperature rise is only about 21°C, resulting in TJ of 106°C with 85°C ambient.
NOTE
Since the exposed PAD (or DAP) of the SO PowerPAD (DDA) package is internally
floating, the footprint for DAP could be connected to ground plane in PCB for better heat
dissipation.
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
17
LMH6672
SNOS957H – APRIL 2001 – REVISED AUGUST 2014
www.ti.com
9 Device and Documentation Support
9.1 Trademarks
All trademarks are the property of their respective owners.
9.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
9.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
10 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
18
Submit Documentation Feedback
Copyright © 2001–2014, Texas Instruments Incorporated
Product Folder Links: LMH6672
PACKAGE OPTION ADDENDUM
www.ti.com
5-Jan-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LMH6672MA/NOPB
ACTIVE
SOIC
D
8
95
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 150
LMH66
72MA
LMH6672MAX/NOPB
ACTIVE
SOIC
D
8
2500
RoHS & Green
SN
Level-1-260C-UNLIM
-40 to 150
LMH66
72MA
LMH6672MR/NOPB
ACTIVE SO PowerPAD
DDA
8
95
RoHS & Green
SN
Level-3-260C-168 HR
-40 to 150
LMH66
72MR
LMH6672MRX/NOPB
ACTIVE SO PowerPAD
DDA
8
2500
RoHS & Green
SN
Level-3-260C-168 HR
-40 to 150
LMH66
72MR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
