LMH6683MAX

LMH6682, LMH6683 www.ti.com SNOSA43A – MAY 2004 – REVISED APRIL 2013 LMH6682/6683 190MHz Single Supply, Dual and Triple Operational Amplifiers Check for Samples: LMH6682, LMH6683 FEATURES 1 VS = ±5V, TA = 25°C, RL = 100Ω, A = +2 (Typical Values Unless Specified) 2 • • • • • • • • • DG error 0.01% DP error 0.08° −3dB BW (A = +2) 190MHz Slew rate (VS = ±5V) 940V/μs Supply Current 6.5mA/amp Output Current +80/−90mA Input Common Mode Voltage 0.5V Beyond V−,1.7V from V+ Output Voltage Swing (RL = 2kΩ) 0.8V from Rails Input Voltage Noise (100KHz) 12nV/√Hz APPLICATIONS • • • • • CD/DVD ROM ADC Buffer Amp Portable Video Current Sense Buffer Portable Communications DESCRIPTION The LMH6682 and LMH6683 are high speed operational amplifiers designed for use in modern video systems. These single supply monolithic amplifiers extend TI's feature-rich, high value video portfolio to include a dual and a triple version. The important video specifications of differential gain (± 0.01% typ.) and differential phase (±0.08 degrees) combined with an output drive current in each amplifier of 85mA make the LMH6682 and LMH6683 excellent choices for a full range of video applications. Voltage feedback topology in operational amplifiers assures maximum flexibility and ease of use in high speed amplifier designs. The LMH6682/83 is fabricated in TI's VIP10 process. This advanced process provides a superior ratio of speed to quiescient current consumption and assures the user of high-value amplifier designs. Advanced technology and circuit design enables in these amplifiers a −3db bandwidth of 190MHz, a slew rate of 940V/μsec, and stability for gains of less than −1 and greater than +2. The input stage design of the LM6682/83 enables an input signal range that extends below the negative rail. The output stage voltage range reaches to within 0.8V of either rail when driving a 2kΩ load. Other attractive features include fast settling and low distortion. Other applications for these amplifiers include servo control designs. These applications are sensitive to amplifiers that exhibit phase reversal when the inputs exceed the rated voltage range. The LMH6682/83 amplifiers are designed to be immune to phase reversal when the specified input range is exceeded. See applications section. This feature makes for design simplicity and flexibility in many industrial applications. The LMH6682 dual operational amplifier is offered in miniature surface mount packages, SOIC-8, and VSSOP-8. The LMH6683 triple amplifier is offered in SOIC-14 and TSSOP-14. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2013, Texas Instruments Incorporated LMH6682, LMH6683 SNOSA43A – MAY 2004 – REVISED APRIL 2013 www.ti.com Connection Diagram Figure 1. SOIC-8/VSSOP-8 (LMH6682) Top View Figure 2. SOIC-14/TSSOP-14 (LMH6683) Top View These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) ESD Tolerance 2KV (3) Human Body Model 200V (4) Machine Model VIN Differential ±2.5V See (5) (6) Output Short Circuit Duration Input Current ±10mA Supply Voltage (V+ - V−) 12.6V V+ +0.8V, V− −0.8V Voltage at Input/Output pins Soldering Information Infrared or Convection (20 sec.) Wave Soldering (10 sec.) Junction Temperature (7) (2) (3) (4) (5) (6) (7) 260°C −65°C to +150°C Storage Temperature Range (1) 235°C +150°C Absolute maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. Human body model, 1.5kΩ in series with 100pF. Machine Model, 0Ω in series with 200pF. Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. Output short circuit duration is infinite for VS < 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms. The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board. Operating Ratings (1) Supply Voltage (V+ – V−) 3V to 12V Operating Temperature Range (2) Package Thermal Resistance (2) (1) (2) 2 −40°C to +85°C SOIC-8 190°C/W VSSOP-8 235°C/W SOIC-14 145°C/W TSSOP-14 155°C/W Absolute maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 LMH6682, LMH6683 www.ti.com SNOSA43A – MAY 2004 – REVISED APRIL 2013 5V Electrical Characteristics Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 5V, V− = 0V, VO = VCM = V+/2, and RL = 100Ω to V+/2, RF = 510Ω. Boldface limits apply at the temperature extremes. Symbol SSBW Parameter −3dB BW Conditions A = +2, VOUT = 200mVPP Min (1) Typ (2) 140 180 A = −1, VOUT = 200mVPP 180 Max (1) Units MHz GFP Gain Flatness Peaking A = +2, VOUT = 200mVPP DC to 100MHz 2.1 dB GFR Gain Flatness Rolloff A = +2, VOUT = 200mVPP DC to 100MHz 0.1 dB LPD 1° 1° Linear Phase Deviation A = +2, VOUT = 200mVPP, ±1° 40 MHz GF 0.1dB 0.1dB Gain Flatness A = +2, ±0.1dB, VOUT = 200mVPP 25 MHz FPBW Full Power −1dB Bandwidth A = +2, VOUT = 2VPP 110 MHz DG Differential Gain NTSC 3.58MHz A = +2, RL = 150Ω to V+/2 Pos video only VCM = 2V 0.03 % DP Differential Phase NTSC 3.58MHz A = +2, RL = 150Ω to V+/2 Pos video only VCM = 2V 0.05 deg 20-80%, VO = 1VPP, AV = +2 2.1 20-80%, VO = 1VPP, AV = −1 2 Time Domain Response Tr/Tf Rise and Fall Time ns OS Overshoot A = +2, VO = 100mVPP 22 % Ts Settling Time VO = 2VPP, ±0.1%, AV = +2 49 ns SR Slew Rate (3) A = +2, VOUT = 3VPP 520 A = −1, VOUT = 3VPP 500 f = 5MHz, VO = 2VPP, A = +2, RL = 2kΩ −60 f = 5MHz, VO = 2VPP, A = +2, RL = 100Ω −61 f = 5MHz, VO = 2VPP, A = +2, RL = 2kΩ −77 f = 5MHz, VO = 2VPP, A = +2, RL = 100Ω −54 f = 5MHz, VO = 2VPP, A = +2, RL = 2kΩ −60 f = 5MHz, VO = 2VPP, A = +2, RL = 100Ω −53 dBc f = 1kHz 17 nV/√Hz f = 100kHz 12 f = 1kHz 8 f = 100kHz 3 V/μs Distortion and Noise Response HD2 HD3 THD en 2nd Harmonic Distortion 3rd Harmonic Distortion Total Harmonic Distortion Input Referred Voltage Noise in Input Referred Current Noise CT Cross-Talk Rejection (Amplifier) dBc dBc pA/√Hz −77 f = 5MHz, A = +2, SND: RL = 100Ω RCV: RF = RG = 510Ω dB Static, DC Performance AVOL CMVR (1) (2) (3) Large Signal Voltage Gain Input Common-Mode Voltage Range VO = 1.25V to 3.75V, RL = 2kΩ to V+/2 85 95 VO = 1.5V to 3.5V, RL = 150Ω to V+/2 75 85 VO = 2V to 3V, RL = 50Ω to V+/2 70 80 −0.2 −0.1 −0.5 3.0 2.8 3.3 CMRR ≥ 50dB dB V All limits are ensured by testing or statistical analysis. Typical values represent the most likely parametric norm. Slew rate is the average of the rising and falling slew rates Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 Submit Documentation Feedback 3 LMH6682, LMH6683 SNOSA43A – MAY 2004 – REVISED APRIL 2013 www.ti.com 5V Electrical Characteristics (continued) Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 5V, V− = 0V, VO = VCM = V+/2, and RL = 100Ω to V+/2, RF = 510Ω. Boldface limits apply at the temperature extremes. Symbol Parameter Min (1) Conditions Typ (2) Max (1) Units ±1.1 ±5 ±7 mV VOS Input Offset Voltage TC VOS Input Offset Voltage Average Drift See (4) ±2 IB Input Bias Current See (5) −5 TC IB Input Bias Current Drift IOS Input Offset Current CMRR Common Mode Rejection Ratio VCM Stepped from 0V to 3.0V 72 82 dB +PSRR Positive Power Supply Rejection Ratio V+ = 4.5V to 5.5V, VCM = 1V 70 76 dB IS Supply Current (per channel) No load μV/°C −20 −30 0.01 50 6.5 μA nA/°C 300 500 9 11 nA mA Miscellaneous Performance VO Output Swing High Output Swing Low RL = 2kΩ to V+/2 4.10 3.8 4.25 RL = 150Ω to V+/2 3.90 3.70 4.19 RL = 75Ω to V+/2 3.75 3.50 4.15 RL = 2kΩ to V+/2 800 920 1100 RL = 150Ω to V+/2 870 970 1200 885 1100 1250 + R L = 75Ω to V /2 IOUT Output Current VO = 1V from either supply rail ±40 +80/−75 ISC Output Short Circuit Current (6) (7) (8) Sourcing to V+/2 −100 −80 −155 Sinking from V+/2 100 80 220 RIN Common Mode Input Resistance CIN Common Mode Input Capacitance ROUT Output Resistance Closed Loop (4) (5) (6) (7) (8) 4 V 3 1.6 f = 1kHz, A = +2, RL = 50Ω 0.02 f = 1MHz, A = +2, RL = 50Ω 0.12 mV mA mA MΩ pF Ω Offset Voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change. Positive current corresponds to current flowing into the device. Short circuit test is a momentary test. See next note. Output short circuit duration is infinite for VS < 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms. Positive current corresponds to current flowing into the device. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 LMH6682, LMH6683 www.ti.com SNOSA43A – MAY 2004 – REVISED APRIL 2013 ±5V Electrical Characteristics Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 5V, V− = −5V, VO = VCM = 0V, and RL = 100Ω to 0V, RF = 510Ω. Boldface limits apply at the temperature extremes. Symbol SSBW Parameter −3dB BW Conditions A = +2, VOUT = 200mVPP Min (1) Typ (2) 150 190 A = −1, VOUT = 200mVPP 190 Max (1) Units MHz GFP Gain Flatness Peaking A = +2, VOUT = 200mVPP DC to 100MHz 1.7 dB GFR Gain Flatness Rolloff A = +2, VOUT = 200mVPP DC to 100MHz 0.1 dB LPD 1° 1° Linear Phase Deviation A = +2, VOUT = 200mVPP, ±1° 40 MHz GF 0.1dB 0.1dB Gain Flatness A = +2, ±0.1dB, VOUT = 200mVPP 25 MHz FPBW Full Power −1dB Bandwidth A = +2, VOUT = 2VPP 120 MHz DG Differential Gain NTSC 3.58MHz A = +2, RL = 150Ω to 0V 0.01 % DP Differential Phase NTSC 3.58MHz A = +2, RL = 150Ω to 0V 0.08 deg 20-80%, VO = 1VPP, A = +2 1.9 20-80%, VO = 1VPP, A = −1 2 Time Domain Response Tr/Tf Rise and Fall Time ns OS Overshoot A = +2, VO = 100mVPP 19 % Ts Settling Time VO = 2VPP, ±0.1%, A = +2 42 ns SR Slew Rate (3) A = +2, VOUT = 6VPP 940 A = −1, VOUT = 6VPP 900 f = 5MHz, VO = 2VPP, A = +2, RL = 2kΩ −63 f = 5MHz, VO = 2VPP, A = +2, RL = 100Ω −66 f = 5MHz, VO = 2VPP, A = +2, RL = 2kΩ −82 f = 5MHz, VO = 2VPP, A = +2, RL = 100Ω −54 f = 5MHz, VO = 2VPP, A = +2, RL = 2kΩ −63 f = 5MHz, VO = 2VPP, A = +2, RL = 100Ω −54 dBc f = 1kHz 18 nV/√Hz f = 100kHz 12 f = 1kHz 6 f = 100kHz 3 V/μs Distortion and Noise Response HD2 HD3 THD en 2nd Harmonic Distortion 3rd Harmonic Distortion Total Harmonic Distortion Input Referred Voltage Noise in Input Referred Current Noise CT Cross-Talk Rejection (Amplifier) dBc dBc pA/√Hz −78 f = 5MHz, A = +2, SND: RL = 100Ω RCV: RF = RG = 510Ω dB Static, DC Performance AVOL CMVR (1) (2) (3) Large Signal Voltage Gain Input Common Mode Voltage Range VO = −3.75V to 3.75V, RL = 2kΩ to V+/2 87 100 VO = −3.5V to 3.5V, RL = 150Ω to V+/2 80 90 VO = −3V to 3V, RL = 50Ω to V+/2 75 85 −5.2 −5.1 −5.5 3.0 2.8 3.3 CMRR ≥ 50dB dB V All limits are ensured by testing or statistical analysis. Typical values represent the most likely parametric norm. Slew rate is the average of the rising and falling slew rates Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 Submit Documentation Feedback 5 LMH6682, LMH6683 SNOSA43A – MAY 2004 – REVISED APRIL 2013 www.ti.com ±5V Electrical Characteristics (continued) Unless otherwise specified, all limits ensured for at TJ = 25°C, V+ = 5V, V− = −5V, VO = VCM = 0V, and RL = 100Ω to 0V, RF = 510Ω. Boldface limits apply at the temperature extremes. Symbol Parameter Min (1) Conditions Typ (2) Max (1) Units ±1 ±5 ±7 mV VOS Input Offset Voltage TC VOS Input Offset Voltage Average Drift See (4) ±2 IB Input Bias Current See (5) −5 TC IB Input Bias Current Drift IOS Input Offset Current CMRR Common Mode Rejection Ratio VCM Stepped from −5V to 3.0V 75 84 dB +PSRR Positive Power Supply Rejection Ratio V+ = 8.5V to 9.5V, V− = −1V 75 82 dB −PSRR Negative Power Supply Rejection V− = −4.5V to −5.5V, Ratio V+ = 5V 78 85 dB IS Supply Current (per channel) μV/°C −20 −30 0.01 50 No load 6.5 μA nA/°C 300 500 9.5 11 nA mA Miscellaneous Performance VO Output Swing High Output Swing Low RL = 2kΩ to 0V 4.10 3.80 4.25 RL = 150Ω to 0V 3.90 3.70 4.20 RL = 75Ω to 0V 3.75 3.50 4.18 RL = 2kΩ to 0V −4.19 −4.07 −3.80 RL = 150Ω to 0V −4.05 −3.89 −3.65 R L = 75Ω to 0V −4.00 −3.70 −3.50 IOUT Output Current VO = 1V from either supply rail ±45 +85/−80 ISC Output Short Circuit Current (6) (7) (8) Sourcing to 0V −120 −100 −180 Sinking from 0V 120 100 230 RIN Common Mode Input Resistance CIN Common Mode Input Capacitance ROUT Output Resistance Closed Loop (4) (5) (6) (7) (8) 6 V 4 1.6 f = 1kHz, A = +2, RL = 50Ω 0.02 f = 1MHz, A = +2, RL = 50Ω 0.12 mV mA mA MΩ pF Ω Offset Voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change. Positive current corresponds to current flowing into the device. Short circuit test is a momentary test. See next note. Output short circuit duration is infinite for VS < 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms. Positive current corresponds to current flowing into the device. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 LMH6682, LMH6683 www.ti.com SNOSA43A – MAY 2004 – REVISED APRIL 2013 Typical Schematic Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 Submit Documentation Feedback 7 LMH6682, LMH6683 SNOSA43A – MAY 2004 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics At TA = 25°C, V = +5V, V− = −5V, RF = 510Ω for A = +2; unless otherwise specified. + 8 Non-Inverting Frequency Response Inverting Frequency Response Figure 3. Figure 4. Non-Inverting Frequency Response for Various Gain Inverting Frequency Response for Various Gain Figure 5. Figure 6. Non-Inverting Phase vs. Frequency for Various Gain Inverting Phase vs. Frequency for Various Gain Figure 7. Figure 8. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 LMH6682, LMH6683 www.ti.com SNOSA43A – MAY 2004 – REVISED APRIL 2013 Typical Performance Characteristics (continued) + − At TA = 25°C, V = +5V, V = −5V, RF = 510Ω for A = +2; unless otherwise specified. Open Loop Gain & Phase vs. Frequency Open Loop Gain and Phase vs. Frequency Over Temperature Figure 9. Figure 10. Non-Inverting Frequency Response Over Temperature Inverting Frequency Response Over Temperature Figure 11. Figure 12. Gain Flatness 0.1dB Differential Gain & Phase for A = +2 Figure 13. Figure 14. Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 Submit Documentation Feedback 9 LMH6682, LMH6683 SNOSA43A – MAY 2004 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) + − At TA = 25°C, V = +5V, V = −5V, RF = 510Ω for A = +2; unless otherwise specified. 10 Transient Response Negative Transient Response Positive Figure 15. Figure 16. Noise vs. Frequency Noise vs. Frequency Figure 17. Figure 18. Harmonic Distortion vs. VOUT Harmonic Distortion vs. VOUT Figure 19. Figure 20. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 LMH6682, LMH6683 www.ti.com SNOSA43A – MAY 2004 – REVISED APRIL 2013 Typical Performance Characteristics (continued) + − At TA = 25°C, V = +5V, V = −5V, RF = 510Ω for A = +2; unless otherwise specified. Harmonic Distortion vs. VOUT THD vs. for Various Frequencies Figure 21. Figure 22. Harmonic Distortion vs. Frequency Crosstalk vs. Frequency Figure 23. Figure 24. ROUT vs. Frequency IOS vs. VSUPPLY Over Temperature Figure 25. Figure 26. Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 Submit Documentation Feedback 11 LMH6682, LMH6683 SNOSA43A – MAY 2004 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) + − At TA = 25°C, V = +5V, V = −5V, RF = 510Ω for A = +2; unless otherwise specified. 12 VOS vs. VS @ −40°C VOS vs. VS @ 25°C Figure 27. Figure 28. VOS vs. VS @ 85°C VOS vs. VS @ 125°C Figure 29. Figure 30. VOS vs. VOUT VOS vs. VOUT Figure 31. Figure 32. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 LMH6682, LMH6683 www.ti.com SNOSA43A – MAY 2004 – REVISED APRIL 2013 Typical Performance Characteristics (continued) + − At TA = 25°C, V = +5V, V = −5V, RF = 510Ω for A = +2; unless otherwise specified. ISUPPLY/Amp vs. VCM ISUPPLY/Amp vs. VSUPPLY Figure 33. Figure 34. VOUT vs. ISOURCE VOUT vs. ISINK Figure 35. Figure 36. VOUT vs. ISOURCE VOUT vs. ISINK Figure 37. Figure 38. Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 Submit Documentation Feedback 13 LMH6682, LMH6683 SNOSA43A – MAY 2004 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) + − At TA = 25°C, V = +5V, V = −5V, RF = 510Ω for A = +2; unless otherwise specified. 14 VOS vs. VCM |IB|vs. VS Figure 39. Figure 40. Short Circuit ISOURCE vs. VS Short Circuit ISINK vs. VS Figure 41. Figure 42. Linearity Input vs. Output Linearity Input vs. Output Figure 43. Figure 44. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 LMH6682, LMH6683 www.ti.com SNOSA43A – MAY 2004 – REVISED APRIL 2013 Typical Performance Characteristics (continued) + − At TA = 25°C, V = +5V, V = −5V, RF = 510Ω for A = +2; unless otherwise specified. CMRR vs. Frequency PSRR vs. Frequency Figure 45. Figure 46. Small Signal Pulse Response for A = +2 Small Signal Pulse Response A = −1 Figure 47. Figure 48. Large Signal Pulse Response Large Signal Pulse Response Figure 49. Figure 50. Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 Submit Documentation Feedback 15 LMH6682, LMH6683 SNOSA43A – MAY 2004 – REVISED APRIL 2013 www.ti.com APPLICATIONS SECTION LARGE SIGNAL BEHAVIOR Amplifying high frequency signals with large amplitudes (as in video applications) has some special aspects to look after. The bandwidth of the Op Amp for large amplitudes is less than the small signal bandwidth because of slew rate limitations. While amplifying pulse shaped signals the slew rate properties of the OpAmp become more important at higher amplitude ranges. Due to the internal structure of an Op Amp the output can only change with a limited voltage difference per time unit (dV/dt). This can be explained as follows: To keep it simple, assume that an Op Amp consists of two parts; the input stage and the output stage. In order to stabilize the Op Amp, the output stage has a compensation capacitor in its feedback path. This Miller C integrates the current from the input stage and determines the pulse response of the Op Amp. The input stage must charge/discharge the feedback capacitor, as can be seen in Figure 51. Figure 51. When a voltage transient is applied to the non inverting input of the Op Amp, the current from the input stage will charge the capacitor and the output voltage will slope up. The overall feedback will subtract the gradually increasing output voltage from the input voltage. The decreasing differential input voltage is converted into a current by the input stage (Gm). I*Δt = C *ΔV ΔV/Δt = I/C I=ΔV*Gm (1) (2) (3) where I = current t = time C = capacitance V = voltage Gm = transconductance Slew rate ΔV/Δt = volt/second In most amplifier designs the current I is limited for high differential voltages (Gm becomes zero). The slew rate will than be limited as well: ΔV/Δt = Imax/C (4) The LMH6682/83 has a different setup of the input stage. It has the property to deliver more current to the output stage when the input voltage is higher (class AB input). The current into the Miller capacitor exhibits an exponential character, while this current in other Op Amp designs reaches a saturation level at high input levels: (see Figure 52) 16 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 LMH6682, LMH6683 www.ti.com SNOSA43A – MAY 2004 – REVISED APRIL 2013 Figure 52. This property of the LMH6682/83 guaranties a higher slew rate at higher differential input voltages. ΔV/Δt = ΔV*Gm/C (5) In Figure 53 one can see that a higher transient voltage than will lead to a higher slew rate. Figure 53. HANDLING VIDEO SIGNALS When handling video signals, two aspects are very important especially when cascading amplifiers in a NTSC- or PAL video system. A composite video signal consists of both amplitude and phase information. The amplitude represents saturation while phase determines color (color burst is 3.59MHz for NTSC and 4.58MHz for PAL systems). In this case it is not only important to have an accurate amplification of the amplitude but also it is important not to add a varying phase shift to the video signals. It is a known phenomena that at different dc levels over a certain load the phase of the amplified signal will vary a little bit. In a video chain many amplifiers will be cascaded and all errors will be added together. For this reason, it is necessary to have strict requirements for the variation in gain and phase in conjunction to different dc levels. As can be seen in the tables the number for the differential gain for the LMH6682/83 is only 0.01% and for the differential phase it is only 0.08° at a supply voltage of ±5V. Note that the phase is very dependent of the load resistance, mainly because of the dc current delivered by the parts output stage into the load. For more information about differential gain and phase and how to measure it see Application Note OA-24 SNOA370 which can be found on via TI's home page http://www.ti.com Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 Submit Documentation Feedback 17 LMH6682, LMH6683 SNOSA43A – MAY 2004 – REVISED APRIL 2013 www.ti.com OUTPUT PHASE REVERSAL This is a problem with some operational amplifiers. This effect is caused by phase reversal in the input stage due to saturation of one or more of the transistors when the inputs exceed the normal expected range of voltages. Some applications, such as servo control loops among others, are sensitive to this kind of behavior and would need special safeguards to ensure proper functioning. The LMH6682/6683 is immune to output phase reversal with input overload. With inputs exceeded, the LMH6682/6683 output will stay at the clamped voltage from the supply rail. Exceeding the input supply voltages beyond the Absolute Maximum Ratings of the device could however damage or otherwise adversely effect the reliability or life of the device. DRIVING CAPACITIVE LOADS The LMH6682/6683 can drive moderate values of capacitance by utilizing a series isolation resistor between the output and the capacitive load. Capacitive load tolerance will improve with higher closed loop gain values. Applications such as ADC buffers, among others, present complex and varying capacitive loads to the Op Amp; best value for this isolation resistance is often found by experimentation and actual trial and error for each application. DISTORTION Applications with demanding distortion performance requirements are best served with the device operating in the inverting mode. The reason for this is that in the inverting configuration, the input common mode voltage does not vary with the signal and there is no subsequent ill effects due to this shift in operating point and the possibility of additional non-linearity. Moreover, under low closed loop gain settings (most suited to low distortion), the non-inverting configuration is at a further disadvantage of having to contend with the input common voltage range. There is also a strong relationship between output loading and distortion performance (i.e. 2kΩ vs. 100Ω distortion improves by about 15dB @1MHz) especially at the lower frequency end where the distortion tends to be lower. At higher frequency, this dependence diminishes greatly such that this difference is only about 5dB at 10MHz. But, in general, lighter output load leads to reduced HD3 term and thus improves THD. (See Harmonic Distortion plots, Figures 19 through 23). PRINTED CIRCUIT BOARD LAYOUT AND COMPONENT VALUES SELECTION Generally it is a good idea to keep in mind that for a good high frequency design both the active parts and the passive ones are suitable for the purpose you are using them for. Amplifying frequencies of several hundreds of MHz is possible while using standard resistors but it makes life much easier when using surface mount ones. These resistors (and capacitors) are smaller and therefore parasitics have lower values and will have less influence on the properties of the amplifier. Another important issue is the PCB, which is no longer a simple carrier for all the parts and a medium to interconnect them. The board becomes a real part itself, adding its own high frequency properties to the overall performance of the circuit. It's good practice to have at least one ground plane on a PCB giving a low impedance path for all decouplings and other ground connections. Care should be taken especially that on board transmission lines have the same impedance as the cables they are connected to (i.e. 50Ω for most applications and 75Ω in case of video and cable TV applications). These transmission lines usually require much wider traces on a standard double sided PCB than needed for a 'normal' connection. Another important issue is that inputs and outputs must not 'see' each other or are routed together over the PCB at a small distance. Furthermore it is important that components are placed as flat as possible on the surface of the PCB. For higher frequencies a long lead can act as a coil, a capacitor or an antenna. A pair of leads can even form a transformer. Careful design of the PCB avoids oscillations or other unwanted behavior. When working with really high frequencies, the only components which can be used will be the surface mount ones (for more information see OA-15 SNOA367). As an example of how important the component values are for the behavior of your circuit, look at the following case: On a board with good high frequency layout, an amplifier is placed. For the two (equal) resistors in the feedback path, 5 different values are used to set the gain to +2. The resistors vary from 200Ω to 3kΩ. 18 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 LMH6682, LMH6683 www.ti.com SNOSA43A – MAY 2004 – REVISED APRIL 2013 Figure 54. In Figure 54 it can be seen that there's more peaking with higher resistor values, which can lead to oscillations and bad pulse responses. On the other hand the low resistor values will contribute to higher overall power consumption. TI suggests the following evaluation boards as a guide for high frequency layout and as an aid in device testing and characterization. Device Package Evaluation Board PN LMH6682MA 8-Pin SOIC CLC730036 LMH6682MM 8-Pin VSSOP CLC730123 LMH6683MA 14-Pin SOIC CLC730031 LMH6683MT 14-Pin TSSOP CLC730131 Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 Submit Documentation Feedback 19 LMH6682, LMH6683 SNOSA43A – MAY 2004 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Original (April 2013) to Revision A • 20 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 19 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMH6682 LMH6683 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LMH6682MA/NOPB ACTIVE SOIC D 8 95 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 LMH66 82MA LMH6682MAX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 LMH66 82MA LMH6682MM/NOPB ACTIVE VSSOP DGK 8 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 A90A LMH6682MMX/NOPB ACTIVE VSSOP DGK 8 3500 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 A90A LMH6683MA/NOPB ACTIVE SOIC D 14 55 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 LMH66 83MA LMH6683MAX/NOPB ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 LMH66 83MA LMH6683MT/NOPB ACTIVE TSSOP PW 14 94 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 LMH66 83MT LMH6683MTX/NOPB ACTIVE TSSOP PW 14 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 LMH66 83MT (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of