LMK00301 Evaluation Board
User Guide
National Semiconductor Corporation
User Guide
20 September 2011
General Description
This user guide describes how to set up and operate the LMK00301 evaluation board kit (EVK). The LMK00301 is
a 3-GHz, 10-output differential fanout buffer intended for high-frequency, low-additive jitter clock/data
distribution and level translation. The EVK enables the user to verify the functionality and performance
specifications of the device. Refer to the LMK00301 datasheet for the functional description and specifications
of the device.
Features
Low-noise clock fan-out via two banks of five differential outputs and one LVCMOS output
Selectable differential output type (LVPECL, LVDS, HCSL, or Hi-Z)
3:1 input multiplexer with two universal input buffers and one crystal oscillator interface
DIP switch control of device configuration
Single 3.3 V or dual 3.3 V/2.5 V operation using onboard LDO regulators or direct supply inputs
Flexible input and output interface with controlled-impedance traces and edge SMA connectors
VCC
VCCO
GND
CLKoutA0
CLKoutA0*
CLKoutA_TYPE[1:0]
CLKoutA1
CLKoutA1*
CLKin_SEL[1:0]
CLKoutA2
CLKoutA2*
CLKoutA3
CLKoutA3*
CLKin0
CLKoutA4
CLKoutA4*
CLKin0*
CLKin1
CLKin1*
MUX
OSCin
CLKoutB0
CLKoutB0*
CLKoutB1
CLKoutB1*
OSCout
CLKoutB2
CLKoutB2*
CLKoutB3
CLKoutB3*
CLKoutB4
CLKoutB4*
CLKoutB_TYPE[1:0]
REFout
REFout_EN
Figure 1. LMK00301 Evaluation Board Photo
SYNC
Figure 2. LMK00301 Functional Block Diagram
Page 1
[LMK00301 EVALUATION BOARD USER GUIDE]
Contents
Crystal Oscillator Interface ...................................5
General Description .............................................. 1
Configuring OSCin for a Single-Ended Input .....5
Features ................................................................ 1
Clock Outputs .......................................................5
Contents ............................................................... 2
LVPECL and LVCMOS Outputs at 2.5 V VCCO ...6
Evaluation Board Quick Start................................ 3
Schematics ............................................................6
Signal Path and Control Switches ......................... 3
PCB Layout ......................................................... 10
Power Supplies ..................................................... 4
Bill of Materials .................................................. 16
Clock Inputs .......................................................... 5
Configuring CLKinX for a Single-Ended Input.... 5
Figure 3. LMK00301 Evaluation Board Quick Start Setup
Page 2
[LMK00301 EVALUATION BOARD USER GUIDE]
Evaluation Board Quick Start
To quickly set up and operate the board with basic
equipment, refer to the quick start procedure below
and test setup shown in Figure 2.
1. Verify the output mode control switches,
S1[1:5], match the states shown in Table 1 to
reflect the default output clock interfaces
configured on the EVK.
Table 1. Default Clock Output Modes / Interfaces
SW Position/Name
SW State
S1[1] / CLKoutB_Type1
S1[2] / CLKoutB_Type0
S1[3] / CLKoutA_Type1
S1[4] / CLKoutA_Type0
S1[5] / REFout_EN
0 (OFF)
1 (ON)
0 (OFF)
0 (OFF)
1 (ON)
Default Clock
Output Modes
Bank B outputs
are LVDS
Bank A outputs
are LVPECL
REFout enabled
2. Connect the VCC_EXT and GND leads from the
board to a 4 V - 16 V source. This powers an
onboard LDO regulator that provides 3.3 V to
VCC and VCCO supplies of the IC. Both VCC &
VCCO status LED should be lit green when ON.
3. Set the desired clock input using the input
selection control switches, S1[6:7], per Table 2.
The onboard 25 MHz crystal (Y1) is selected by
default, so an external clock source is not
required. A differential clock source can be
connected to SMAs CLKin0/0* or CLKin1/1*.
Table 2. Input Selection (0=SW OFF, 1=SW ON)
Selected
Input
CLKin0/0*
CLKin1/1*
OSCin
Default Input
Mode
Differential
clock
Differential
clock
25 MHz XTAL
onboard
S1[6]
CLKin_Sel1
State
S1[7]
CLKin_Sel0
State
0
0
0
1
1
Don’t care
CLKin0/0* and CLKin1/1* paths are configured by
default to receive a differential clock as the input.
The SMA inputs are DC coupled to the device inputs
and terminated with 100 ohms differential. Refer
to the Clock Inputs section to configure the EVK for
a single-ended input.
4. Connect and measure any clock output SMA
labeled CLKoutX#/X#* or REFout to an
oscilloscope or other test instrument using SMA
cable(s). The output clock will be leveltranslated/buffered copy of the selected clock
input or crystal oscillator. Note: All output
clocks are AC-coupled to the SMA connectors to
ensure safe use with RF instruments.
Note: Leaving a driven output(s) without proper
load termination can cause signal reflections on
the board, which can couple onto nearby outputs
and result in degraded signal quality and
erroneous measurements. To minimize these
effects, be sure to properly terminate any unused
output path using an SMA load or solder
termination resistors on the loading options near
the edges of the board. Another option is to
disconnect the unused output pin from the trace by
removing the series 0-ohm resistor. An unused
output bank may also be disabled using the output
mode control switch.
Signal Path and Control Switches
The LMK00301 supports single-ended or differential
clocks on CLKin0 and CLKin1. A third input, OSCin,
has an integrated crystal oscillator interface that
supports a fundamental mode, AT-cut crystal or an
external single-ended clock. The three-input
multiplexer is pin-controlled. To achieve the
maximum operating frequency and lowest additive
jitter, it is recommended to use a differential clock
with high input slew rate (>3 V/ns) and DC-coupling
to either CLKin0 or CLKin1 port.
The device provides up to 10 differential outputs
split between Bank A and Bank B, where each bank
has a pin-controlled output mode (LVPECL, LVDS,
Page 3
[LMK00301 EVALUATION BOARD USER GUIDE]
HCSL, or Hi-Z). An additional output, REFout, has a
fixed LVCMOS buffer with output enable input.
All control pins are configured with the control
switch, S1. The input selection logic is shown in
Table 2. The Bank A and Bank B output mode
selection logic are shown in Table 3 and Table 4.
The REFout enable logic is shown in Table 5.
Table 3. Bank A Output Mode Selection (0=OFF, 1=ON)
Bank A
Output Mode
LVPECL
LVDS
HCSL
Disabled/Hi-Z
S1[3]
CLKoutA_Type1
State
0
0
1
1
S1[4]
CLKoutA_Type0
State
0
1
0
1
Table 4. Bank B Output Mode Selection (0=OFF, 1=ON)
Bank B
Output Mode
LVPECL
LVDS
HCSL
Disabled/Hi-Z
S1[2]
CLKoutA_Type1
State
0
0
1
1
S1[1]
CLKoutA_Type0
State
0
1
0
1
Table 5. REFout Enable Selection (0=OFF, 1=ON)
REFout Enable Mode
Disabled/Hi-Z
S1[5]
REFout_EN State
0
Enabled
1
Power Supplies
The power supply section on the EVK provides
flexibility to power the device using the onboard
LDO regulator(s) or direct supply input(s). A
combination of 0-ohm resistor options allows the
user to modify the EVK power supply configuration,
if desired.
By default, 3.3 V (VCC and VCCO) is supplied by one
of the onboard LDO regulators, U1. To power the
regulator, connect a 4 V – 16 V input voltage and
ground from an external power source to the
terminal block, J2, or SMA input labeled VCC_EXT.
To modify the EVK with a different power supply
configuration, populate the resistor options as
shown in Table 6. Then, apply the appropriate
voltage(s) to the EVK power input(s).
If the EVK is configured for dual external input
supplies, connect the 2.5 V input voltage and
ground from another external power source to the
SMA input labeled VCCO_EXT.
Decoupling capacitors and 0-ohm resistor
footprints, which can accommodate ferrite beads,
can be used to isolate the EVK power input(s) from
the device power pins.
Table 6. EVK Power Supply Configuration Options
VCC_EXT input
VCCO_EXT input
U2 output (VCCO)
U3 output (VCC)
R131
R132
R134
R145
R153
R155
Single LDO
3.3 V (Default)
Apply 4 V – 16 V
Not used
Not used
3.3 V (VCC & VCCO)
DNP
0
DNP
DNP
DNP
0
Single Ext. Input
3.3 V
Apply 3.3 V ± 5%
Not used
Not used
Not used
DNP
0
DNP
DNP
0
DNP
Dual LDO
3.3 V / 2.5 V
Apply 4 V – 16 V
Not used
2.5 V
3.3 V
DNP
DNP
0
0
DNP
0
Dual Ext. Inputs
3.3 V / 2.5 V
Apply 3.3 V ± 5%
Apply 2.5 V ± 5%
Not used
Not used
0
0
DNP
DNP
0
DNP
Page 4
[LMK00301 EVALUATION BOARD USER GUIDE]
R156
0
Clock Inputs
The SMA inputs labeled CLKin0 & CLKin0* and
CLKin1 & CLKin1* can be configured to receive a
differential clock or single-ended clock. Best
performance is achieved with a DC-coupled
differential input clock, which is the default
configuration for both CLKin ports.
Both CLKin0 and CLKin1 paths include footprint
options (0603 size) to provide the user with
flexibility in configuring the termination, biasing,
and coupling for the device inputs.
Configuring CLKinX for a Single-Ended Input
To configure a single-ended clock input on CLKin0,
follow the steps below. CLKin1 can be modified
similarly.
1. Remove R24 (100 ohm differential termination).
2. Terminate CLKin0 (driven input) by installing 51
ohms on R30.
3. Bias CLKin0*(non-driven input) with a reference
voltage near the common-mode voltage of the
CLKin0 signal using R21 and R23 to form a
voltage divider from VCC.
4. Install 0.1 uF on C10 as a bypass capacitor.
For example, if CLKin0 will be driven by singleended LVPECL signal with a common-mode voltage
of 2 V, then R21 and R23 can be 1.0 kohm and 1.5
kohm, respectively.
Crystal Oscillator Interface
The LMK00301 has an integrated crystal oscillator
interface (OSCin/OSCout) that supports a
fundamental mode, AT-cut crystal. If the crystal
input is selected, the onboard XTAL on either
footprint Y1 or Y2 will start-up and the oscillator
clock can be measured on any enabled output.
DNP
0
DNP
By default, a 25.000 MHz XTAL is populated on Y1,
which uses a HC49 footprint on the bottom side of
the PCB.
Alternatively, a 3.2 x 2.5 mm XTAL can be populated
on Y2, located on the top side. Only one XTAL
footprint should be used at a time.
The external load capacitor values of C18 and C22
(CEXT) depend on the specified load capacitance (CL)
for the crystal, as well as the device’s OSCin input
capacitance (CIN = 1 pF typical) and the PCB stray
capacitance (CSTRAY = 1 pF). The selected 25 MHz
crystal is specified for CL of 18 pF. Assuming equal
external load capacitor values for optimum
symmetry, CEXT can be calculated as follows:
CEXT = (CL – CIN – CSTRAY) * 2
CEXT = (18 pF – 1 pF – 1 pF) * 2
CEXT ~ 33 pF (nearest standard value)
To limit crystal power dissipation, a 1 k resistor is
placed between the OSCout pin and the crystal.
Configuring OSCin for a Single-Ended Input
To configure a single-ended clock input on OSCin,
remove R34 and R37 to disconnect the crystal.
Install 0.1 uF on C24 to provide an AC-coupled path
from the SMA input labeled OSCin to the device
input, which is biased internally. Note that the
OSCin path is includes a 51- termination on R40.
Clock Outputs
By default, Bank A outputs are configured for
LVPECL mode and source-terminated with 240 ohm
resistors and AC coupled to the SMA connectors
labeled CLKoutA# and CLKoutA#*. Bank B outputs
are configured for LVDS mode and AC coupled to
the output SMA connectors labeled CLKoutB# and
CLKoutB#*. REFout is a LVCMOS output and is AC
coupled to its SMA connector. Footprint options
(0603 size) provide flexibility to configure the
output termination, biasing, and coupling to the
Page 5
[LMK00301 EVALUATION BOARD USER GUIDE]
destination. To modify the output interface for a
different output mode, refer to the modifications
provided in the Schematic section.
As noted earlier, all outputs should be properly
terminated, or else disconnected via the 0-ohm
resistor or disabled using the output control switch.
LVPECL and LVCMOS Outputs at 2.5 V VCCO
The LVPECL and LVCMOS output levels depend on
the VCCO voltage, as specified in the datasheet.
When VCCO is 2.5 V and an output (bank) is
configured for LVPECL mode, it is suggested to use a
lower-valued source-termination resistor to ground,
such as 91 , to maintain proper DC bias current on
each output.
Schematics
See the following pages.
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[LMK00301 EVALUATION BOARD USER GUIDE]
Figure 4. Schematic Sheet #1
Page 7
[LMK00301 EVALUATION BOARD USER GUIDE]
Figure 5. Schematic Sheet #2
Page 8
[LMK00301 EVALUATION BOARD USER GUIDE]
Figure 6. Schematic Sheet #3
Page 9
[LMK00301 EVALUATION BOARD USER GUIDE]
PCB Layout
Figure 7. Top Side, Layer #1 (Not to scale)
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[LMK00301 EVALUATION BOARD USER GUIDE]
Figure 8. Internal Ground Plane, Layer #2 (Layer Inverted, Not to scale)
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[LMK00301 EVALUATION BOARD USER GUIDE]
Figure 9. Internal Power Plane, Layer #3 (Not to scale)
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[LMK00301 EVALUATION BOARD USER GUIDE]
Figure 10. Bottom Side, Layer #4 (Top view, Not to scale)
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[LMK00301 EVALUATION BOARD USER GUIDE]
Figure 11. Top Silkscreen (Not to scale)
Page 14
[LMK00301 EVALUATION BOARD USER GUIDE]
Figure 12. Bottom Silkscreen (Top view, Not to scale)
Page 15
[LMK00301 EVALUATION BOARD USER GUIDE]
Bill of Materials
Item
Designator
1
2
AA1
C1, C4, C60,
C64, C65, C67,
C71, C72
Printed Circuit Board
CAP, CERM, 10uF, 10V, +/10%, X5R, 0805
3
C2, C5, C61,
C68
C3, C6, C23,
C28, C29, C32,
C33, C34, C35,
C38, C39, C40,
C41, C44, C45,
C46, C47, C50,
C51, C52, C53,
C56, C57, C58,
C59
C7, C12, C14,
C17, R5, R6,
R7, R8, R10,
R11, R13, R14,
R15, R16, R22,
R27, R28, R33,
R36, R37, R38,
R45, R46, R47,
R48, R50, R51,
R53, R54, R55,
R56, R132,
R155, R156
C8, C9, C16,
C20, C21, C26,
C27, C62, C69
7
C18, C22
8
C63, C70
9
C66, C73
4
5
6
Description
Manufacturer
Part Number
Qty
MuRata
LMK00301EVAL
GRM21BR61A106KE19L
1
8
CAP, CERM, 1uF, 16V, +/10%, X7R, 0603
CAP, CERM, 0.1uF, 16V, +/10%, X7R, 0603
TDK
C1608X7R1C105K
4
TDK
C1608X7R1C104K
25
RES, 0 ohm, 5%, 0.1W, 0603
Vishay-Dale
CRCW06030000Z0EA
34
CAP, CERM, 0.01uF, 16V, +/10%, X7R, 0402
TDK
C1005X7R1C103K
9
CAP, CERM, 33pF, 50V, +/5%, C0G/NP0, 0603
CAP, CERM, 2200pF, 100V,
+/-5%, X7R, 0603
CAP, CERM, 0.01uF, 25V, +/5%, C0G/NP0, 0603
MuRata
GRM1885C1H330JA01D
2
AVX
06031C222JAT2A
2
TDK
C1608C0G1E103J
2
Page 16
[LMK00301 EVALUATION BOARD USER GUIDE]
10
CLKin0,
CLKin0*,
CLKin1,
CLKin1*,
CLKoutA0,
CLKoutA0*,
CLKoutA1,
CLKoutA1*,
CLKoutA2,
CLKoutA2*,
CLKoutA3,
CLKoutA3*,
CLKoutA4,
CLKoutA4*,
CLKoutB0,
CLKoutB0*,
CLKoutB1,
CLKoutB1*,
CLKoutB2,
CLKoutB2*,
CLKoutB3,
CLKoutB3*,
CLKoutB4,
CLKoutB4*,
OSCin, REFout,
VCC_EXT,
VCCO_EXT
Connector, SMT, End launch
SMA 50 ohm
Emerson Network
Power
142-0701-806
28
11
D1, D2
LED 2.8X3.2MM 565NM GRN
CLR SMD
SML-LX2832GC
2
12
N/A
4
13
FID1, FID2,
FID3, FID4
J1
Lumex
Opto/Components
Inc.
N/A
FCI
52601-G10-8LF
1
14
J2
Weidmuller
1594540000
1
15
R24, R31
Vishay-Dale
CRCW0603100RJNEA
2
16
R34
Vishay-Dale
CRCW06031K00JNEA
1
17
18
R40
R41, R42, R43,
R44, R49, R52,
R57, R58, R59,
R60
Vishay-Dale
Vishay-Dale
CRCW060351R0JNEA
CRCW0603160RJNEA
1
10
19
R133, R154
Vishay-Dale
CRCW0603270RJNEA
2
20
R135, R136,
R137, R140,
R141, R142,
R143
R138, R157
R139
RES, 270 ohm, 5%, 0.1W,
0603
RES, 2.0k ohm, 5%, 0.1W,
0603
Vishay-Dale
CRCW06032K00JNEA
7
RES, 51k ohm, 5%, 0.1W, 0603
RES, 1.30k ohm, 1%, 0.1W,
0603
Vishay-Dale
Vishay-Dale
CRCW060351K0JNEA
CRCW06031K30FKEA
2
1
21
22
Fiducial mark. There is nothing
to buy or mount.
Low Profile Vertical Header 2x5
0.100"
CONN TERM BLK PCB
5.08MM 2POS OR
RES, 100 ohm, 5%, 0.1W,
0603
RES, 1.0k ohm, 5%, 0.1W,
0603
RES, 51 ohm, 5%, 0.1W, 0603
RES, 160 ohm, 5%, 0.1W,
0603
Page 17
[LMK00301 EVALUATION BOARD USER GUIDE]
23
R144, R159
RES, 866 ohm, 1%, 0.1W,
0603
RES, 2.00k ohm, 1%, 0.1W,
0603
SWITCH DIP ROCKER 8POS
SMD
0.875" Standoff
Vishay-Dale
CRCW0603866RFKEA
2
24
R158
Vishay-Dale
CRCW06032K00FKEA
1
25
S1
Tyco
GDR08S04
1
26
27
SO1, SO2, SO3,
SO4
U1
VOLTREX
SPCS-14
4
High-Performance Differential
Fanout Buffer
Micropower 800mA Low Noise
'Ceramic Stable' Adjustable
Voltage Regulator for 1V to 5V
Applications, 8-pin LLP
CRYSTAL 25.000 MHZ 18PF
SMD
DNP
National
Semiconductor
National
Semiconductor
LMK00301
1
28
U2, U3
LP3878SD-ADJ
2
29
Y1
Abracon
Corporation
ABLS-25.000MHZ-B4-FT
1
30
C10, C11, C13,
C15, C19, C24,
C30, C31, C36,
C37, C42, C43,
C48, C49, C54,
C55
31
32
C25
R1, R2, R3, R4,
R9, R12, R17,
R18, R19, R20
DNP
DNP
0
0
33
R21, R23, R25,
R26, R30, R32,
R35, R39, R65,
R66, R67, R68,
R69, R70, R79,
R80, R81, R82,
R83, R84, R93,
R94, R95, R96,
R97, R98, R107,
R108, R109,
R110, R111,
R112, R121,
R122, R123,
R124, R125,
R126
DNP
0
34
R29, R131,
R134, R145,
R153
DNP
0
0
Page 18
[LMK00301 EVALUATION BOARD USER GUIDE]
35
R61, R62, R63,
R64, R71, R72,
R73, R74, R75,
R76, R77, R78,
R85, R86, R87,
R88, R89, R90,
R91, R92, R99,
R100, R101,
R102, R103,
R104, R105,
R106, R113,
R114, R115,
R116, R117,
R118, R119,
R120, R127,
R128, R129,
R130
DNP
0
36
R146, R147,
R148, R149,
R150, R151,
R152
Y2
VCC_EXT
GND
DNP
0
DNP
Banana plug, Red
Banana plug, Black
0
1
1
37
38
39
Emerson
Emerson
108-0302-001
108-0303-001
Page 19
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