LMP8645, LMP8645HV
SNOSB29H – NOVEMBER 2009 – REVISED MAY 2022
LMP8645, LMP8645HV Precision High Voltage Current Sense Amplifier
1 Features
3 Description
•
•
The LMP8645 and the LMP8645HV devices are
precision current sense amplifiers that detect small
differential voltages across a sense resistor in the
presence of high-input common-mode voltages.
•
•
•
•
•
•
•
•
•
•
Typical Values, TA = 25°C
High Common-Mode Voltage Range
– LMP8645 –2 V to 42 V
– LMP8645HV –2 V to 76 V
Supply Voltage Range 2.7 V to 12 V
Gain Configurable With a Single Resistor
Maximum Variable Gain Accuracy (With External
Resistor) 2%
Transconductance 200 μA/V
Low Offset Voltage 1 mV
Input Bias 12 μA
PSRR 90 dB
CMRR 95 dB
Temperature Range −40°C to 125°C
6-Pin SOT Package
2 Applications
•
•
•
•
•
•
High-Side Current Sense
Vehicle Current Measurement
Motor Controls
Battery Monitoring
Remote Sensing
Power Management
Operating from a supply range of 2.7 V to 12
V, the LMP8645 accepts input signals with a
common-mode voltage range of –2 V to 42 V,
while the LMP8645HV accepts input signals with
a common-mode voltage range of –2 V to 76 V.
The LMP8645 and LMP8645HV have adjustable
gain for applications where supply current and high
common-mode voltage are the determining factors.
The gain is configured with a single resistor, providing
a high level of flexibility, as well as accuracy as
low as 2% (maximum) including the gain setting
resistor. The output is buffered to provide low output
impedance. This high-side current sense amplifier is
ideal for sensing and monitoring currents in DC or
battery-powered systems, has excellent AC and DC
specifications over temperature, and keeps errors in
the current sense loop to a minimum. The LMP8645
is an ideal choice for industrial, automotive, and
consumer applications, and is available in SOT-6
package.
Device Information(1)
PART NUMBER
PACKAGE
LMP8645
SOT (6)
LMP8645HV
(1)
BODY SIZE (NOM)
1.60 mm × 2.90 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
RS
IS
+
+IN
-IN
RIN
+
L
o
a
d
LMP8645
RIN
+
V
+
VA
ADC
VOUT
+
-
V
RG
Typical Application
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LMP8645, LMP8645HV
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SNOSB29H – NOVEMBER 2009 – REVISED MAY 2022
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 3
6.1 Absolute Maximum Ratings........................................ 3
6.2 ESD Ratings............................................................... 3
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................4
6.5 2.7-V Electrical Characteristics................................... 5
6.6 5-V Electrical Characteristics...................................... 6
6.7 12-V Electrical Characteristics.................................... 7
6.8 Typical Characteristics................................................ 8
7 Detailed Description...................................................... 11
7.1 Overview................................................................... 11
7.2 Functional Block Diagram......................................... 12
7.3 Feature Description...................................................12
7.4 Device Functional Modes..........................................13
8 Application and Implementation.................................. 18
8.1 Application Information............................................. 18
8.2 Typical Applications.................................................. 18
9 Power Supply Recommendations................................20
10 Layout...........................................................................21
10.1 Layout Guidelines................................................... 21
10.2 Layout Example...................................................... 21
11 Device and Documentation Support..........................22
11.1 Device Support........................................................22
11.2 Documentation Support.......................................... 22
11.3 Receiving Notification of Documentation Updates.. 22
11.4 Support Resources................................................. 22
11.5 Trademarks............................................................. 22
11.6 Electrostatic Discharge Caution.............................. 22
11.7 Glossary.................................................................. 22
12 Mechanical, Packaging, and Orderable
Information.................................................................... 22
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (September 2015) to Revision H (May 2022)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
• Removed Absolute Maximum Ratings tablenote: If Military/Aerospace specified devices are required, contact
the Texas Instruments Sales Office/Distributors for availability and specifications.............................................3
Changes from Revision F (March 2013) to Revision G (September 2015)
Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section................... 1
Changes from Revision E (March 2013) to Revision F (March 2013)
Page
• Changed layout of National Data Sheet to TI format........................................................................................ 19
2
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5 Pin Configuration and Functions
VOUT
V
-
+IN
1
2
LMP8645
LMP8645HV
3
+
6
V
5
RG
4
-IN
Figure 5-1. DD Package 6-Pin SOT Top View
Table 5-1. Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
VOUT
1
O
Single-ended output
V-
2
P
Negative supply voltage
+IN
3
I
Positive input
-IN
4
I
Negative input
RG
5
I/O
V+
6
P
External gain resistor
Positive supply voltage
6 Specifications
6.1 Absolute Maximum Ratings
See (1) (2) (3)
MIN
Supply Voltage (VS = V+ - V−)
MAX
UNIT
13.2
V
Differential voltage +IN- (-IN)
Voltage at pins +IN, -IN
LMP8645HV
–6
LMP8645
–6
Voltage at RG pin
6
V
80
V
60
V
13.2
V
V-
Voltage at OUT pin
Junction temperature(2)
Storage temperature, Tstg
(1)
(2)
(3)
–65
V+
V
150
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJ(MAX), RθJA, and the ambient
temperature, TA. The maximum allowable power dissipation PDMAX = (TJ(MAX) - TA)/ RθJA or the number given in Absolute Maximum
Ratings, whichever is lower.
For soldering specifications, refer to SNOA549
6.2 ESD Ratings
VALUE
V(ESD)
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/
JEDEC JS-001(1) (3)
All pins except 3 and 4
±2000
Pins 3 and 4
±5000
Charged-device model (CDM), per JEDEC specification
JESD22-C101(2)
±1250
Machine Model
(1)
UNIT
V
±200
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
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(2)
(3)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of
JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
6.3 Recommended Operating Conditions
Supply voltage (VS = V+ – V−)
Temperature
(1)
range(1)
MIN
MAX
2.7
12
UNIT
V
–40
125
°C
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJ(MAX), RθJA, and the ambient
temperature, TA. The maximum allowable power dissipation PDMAX = (TJ(MAX) - TA)/ RθJA or the number given in Absolute Maximum
Ratings, whichever is lower.
6.4 Thermal Information
THERMAL METRIC(1)
LMV8645,
LMV8645HV
DDC (SOT)
UNIT
6 PINS
RθJA
(1)
(2)
4
Junction-to-ambient thermal
resistance(2)
96
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJ(MAX), RθJA, and the ambient
temperature, TA. The maximum allowable power dissipation PDMAX = (TJ(MAX) - TA)/ RθJA or the number given in Absolute Maximum
Ratings, whichever is lower.
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6.5 2.7-V Electrical Characteristics
Unless otherwise specified, all limits specified for at TA = 25°C, VS = V+ – V–, V+ = 2.7 V, V− = 0 V, −2 V < VCM < 76 V, RG =
25 kΩ, RL = 10 MΩ.(1)
PARAMETER
VOS
Input Offset Voltage
TCVOS
(6)
IB
Input Bias Current(7)
Input Offset Voltage Drift(4)
eni
Input Voltage
VSENSE(MA
X)
Gain AV
Gm
Noise(6)
VCM = 2.1 V
12
mV
7
μV/°C
20
μA
mV
Adjustable Gain Setting(6)
VCM = 12 V
Transconductance
VCM = 2.1 V
drift(6)
−3-dB Bandwidth(6)
Slew Rate(5) (6)
VCM = 2.1 V
–3.4%
3.4%
140 ppm /°C
95
–2 V 10 kHz, RG = 5 kΩ
Accuracy
BW
TEST CONDITIONS
kHz
V/µs
380
525
2000
2500
At the temperature extremes
710
At the temperature extremes
uA
2700
1.2
V
20
Sourcing, VOUT = 600 mV, Rg = 150 kΩ
5
Sinking, VOUT = 600 mV, Rg = 150 kΩ
5
30
mV
mA
pF
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables
under conditions of internal self-heating where TJ > TA.
Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and
will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production
material.
All limits are specified by testing, design, or statistical analysis.
Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature
change.
The number specified is the average of rising and falling slew rates and measured at 90% to 10%.
This parameter is specified by design and/or characterization and is not tested in production.
Positive Bias Current corresponds to current flowing into the device.
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6.6 5-V Electrical Characteristics
Unless otherwise specified, all limits specified for at TA = 25°C, VS = V+ – V–, V+ = 5 V, V− = 0 V, −2 V < VCM < 76 V, Rg = 25
kΩ, RL = 10 MΩ.(1)
PARAMETER
VOS
Input Offset Voltage
TCVOS
(6)
IB
Input Bias Current(7)
Input Offset Voltage Drift(4)
Noise(6)
TEST CONDITIONS
VCM = 2.1 V
VCM = 2.1 V
CMRR
Common-Mode Rejection
Ratio
−3-dB Bandwidth(6)
BW
Slew Rate(5) (6)
SR
VCM = 2.1 V
(1)
(2)
(3)
(4)
(5)
(6)
(7)
6
100
3.4%
140 ppm /°C
60
dB
dB
RG= 10 kΩ, CG = 4 pF, VSENSE = 400 mV,
CL = 30 pF, RL = 1 MΩ
850
RG= 25 kΩ, CG = 4 pF, VSENSE = 300 mV,
CL = 30 pF, RL = 1 MΩ
260
RG= 50 kΩ, CG = 4 pF, VSENSE = 300 mV,
CL = 30 pF, RL = 1 MΩ
140
VCM = 5 V, CG = 4 pF, VSENSE from 100 mV
to 500 mV, CL = 30 pF, RL= 1 MΩ
0.5
VCM = 2.1 V
V/V
µA/V
–3.4%
-2 V < VCM < 2 V
Minimum Output Voltage
Max Output Capacitance
Load(6)
At the temperature extremes
95
VCM = 5 V, Rg = 500 kΩ
CLOAD
μA
2%
LMP8645HV 2.1 V < VCM < 76 V
LMP8645 2.1 V < VCM < 42 V
Maximum Output Voltage
Output current(6)
22
200
90
VCM = −2 V
IOUT
μV/°C
–2%
VCM = 2.1 V, 2.7 V < V+ < 12 V
Supply Current
VOUT
1
−40°C to 125°C, VCM = 2.1 V
VCM = 2.1 V
IS
7
mV
Transconductance
PSRR
mV
600
VCM = 12 V
Gm
1.7
nV/√ Hz
Adjustable Gain Setting(6)
Power Supply Rejection
Ratio
–1.7
UNIT
120
VCM = 12 V, RG = 5 kΩ
drift(6)
1
f > 10 kHz, RG = 5 kΩ
Max Input Sense Voltage(6)
Accuracy
–1
12.5
Input Voltage
Gm
MAX(3)
VCM = 2.1 V
VSENSE(MA
Gain AV
TYP(2)
VCM = 2.1 V
eni
X)
At the temperature extremes
MIN(3)
kHz
V/µs
450
610
2100
2800
At the temperature extremes
780
At the temperature extremes
uA
3030
3.3
V
22
Sourcing, VOUT = 1.65 V, Rg = 150 kΩ
5
Sinking, VOUT = 1.65 V, Rg = 150 kΩ
5
30
mV
mA
pF
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables
under conditions of internal self-heating where TJ > TA.
Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and
will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production
material.
All limits are specified by testing, design, or statistical analysis.
Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature
change.
The number specified is the average of rising and falling slew rates and measured at 90% to 10%.
This parameter is specified by design and/or characterization and is not tested in production.
Positive Bias Current corresponds to current flowing into the device.
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6.7 12-V Electrical Characteristics
Unless otherwise specified, all limits specified for at TA = 25°C, VS = V+ – V-, V+ = 12 V, V− = 0 V, −2 V < VCM < 76 V, Rg= 25
kΩ, RL = 10 MΩ.(1)
PARAMETER
VOS
Input Offset Voltage
TCVOS
(6)
IB
Input Bias Current(7)
Input Offset Voltage Drift(4)
eni
Input Voltage
VSENSE(MA
X)
Gain AV
Gm
Noise(6)
VCM = 2.1 V
13
mV
7
μV/°C
23
μA
mV
Adjustable Gain Setting(6)
VCM = 12 V
Transconductance
VCM = 2.1 V
drift(6)
−3-dB Bandwidth(6)
Slew Rate(5) (6)
VCM = 2.1 V
–3.4%
3.4%
140 ppm /°C
95
–2 V < VCM < 2 V
60
dB
dB
RG = 10 kΩ, CG = 4 pF, VSENSE = 400 mV,
CL = 30 pF, RL = 1 MΩ
860
RG = 25 kΩ, CG = 4 pF, VSENSE = 400 mV,
CL = 30 pF, RL = 1 MΩ
260
RG = 50 kΩ, CG = 4 pF, VSENSE = 400 mV,
CL = 30 pF, RL = 1 MΩ
140
VCM = 5 V, CG = 4 pF, VSENSE from 100 mV
to 500 mV, CL = 30 pF, RL = 1 MΩ
0.6
Minimum Output Voltage
VCM = 2.1 V
Max Output Capacitance
Load(6)
At the temperature extremes
V/V
µA/V
2%
LMP8645HV 2.1 V < VCM < 76 V
LMP8645 2.1 V < VCM< 42 V
VCM = 12 V, RG= 500 kΩ
CLOAD
200
90
Maximum Output Voltage
Output current(6)
100
–2%
VCM = 2.1 V, 2.7 V 10 kHz, RG = 5 kΩ
Accuracy
BW
TEST CONDITIONS
kHz
V/µs
555
765
2200
2900
At the temperature extremes
920
At the temperature extremes
uA
3110
10.2
V
24
Sourcing, VOUT = 5.25 V, Rg = 150 kΩ
5
Sinking, VOUT = 5.25 V, Rg = 150 kΩ
5
30
mV
mA
pF
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables
under conditions of internal self-heating where TJ > TA.
Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and
will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production
material.
All limits are specified by testing, design, or statistical analysis.
Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature
change.
The number specified is the average of rising and falling slew rates and measured at 90% to 10%.
This parameter is specified by design and/or characterization and is not tested in production.
Positive Bias Current corresponds to current flowing into the device.
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6.8 Typical Characteristics
Unless otherwise specified: TA = 25°C, VS= V+– V–, VSENSE= +IN – (–IN), RL = 10 MΩ.
2300
2300
2100
VCM = -2V
2400
2200
2100
1900
1800
-40°C
800
25°C
125°C
1500
VS = 12V
1300
VS = 5V
1100
VCM = 2.1V
700
600
500
400
300
1700
IS (µA)
IS (µA)
2000
1900
2.7
5.3
8.0
10.6
VS = 2.7V
900
700
500
300
13.2
-2 -1 0
1
2
VS (V)
Figure 6-1. Supply Current vs. Supply Voltage
4 16 28 40 52 64 76
Figure 6-2. Supply Current vs. VCM
100
110
VCM = 5V, Rg = 10 k:
VS = 5V, Rg = 10 kΩ
90
CMRR (dB)
80
PSRR (dB)
3
VCM (V)
60
70
50
40
30
20
1
10
100
1k
10k
10
100k
1
10
FREQUENCY (Hz)
25
150
CMRR (dB)
GAIN (dB)
Rg = 10 k:
5
0
100
1M
VS = 12V
25°C
110
125°C
90
70
1k
10k
100k
1M
10M
50
-2
11
FREQUENCY (Hz)
24
37
50
63
76
VCM (V)
Figure 6-5. Gain vs. Frequency
8
100k
130
Rg = 50 k:
15
10
10k
-40°C
VS = 5V, VCM = 5V
Rg = 25 k:
1k
Figure 6-4. AC CMRR vs. Frequency
Figure 6-3. AC PSRR vs. Frequency
20
100
FREQUENCY (Hz)
Figure 6-6. CMRR vs. VCM
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6.8 Typical Characteristics (continued)
Unless otherwise specified: TA = 25°C, VS= V+– V–, VSENSE= +IN – (–IN), RL = 10 MΩ.
4.0
40
VS = 5V, VCM = 12V
3.5
3.0
30
Rg = 25 k:
Rg = 50 k:
2.0
1.5
Rg = 10 k:
Rg=25 kΩ
25
VOUT (mV)
Rg=50 kΩ
20
15
1.0
10
0.5
5
VS = 5V, VCM = 12V
200
300
400
500
0
600
-5
0
5
10
VSENSE (mV)
VSENSE (mV)
VS = 12V, VCM = 5V
Rg = 25 kÖ
VSENSE
VOUT (40 mV/div)
VSENSE (100 mV/div)
VOUT (400 mV/div)
VS=12V, VCM=5V
Rg = 50 kÖ
Rg = 50 kÖ
Rg = 25 kÖ
Rg = 10 kÖ
Rg = 10 kÖ
TIME (4 és/div)
TIME (4 és/div)
Figure 6-9. Large Step Response
Figure 6-10. Small Step Response
VS = 12V, VCM = 5V
VS = 12V, VCM = 5V
Rg = 25 kÖ
VOUT (40 mV/div)
Rg = 50 kÖ
VSENSE (10 mV/DIV)
VOUT (40 mV/DIV)
VSENSE
VSENSE
20
Figure 6-8. Output Voltage vs. VSENSE (ZOOM Close to 0 V)
Figure 6-7. Output Voltage vs. VSENSE
VSENSE
15
VSENSE (10 mV/div)
100
VSENSE (10 mV/div)
VOUT (V)
2.5
0.0
0
Rg=10 kΩ
35
Rg = 50 kÖ
Rg = 25 kÖ
Rg = 10 kÖ
Rg = 10 kÖ
TIME (800 ns/DIV)
TIME (800 ns/div)
Figure 6-11. Settling Time (Rise)
Figure 6-12. Settling Time (Fall)
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6.8 Typical Characteristics (continued)
Unless otherwise specified: TA = 25°C, VS= V+– V–, VSENSE= +IN – (–IN), RL = 10 MΩ.
VS = 12V
TIME (4 és/DIV)
VOUT
TIME (4 és/DIV)
Figure 6-13. Common-Mode Step Response (Rise)
10
VCM
VCM (20V/DIV)
VOUT
VOUT (100 mV/DIV)
VOUT (50 mV/DIV)
VCM
VCM (20V/DIV)
VS = 12V
Figure 6-14. Common-Mode Step Response (Fall)
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7 Detailed Description
7.1 Overview
Operating from a 2.7-V to 12-V supply range, the LMP8645 accepts input signals with a common-mode voltage
range of –2 V to 42 V, while the LMP8645HV accepts input signals with a common-mode voltage range of –2
V to 76 V. The LMP8645 and LMP8645HV have adjustable gain, set by a single resistor, for applications where
supply current and high common-mode voltage are the determining factors.
7.1.1 Theory of Operation
RIN = 1/Gm
VSENSE
IS
RS
+
+IN
-IN
RIN+
+
LMP8645
RIN-
L
o
a
d
-
+
V
•
IS
VOUT
+
-
RG
V
RGAIN
Figure 7-1. Current Monitor Example Circuit
As seen in Figure 7-1, the current flowing through the shunt resistor ( RS) develops a voltage drop equal to
VSENSE across RS. The resulting voltage at the –IN pin will now be less than +IN pin proportional to the VSENSE
voltage.
The sense amplifier senses this indifference and increases the gate drive to the MOSFET to increase IS′ current
flowing through the RIN+ string until the amplifer inputs are equal. In this way, the voltage drop across RIN+ now
matches the votlage drop across VSENSE.
The RIN resistors are trimmed to a nominal value of 5 kΩ each. The current IS′ flows through RIN+ , the MOSFET,
and RGAIN to ground. The IS′ current generates the voltage VG across RGAIN. The gain is created bythe ratio of
RGAIN and RIN.
A current proportional to IS is generated according to the following relation:
IS′ = VSENSE / RIN = RS × IS / RIN
(1)
where
•
RIN = 1 / Gm
This current flows entirely in the external gain resistor developing a voltage drop equal to:
VG = IS′ × RGAIN = (VSENSE / RIN) × RGAIN = ( (RS × IS) / RIN ) × RGAIN
(2)
This voltage is buffered and presented at the output with a very low output impedance allowing a very easy
interface to other devices (ADC, μC…).
VOUT = (RS × IS) × G
(3)
where
•
G = RGAIN / RIN
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7.2 Functional Block Diagram
+IN
-IN
RIN
LMP8645
LMP8645HV
RIN
-
+
+
V
-
VOUT
+
RG
V
-
7.3 Feature Description
7.3.1 Driving ADC
The input stage of an Analog-to-Digital converter can be modeled with a resistor and a capacitance versus
ground. So if the voltage source does not have a low impedance, an error in the measurement of the amplitude
will occur. In this condition a buffer is needed to drive the ADC. The LMP8645 has an internal output buffer
able to drive a capacitance load up to 30 pF or the input stage of an ADC. If required an external lowpass RC
filter can be added at the output of the LMP8645 to reduce the noise and the bandwidth of the current sense.
Any other filter solution that implies a capacitance connected to the RG pin is not suggested due to the high
impedance of that pin.
RS
IS
+
+IN
-IN
L
o
a
d
RIN
+
RIN
LMP8645
-
+
V
+
VA
-
RF
ADC
+
RG
VOUT
V
RGAIN
-
CF
f-3dB = 1/(2SRFCF)
Figure 7-2. LMP8645 to ADC Interface
7.3.2 Applying Input Voltage With No Supply Voltage
The full specified input common-mode voltage range may be applied to the inputs while the LMP8645 power is
off (V+ = 0 V). When the LMP8640 is powered off, the RIN resistors are disconnected internally by MOSFETS
and the leakage currents are very low (sub µA).
The 6-V input differential limit still applies, so at no time should the two inputs be more than 6-V apart. There are
also Zener clamps on the inputs to ground, so do not exceed the input limits specified in the Absolute Maximum
Ratings.
12
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7.4 Device Functional Modes
7.4.1 Selection of the Gain Resistor
For the LMP8645 and LMP8645HV, the gain is selected through an external gain set resistor connected to the
RG pin. Moreover, the gain resistor RGAIN determines the voltage of the output buffer, which is related to the
supply voltage and also to the common-mode voltage of the input signal.
7.4.2 Gain Range Limitations
The gain resistor must be chosen such that the theoretical maximum output voltage does not exceed the
LMP8645 maximum output voltage rating for a given common-mode voltage. These limits are due to the internal
amplifier bias point and the VCM headroom required to generate the required currents across the RIN and RGAIN
resistors.
The following sections explain how to select the gain resistor for various ranges of the input common-mode
voltage.
7.4.2.1 Range 1: VCM is –2 V to 1.8 V
The maximum voltage at the RG pin is given by the following inequality:
VRG = Vsense × RGAIN × Gm ≤ min (1.3 V; Vout_max)
(4)
where
•
Vout_max is the maximum allowable output voltage according to the Electrical Tables
All the gain resistors (RGAIN) values which respect the previous inequality are allowed. The graphical
representation of Figure 7-3 helps in the selection.
All the combinations (VSENSE , RGAIN) below the curve are allowed.
Rg (kÖ)
VS = 5V, VS = 12V
50
10
GAIN (V/V)
100
500
VS = 2.7V
1
5
0
100
200
300
400
500
Vsense (mV)
Figure 7-3. Allowed Gains for Range 1
As a consequence, once selected, the gain (RGAIN) and the VSENSE range is fixed, too.
For example if an application required a Gain of 10, RG will be 50 kΩ and VSENSE will be in the range 10 mV to
100 mV.
7.4.2.2 Range 2: VCM is 1.8 V to VS
In this range, the maximum voltage at the RG pin is related to the common-mode voltage and VSENSE. So all the
RGAIN resistor values which respect the following inequalities are allowed:
VRG ≤ min (Vout_max; (VCM – Vsense– 250 mV))
(5)
where
•
VRG = VSENSE * RGAIN * Gm
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•
Vout_max is the maximum allowable output voltage according to the 2.7-V Electrical Characteristics, 5-V
Electrical Characteristics, and 12-V Electrical Characteristics.
The graphical representation in Figure 7-4 helps in the selection.
All the combinations (VSENSE, RGAIN) below the curves for given VCM and supply voltage are allowed.
100
500
Vs=12V @ VCM=6V
10
50
Gain (V/V)
Rg (k:)
Vs=5V @ VCM=2.5V
Vs=2.7V @ VCM=2V
5
0
100
200
300
400
1
500
Vsense (mV)
Figure 7-4. Allowed Gains for Range 2
Also in this range, once selected, the RGAIN (Gain) and the VSENSE range is fixed too.
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7.4.2.3 Range 3: VCM is greater than VS
The maximum voltage at the RG pin is Vout_max, it means that:
VOUT = VSENSE × RGAIN / RIN ≤ Vout_max
(6)
where
•
Vout_max is the maximum allowable output voltage according to the Electrical Tables
So all the RGAIN resistors which respect the previous inequality are allowed. The graphical representation in
Figure 7-5 helps with the selection.
All the combinations (VSENSE, RGAIN) below the curves are allowed.
100
500
Rg (k:)
Vs=5V
10
50
Gain (V/V)
Vs=12V
Vs=2.7V
5
0
100
200
300
400
1
500
Vsense (mV)
Figure 7-5. Allowed Gains for Range 3
Also in this range once selected the RGAIN (Gain) the VSENSE range is fixed too.
From the ranges shown above, a good way to maximize the output voltage swing of the LMP8645 is to select
the maximum allowable RGAIN according to the previous equations. For a fixed supply voltage and VSENSE as the
common-mode voltage increases, the maximum allowable RGAIN increases too.
7.4.3 Selection of Sense Resistor
The accuracy of the current measurement highly depends on the value of the shunt resistor RS. Its value
depends on the application and it is a compromise between small-signal accuracy and maximum permissible
voltage (and power) loss in the sense resistor. High values of RS provide better accuracy at lower currents
by minimizing the effects of amplifier offset. Low values of RS minimize voltage and power loss in the supply
section, but at the expense of low current accuracy. For most applications, best performance is obtained with an
RS value that provides a full-scale shunt voltage range of 100 mV to 200 mV.
In applications where a small current is sensed, a larger value of RS is selected to minimize the error in the
proportional output voltage. Higher resistor value improves the signal-to-noise ratio (SNR) at the input of the
current sense amplifier and hence gives a more accurate output.
Similarly when high current is sensed, the power losses in RS can be significant so a smaller value of RS is
desired. In this condition it is also required to take in account also the power rating of RS resistor. The low input
offset and customizable gain of the LMP8645 allows the use of small sense resistors to reduce power dissipation
still providing a good input dynamic range. The input dynamic range is the ratio between the maximum signal
that can be measured and the minimum signal that can be detected, where usually the input offset and amplifier
noise are the principal limiting factors.
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Figure 7-6. Example of a Kelvin (4-Wire) Connection to a Two-Terminal Resistor
The amplifier inputs should be directly connected to the sense resistor pads using Kelvin or 4-wire connection
techniques. The paths of the input traces should be identical, including connectors and vias, so that these errors
will be equal and cancel.
7.4.3.1 Resistor Power Rating and Thermal Issues
The power dissipated by the sense resistor can be calculated from:
PD = IMAX 2 * RS
(7)
where
•
•
•
PD is the power dissipated by the resistor in Watts
IMAX is the maximum load current in A
RS is the sense resistor value in Ω.
The resistor must be rated for more than the expected maximum power (PD), with margin for temperature
derating. Be sure to observe any power derating curves provided by the resistor manufacturer.
Running the resistor at higher temperatures will also affect the accuracy. As the resistor heats up, the resistance
generally goes up, which will cause a change in the measurement. The sense resistor should have as much
heat-sinking as possible to remove this heat through the use of heatsinks or large copper areas coupled to the
resistor pads. A reading drifting slightly after turnon can usually be traced back to sense resistor heating.
7.4.3.2 Using PCB Trace as a Sense Resistor
While it may be tempting to use the resistance of a known area of PCB trace or copper area as a sense resistor,
TI does not recommend this for precision measurements.
The tempco of copper is typically 3300 to 4000 ppm/°K (0.33% to 0.4% per °C), which can vary with PCB
processes.
A typical surface mount sense resistor temperature coefficient (tempco) is in the 50 ppm to 500 ppm per °C
range offering more measurement consistency and accuracy over the copper trace. Special low tempco resistors
are available in a range from 0.1 ppm to 50 ppm, but at a much higher cost.
7.4.4 Sense Line Inputs
The sense lines should be connected to a point on the resistor that is not shared with the main current path,
as shown in Figure 7-6. For lowest drift, the amplifier must be mounted away from any heat generating devices,
which may include the sense resistor. The traces should be one continuous trace of copper from the sense
resistor pad to the amplifier input pin pad, and ideally on the same copper layer with minimal vias or connectors.
This can be important around the sense resistor if it is generating any significant heat gradients. Vias in the
sense lines should be formed from continuous plated copper and routing through mating connectors or headers
should be avoided. It is better to extend the sense lines than to place the amplifier in a hostile environment.
16
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To minimize noise pickup and thermal errors, the input traces should be treated like a high-speed differential
signal pair and routed tightly together with a direct path to the input pins on the same copper layer. They do
not need to be impedance matched, but should follow the same matching rules about vias, spacing and equal
lengths. The input traces should be run away from noise sources, such as digital lines, switching supplies, or
motor drive lines.
Remember that these input traces can contain high voltage (up to 76 V), and should have the appropriate trace
routing clearances to other components, traces and layers. Because the sense traces only carry the amplifier
bias current, the connecting input traces can be thin traces running close together. This can help with routing or
creating the required spacings.
Note
Due to the nature of the device topology, the positive input bias current will vary with VSENSE with an
extra current approximately equivalent to VSENSE / 5 kΩ on top of the typical 12 uA bias current.
The negative input bias current is not in the feedback path and will not change over VSENSE. High or missmatched source impedances should be avoided as this imbalance will create an additional error term over input
voltage.
7.4.4.1 Effects of Series Resistance on Sense Lines
While the sense amplifier is depicted as a conventional operational amplifier, it really is based on a currentdifferencing topology. The input stage uses precision 5-kΩ resistors internally to convert the voltage on the input
pin onto a current, so any resistance added in series with the input pins will change this resistance, and thus the
resulting current, causing an error. TI recommends that the total path resistance be less than 10 Ω and equal to
both inputs.
If a resistance is added in series with an input, the gain of that input will not track that of the other input, causing
a constant gain error.
TI does not recommend using external resistance to alter the gain, as external resistors do not have the same
thermal matching and tracking as the internal thin film resistors. Any added resistance will severely degrade the
offset and CMRR specifications.
If resistors are purposely added for filtering, resistance should be added equally to both inputs and be less than
10 Ω, and the user should be aware that the gain will change slightly.
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8 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
The LMP8645 device measures the small voltage developed across a current-sensing resistor when current
passes through it in the presence of high common-mode voltage. The gain is set by a single resistor and
buffered to a single-ended output.
8.2 Typical Applications
8.2.1 Typical Current Monitor Application
RS
IS
+
+IN
-IN
RIN
+
LMP8645
RIN
ACTIVE
DEVICE
+
V
+
VA
ADC
VOUT
+
-
V
RG
Figure 8-1. LMP8645 in Current Monitor Application
8.2.1.1 Design Requirements
In this example, the LMP8645 is used to monitor the supply current of an active device (Refer to Figure 8-1). The
LMP8645 supply voltage is 5 V and the active device is supplied with 12 V. The maximum load current is 1 A.
The LMP8645 will operate in all 3 ranges: in Range 1 when turning on the power of the active device (rising from
0 V to 12 V), while briefly passing through Range 2 as the load supply rises, and finally into Range 3 for normal
load operation.
Because the purpose of the application is monitor the current of the active device in any operating condition
(power on, normal operation, fault, and so forth), the gain resistor will be selected according to Range 1, the
range that puts the most constraints to the maximum output voltage swing of the LMP8645.
8.2.1.2 Detailed Design Procedure
At the start-up of the monitored device, the LMP8645 works at a common-mode voltage of 0 V, which means
that the maximum output limit is 1.3 V (Range 1). To maximize the resolution, the RSENSE value is calculated as
maximum allowed VSENSE (Refer to Figure 7-3) divided by maximum current (1 A), so RSENSE=0.5 Ω.
Due to the output limitation at low common-mode voltage, the maximum allowed gain will be 2.6 V/V, which
corresponds to RGAIN = 13 kΩ. With this approach the current is monitored correctly at any working condition,
but does not use the full output swing range of the LMP8645.
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Alternatively if the monitored device doesn’t sink the full 1 A at any supply voltage, it is possible to design with
the full maximum output voltage of the LMP8645 when operating in Range 3 ( VCM ≥ VS ).
Also in this case it is possible to maximize the resolution using Rsense = 0.5 Ω, and maximize the output
dynamic range with RGAIN=33 kΩ. With this approach the maximum detectable current, when VCM is less than
1.8 V, is about 400 mA. While for common-mode voltages of less than 2.5 V the maximum detectable current
is 600 mA (Refer to Figure 7-3), and for common-mode voltages at or above the LMP8645 supply voltage, the
maximum current is 1 A.
The second approach maximizes the output dynamic but implies some knowledge on the monitored current.
8.2.1.3 Application Curves
Figure 8-2 shows the resulting circuit voltages with the input load swept from 0 A to 1 A, with RGAIN= 13 kΩ for
operation in Range 1 (preferring accuracy over all load operating conditions).
Also shown in Figure 8-3 is the resulting output voltage with RGAIN = 33 kΩ for operation in Range 3 (sacrificing
low load supply accuracy while optimizing overall resolution at normal load operating conditions).
3.5
RG = 33k
Range 3
3.0
Vsense (V)
2.5
Output Voltage (V)
Output Voltage (V)
3.0
3.5
Output Voltage (V)
RG = 13k
Range 1
2.0
1.5
1.0
0.5
2.5
2.0
1.5
Output Voltage (V)
1.0
Vsense (V)
0.5
0.0
0.0
0.0
0.1
0.2
0.3
0.4
0.5
0.6
Load Current (A)
0.7
0.8
0.9
1.0
0.0
0.1
0.2
0.3
0.4
0.5
0.6
Load Current (A)
C002
0.7
0.8
0.9
1.0
C001
Figure 8-2. Resulting Input and Output Voltages vs Figure 8-3. Resulting Input and Output Voltages vs
Load Current for Range 1
Load Current For Range 3
8.2.2 High Brightness LED Driver
The LMP8645 is the right choice in applications which require high-side current sense, such as High Brightness
LED for automotive where the cathode of the LED must be connected to the ground (chassis) of the car. In
Figure 8-4, the LMP8645 is used to monitor the current High Side in a high brightness LED together with a
LM3406 constant current buck regulator LED driver.
L
VIN
RS
IF
SW
+IN
LM3406HV
Constant Current
Buck Regulator
-IN
HB/HP
(3W-25W)
RIN LMP8645HV
RIN
VCC
+
CS
-
+
V
IF = 200 mV/(RS*Gain)
Gain = RGAIN*Gm
-
VOUT
+
-
RG
V
RGAIN
Figure 8-4. High-Side Current Sensing in Driving HP/HB LED
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Even though LMP8645 will work in all 3 Ranges, RGAIN will be calculated according to Range 3 because the
purpose is regulating the current in the LEDs when the external MOSFET is OFF (LMP8645 at high VCM).
Even if this approach makes the LMP8645 able to sense high peak current only in Range 3 where the dynamic
output is higher than Range 1 the current resolution is maximized. At each switch ON/OFF of the MOSFET the
LMP8645 goes from Range 1 (MOSFET ON, string of LED OFF), to Range 3 (MOSFET OFF, string of LED
ON) passing through Range 2 (MOSFET OFF, string of LED OFF). Because the purpose of the application is to
sense the current with high precision when the LED string is ON, the RGAIN will be calculated according to the
Range 3.
The LMP8645 supply voltage is supplied by the internal LDO of the LM3406 thorough the pin VCC. The LM340x
is expecting a 200-mV feedback signal at the current sense (SNS) pin. The LMP8645 must provide this 200 mV
at the determined current limit.
The current which flows through the LED is programmed according to Equation 8:
IF = VCS / (RS × Gain)
(8)
where:
•
•
Gain = RGAIN × Gm
VCS = 200 mV
In this application the current which flows in the HB LED is in the Range from 350 mA to 1 A, so to reduce the
power dissipation on the shunt resistor and have a good accuracy, the RS must be in the range from 50 mΩ and
200 mΩ. In Table 8-1, two examples are analyzed.
To summarize, calculate the RGAIN according to the range of operation in which the application mainly works.
Once selected, the range considers the more stringent constraint
Table 8-1. Comparison of Two Ranges
IF=350 mA
IF=1 A
RGAIN
40 kΩ
36 kΩ
RS
77 mΩ
27 mΩ
Dissipated Power
9.5 mW
27 mW
Total Accuracy
≊5%
≊5%
9 Power Supply Recommendations
To decouple the LMP8645 from AC noise on the power supply, TI recommends using a 0.1-μF bypass capacitor
between the VS and GND pins. This capacitor must be placed as close as possible to the supply pins. In some
cases, an additional 10-μF bypass capacitor may further reduce the supply noise.
20
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10 Layout
10.1 Layout Guidelines
The traces leading to and from the sense resistor can be significant error sources. With small value sense
resistors (< 100 mΩ), any trace resistance shared with the load current can cause significant errors.
The amplifier inputs should be directly connected to the sense resistor pads using Kelvin or 4-wire connection
techniques. The traces should be one continuous piece of copper from the sense resistor pad to the amplifier
input pin pad, and ideally on the same copper layer with minimal vias or connectors. This can be important
around the sense resistor if it is generating any significant heat gradients.
To minimize noise pick-up and thermal errors, the input traces should be treated like a differential signal pair and
routed tightly together with a direct path to the input pins (preferably on the same copper layer). The input traces
should be run away from noise sources, such as digital lines, switching supplies or motor drive lines.
Ensure that the sense traces have the appropriate trace routing clearances for the expected load supply
voltages.
Because the sense traces only carry the amplifier bias current, the connecting input traces can be thinner, signal
level traces. Excessive Resistance in the trace should also be avoided.
The paths of the traces should be identical, including connectors and vias, so that any errors will be equal and
cancel.
The sense resistor will heat up as the load increases. As the resistor heats up, the resistance generally goes up,
which will cause a change in the readings. The sense resistor should have as much heatsinking as possible to
remove this heat through the use of heatsinks or large copper areas coupled to the resistor pads.
The gain set resistor pin is a sensitive node and can pick up noise. Keep the gain set resistor close to the RG pin
and minimize RGAIN trace length. Connect the grounded end of RGAIN directly to the LMP8645 ground pin.
10.2 Layout Example
Figure 10-1. Layout Example
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
LMP8645 TINA SPICE Model, SNOM087
TINA-TI SPICE-Based Analog Simulation Program, http://www.ti.com/tool/tina-ti
Evaluation Board for the LMP8645, http://www.ti.com/tool/lmp8645mkeval
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation, see the following:
AN-1975 LMP8640 / LMP8645 Evaluation Board User Guide, SNOA546
11.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
11.4 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.5 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
11.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.7 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LMP8645HVMK/NOPB
ACTIVE
SOT-23-THIN
DDC
6
1000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AK6A
LMP8645HVMKE/NOPB
ACTIVE
SOT-23-THIN
DDC
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AK6A
LMP8645HVMKX/NOPB
ACTIVE
SOT-23-THIN
DDC
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AK6A
LMP8645MK/NOPB
ACTIVE
SOT-23-THIN
DDC
6
1000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AJ6A
LMP8645MKE/NOPB
ACTIVE
SOT-23-THIN
DDC
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AJ6A
LMP8645MKX/NOPB
ACTIVE
SOT-23-THIN
DDC
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AJ6A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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