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LMP93601
SNAS633A – MARCH 2014 – REVISED SEPTEMBER 2014
LMP93601 Low-Noise, High Gain, 3-Channel AFE for Thermopile Sensors
1 Features
3 Description
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The LMP93601 is an optimized Analog-Front-End
(AFE) for occupancy detecting thermopile arrays up
to 16 x 16 and thermopile mass flow sensors. The
AFE combines excellent noise performance, low
offset voltage, high gain, and low-power consumption
at sampling rates ideal for monitoring thermopile
sensors.
High Gain, Programmable up to 4096
Low Gain Error Drift, 10 * RSx).
34
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SNAS633A – MARCH 2014 – REVISED SEPTEMBER 2014
Typical Applications (continued)
The bias current of the sensor and the leakage current of the sensor’s MUX should be considered as well. In
Figure 31 R1 and R2 need to be matched closely to avoid introduction of differential offset error voltage in the
signal path due to mismatched current flow through these resistors. Moreover, Ios through RSx needs to be
calibrated out over temperature. To simplify the circuit in Figure 31 the MUX inside the AFE is not shown.
Figure 31.
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LMP93601
SNAS633A – MARCH 2014 – REVISED SEPTEMBER 2014
www.ti.com
10 Power Supply Recommendations
The LMP93601 requires two sources of power, AVDD and IOVDD. These pins can be supplied from the
same supply rail as the MCU, from separate regulators or from a battery source. However, it is recommend
that the MCU and the IOVDD share the same supply and the AVDD be supplied from a separate regulator.
In any case, for proper operation, the supply range must remain within the 2.7 V to 5.5 V limits and IOVDD
must always be lower than or equal to AVDD supply. It is highly recommended that during power up, the
AVDD and IOVDD supplies ramp up in a manner to ensure the "IOVDD ≤ AVDD" requirement is not violated.
11 Layout
11.1 Layout Guidelines
To achieve high noise performance of the LMP93601, particular attention must be paid to the layout of the input
signals, inputs INPx and INNx. To avoid introduction of differential noise into the pins, the input traces must lay
out symmetrically.
Proper power-supply decoupling is required on both AVDD and IOVDD. The Supply pins should be decoupled
with at least a 0.1 μF bypass capacitor each. The bypass capacitors should be placed as close to the powersupply pins as possible with a low impedance connection. For very sensitive systems, or for systems in harsh
noise environments, avoiding the use of vias for connecting the bypass capacitor may offer superior bypass and
noise immunity.
It is recommended that in the layout, analog components [such as ADCs, amplifiers, references, digital-to-analog
converters (DACs), and analog MUXs] be separated from digital components [such as microcontrollers, complex
programmable logic devices (CPLDs), field-programmable gate arrays (FPGAs), radio frequency (RF)
transceivers, universal serial bus (USB) transceivers, and switching regulators]. The best placement for each
application is unique to the geometries, components, and PCB fabrication capabilities employed. That is, there is
no single layout that is perfect for every design and careful consideration must always be used when designing
with any analog component.
TI recommends placing 47 Ω resistors in series with all digital input and output pins (CS, SCLK, DIN,
DOUT/DRDY, and DRDY). This resistance smooths sharp transitions, suppresses overshoot, and offers some
overvoltage protection. Care must be taken to still meet all SPI timing requirements because the additional
resistors interact with the bus capacitances present on the digital signal lines.
TI also strongly recommends that digital components, especially RF portions, be kept as far as practically
possible from analog circuitry in a given system. Additionally, one should minimize the distance that digital
control traces run through analog areas and avoid placing these traces near sensitive analog components. Digital
return currents usually flow through a ground path that is as close as possible to the digital path. If a solid ground
connection to a plane is not available, these currents may find paths back to the source that interfere with analog
performance. The implications that layout has on the temperature-sensing functions are much more significant
than for ADC functions.
The internal ADC reference supply of the LMP93601 requires a 1 µF high performance (low ESR & ESL) cap on
the XCAP1. This cap must be placed in the immediate proximity of the pin. For best performance it is
recommended that the DAP be connected to AGND. All three "GND" connections (AGND, DGND, and IOGND)
must be connected to system ground and cannot be left floating.
36
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SNAS633A – MARCH 2014 – REVISED SEPTEMBER 2014
11.2 Layout Example
XCAP1
$VHFWLRQRI3&%¶V
GND Plain
XCAP2
AVDD Filter CAP
AGND
DGND
CAP to be placed in close
proximity of XCAP1 pin
Symmetrical input
signal traces
IO GND
AGND
Digital signal Edge
Smoothing Resistor
Grounded DAP
Figure 32. LMP93601 Layout Example
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LMP93601
SNAS633A – MARCH 2014 – REVISED SEPTEMBER 2014
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12 Device and Documentation Support
12.1 Trademarks
All trademarks are the property of their respective owners.
12.2 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designed devices. This data is subject to change without notice and revision of this
document. For browser-based versions of this data sheet, refer to the left-hand navigation.
38
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
LMP93601NHZR
ACTIVE
WQFN
NHZ
24
4500
RoHS & Green
SN
Level-1-260C-UNLIM
-25 to 85
L93601
LMP93601NHZT
ACTIVE
WQFN
NHZ
24
250
RoHS & Green
SN
Level-1-260C-UNLIM
-25 to 85
L93601
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
