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LMR12007 薄型小外形尺寸晶体管封装 (SOT)23 750mA 负载降压直流-直
直
流稳压器
查询样品: LMR12007
特性
说明
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薄型 SOT-6 封装
3.0V 至 18V 输入电压范围
1.25V 至 16V 的输出电压范围
750mA 输出电流
550kHz (LMR12007Y) 和 1.6MHz (LMR12007X)
开关频率
350mΩ NMOS 开关
30nA 关断电流
1.25V，
，2% 内部电压基准
内部软启动
电流模式，脉宽调制 (PWM) 运行
WEBENCH® 在线设计工具
热关断
应用范围
•
•
•
•
•
•
•
本地负载点稳压
硬盘内的核心电源
机顶盒
电池供电类器件
USB 供电类器件
DSL 调制解调器
笔记本电脑
LMR12007 稳压器是一款采用 6 引脚薄型 SOT 封装
的单片，高频，PWM 降压直流/直流转换器。 它提供
全部的激活功能，以便在尽可能小的印刷电路板面积内
提供具有快速瞬态响应和准确调节的本地直流/直流转
换。
借助于最少的外部组件和由 WEBENCH®支持的在线设
计工具，LMR12007 易于使用。 使用业界领先的
0.5µm 双极 CMOS (BiCMOS) 技术的内部 350mΩ
NMOS 开关对 750mA 负载的驱动能力可获得最佳的
可用功率密度。 世界级控制电路可实现低至 13ns 的
接通时间，从而在整个 3V 至 18V 输入工作范围内支
持低至 1.25V 的最小输出电压的出色高频转换。 开关
频率在内部设置为 550kHz (LMR12007Y) 或 1.6MHz
(LMR12007X)，允许使用极小型表面贴装电感器和芯
片电容器。 尽管工作频率很高，但仍可以轻松实现高
达 90% 的效率。 包括外部关断，特有 30nA 的超低待
机电流。 LM12007 利用电流模式控制和内部补偿，以
便在广泛的运行条件下提供高性能稳压。 额外特性包
括用来减少涌入电流的内部软启动电路、逐脉冲电流限
值、热关断和输出过压保护。
Typical Application Circuit
Efficiency vs Load Current "X"
VIN = 5V, VOUT = 3.3V
D2
VIN
BOOST
VIN
C3
C1
L1
SW
ON
VOUT
D1
EN
C2
R1
OFF
FB
GND
R2
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
WEBENCH is a registered trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated
English Data Sheet: SNVS982
LMR12007
ZHCSBI7 – SEPTEMBER 2013
www.ti.com.cn
Connection Diagram
BOOST
1
6
SW
1
6
GND
2
5
VIN
2
5
FB
3
4
EN
3
4
Figure 1. 6-Lead SOT
See Package Number DDC (R-PDSO-G6)
Figure 2. Pin 1 Indentification
PIN DESCRIPTIONS
Pin
Name
1
BOOST
Function
2
GND
3
FB
Feedback pin. Connect FB to the external resistor divider to set output voltage.
4
EN
Enable control input. Logic high enables operation. Do not allow this pin to float or be greater than VIN + 0.3V.
5
VIN
Input supply voltage. Connect a bypass capacitor to this pin.
6
SW
Output switch. Connects to the inductor, catch diode, and bootstrap capacitor.
Boost voltage that drives the internal NMOS control switch. A bootstrap capacitor is connected between the
BOOST and SW pins.
Signal and Power ground pin. Place the bottom resistor of the feedback network as close as possible to this pin
for accurate regulation.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1)
VIN
-0.5V to 22V
SW Voltage
-0.5V to 22V
Boost Voltage
-0.5V to 28V
Boost to SW Voltage
-0.5V to 6.0V
FB Voltage
-0.5V to 3.0V
EN Voltage
-0.5V to (VIN + 0.3V)
Junction Temperature
150°C
ESD Susceptibility (2)
2kV
Storage Temp. Range
Soldering Information
(1)
(2)
2
-65°C to 150°C
Infrared/Convection Reflow (15sec)
220°C
Wave Soldering Lead Temp. (10sec)
260°C
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
Human body model, 1.5kΩ in series with 100pF.
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LMR12007
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ZHCSBI7 – SEPTEMBER 2013
Operating Ratings (1)
VIN
3V to 18V
SW Voltage
-0.5V to 18V
Boost Voltage
-0.5V to 23V
Boost to SW Voltage
1.6V to 5.5V
−40°C to +125°C
Junction Temperature Range
Thermal Resistance θJA (2)
(1)
(2)
118°C/W
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For specific specifications and the test conditions,
see Electrical Characteristics.
Thermal shutdown will occur if the junction temperature exceeds 165°C. The maximum power dissipation is a function of TJ(MAX) , θJA
and TA . The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/θJA . All numbers apply for
packages soldered directly onto a 3” x 3” PC board with 2oz. copper on 4 layers in still air. For a 2 layer board using 1 oz. copper in still
air, θJA = 204°C/W.
Electrical Characteristics
Specifications with standard typeface are for TJ = 25°C, and those in boldface type apply over the full Operating
Temperature Range (TJ = -40°C to 125°C). VIN = 5V, VBOOST - VSW = 5V unless otherwise specified. Datasheet min/max
specification limits are ensured by design, test, or statistical analysis.
Symbol
VFB
ΔVFB/ΔVIN
IFB
UVLO
Parameter
Conditions
Feedback Voltage
Feedback Voltage Line Regulation
VIN = 3V to 18V
Feedback Input Bias Current
Sink/Source
Undervoltage Lockout
VIN Rising
Undervoltage Lockout
VIN Falling
UVLO Hysteresis
FSW
Switching Frequency
DMAX
Maximum Duty Cycle
DMIN
Minimum Duty Cycle
RDS(ON)
Typ (2)
Max (1)
Units
1.225
1.250
1.275
V
0.01
%/V
10
250
2.74
2.90
2.0
2.3
0.30
0.44
LMR12007X
1.2
1.6
1.9
LMR12007Y
0.40
0.55
0.66
LMR12007X
85
92
LMR12007Y
90
96
LMR12007X
2
LMR12007Y
1
0.62
%
VBOOST - VSW = 3V
Switch Current Limit
VBOOST - VSW = 3V
IQ
Quiescent Current
Switching
Quiescent Current (shutdown)
VEN = 0V
30
LMR12007X (50% Duty Cycle)
2.2
3.3
LMR12007Y (50% Duty Cycle)
0.9
1.6
Boost Pin Current
Shutdown Threshold Voltage
VEN Falling
Enable Threshold Voltage
VEN Rising
IEN
Enable Pin Current
Sink/Source
ISW
Switch Leakage
VEN_TH
MHz
%
Switch ON Resistance
1.0
nA
V
ICL
IBOOST
(1)
(2)
Min (1)
350
650
1.5
2.3
A
1.5
2.5
mA
nA
0.4
1.8
mΩ
mA
V
10
nA
40
nA
Specified to Texas Instruments' Average Outgoing Quality Level (AOQL).
Typicals represent the most likely parametric norm.
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Typical Performance Characteristics
All curves taken at VIN = 5V, VBOOST - VSW = 5V, L1 = 4.7 µH ("X"), L1 = 10 µH ("Y"), and TA = 25°C, unless specified
otherwise.
4
Efficiency vs Load Current - "X" VOUT = 5V
Efficiency vs Load Current - "Y" VOUT = 5V
Figure 3.
Figure 4.
Efficiency vs Load Current - "X" VOUT = 3.3V
Efficiency vs Load Current - "Y" VOUT = 3.3V
Figure 5.
Figure 6.
Efficiency vs Load Current - "X" VOUT = 1.5V
Efficiency vs Load Current - "Y" VOUT = 1.5V
Figure 7.
Figure 8.
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LMR12007
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ZHCSBI7 – SEPTEMBER 2013
Typical Performance Characteristics (continued)
All curves taken at VIN = 5V, VBOOST - VSW = 5V, L1 = 4.7 µH ("X"), L1 = 10 µH ("Y"), and TA = 25°C, unless specified
otherwise.
Oscillator Frequency vs Temperature - "X"
Oscillator Frequency vs Temperature - "Y"
Figure 9.
Figure 10.
Current Limit vs Temperature VIN = 18V, VIN = 5V
VFB vs Temperature
Figure 11.
Figure 12.
RDSON vs Temperature
IQ Switching vs Temperature
Figure 13.
Figure 14.
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Typical Performance Characteristics (continued)
All curves taken at VIN = 5V, VBOOST - VSW = 5V, L1 = 4.7 µH ("X"), L1 = 10 µH ("Y"), and TA = 25°C, unless specified
otherwise.
6
Line Regulation - "X" VOUT = 1.5V, IOUT = 500mA
Line Regulation - "Y" VOUT = 1.5V, IOUT = 500mA
Figure 15.
Figure 16.
Line Regulation - "X" VOUT = 3.3V, IOUT = 500mA
Line Regulation - "Y" VOUT = 3.3V, IOUT = 500mA
Figure 17.
Figure 18.
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LMR12007
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ZHCSBI7 – SEPTEMBER 2013
Block Diagram
VIN
VIN
Current-Sense Amplifier
OFF
EN
Internal
Regulator
and
Enable
Circuit
RSENSE
+
-
CIN
D2
Thermal
Shutdown
BOOST
VBOOST
Under
Voltage
Lockout
Current
Limit
Oscillator
Output
Control
Logic
Reset
Pulse
+
ISENSE
+
+
Corrective Ramp
0.3:
Switch
Driver
SW
OVP
Comparator
-
ON
Error
Signal
D
1
+
PWM
Comparator
CBOOST
VSW L
IL
VOUT
COUT
1.375V
+
-
R1
FB
Internal
Compensation
+
Error Amplifier
+
-
VREF
1.25V
R2
GND
Figure 19.
APPLICATION INFORMATION
THEORY OF OPERATION
The LMR12007 is a constant frequency PWM buck regulator IC that delivers a 750mA load current. The
regulator has a preset switching frequency of either 550kHz (LMR12007Y) or 1.6MHz (LMR12007X). These high
frequencies allow the LMR12007 to operate with small surface mount capacitors and inductors, resulting in
DC/DC converters that require a minimum amount of board space. The LMR12007 is internally compensated, so
it is simple to use, and requires few external components. The LMR12007 uses current-mode control to regulate
the output voltage.
The following operating description of the LMR12007 will refer to the Simplified Block Diagram (Figure 19) and to
the waveforms in Figure 20. The LMR12007 supplies a regulated output voltage by switching the internal NMOS
control switch at constant frequency and variable duty cycle. A switching cycle begins at the falling edge of the
reset pulse generated by the internal oscillator. When this pulse goes low, the output control logic turns on the
internal NMOS control switch. During this on-time, the SW pin voltage (VSW) swings up to approximately VIN, and
the inductor current (IL) increases with a linear slope. IL is measured by the current-sense amplifier, which
generates an output proportional to the switch current. The sense signal is summed with the regulator’s
corrective ramp and compared to the error amplifier’s output, which is proportional to the difference between the
feedback voltage and VREF. When the PWM comparator output goes high, the output switch turns off until the
next switching cycle begins. During the switch off-time, inductor current discharges through Schottky diode D1,
which forces the SW pin to swing below ground by the forward voltage (VD) of the catch diode. The regulator
loop adjusts the duty cycle (D) to maintain a constant output voltage.
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VSW
D = TON/TSW
VIN
SW
Voltage
TOFF
TON
0
VD
t
TSW
IL
IPK
Inductor
Current
t
0
Figure 20. LMR12007 Waveforms of SW Pin Voltage and Inductor Current
BOOST FUNCTION
Capacitor CBOOST and diode D2 in Figure 21 are used to generate a voltage VBOOST. VBOOST - VSW is the gate
drive voltage to the internal NMOS control switch. To properly drive the internal NMOS switch during its on-time,
VBOOST needs to be at least 1.6V greater than VSW. Although the LMR12007 will operate with this minimum
voltage, it may not have sufficient gate drive to supply large values of output current. Therefore, it is
recommended that VBOOST be greater than 2.5V above VSW for best efficiency. VBOOST – VSW should not exceed
the maximum operating limit of 5.5V.
5.5V > VBOOST – VSW > 2.5V for best performance.
VBOOST
D2
BOOST
VIN
VIN
CIN
CBOOST
L
SW
VOUT
GND
D1
COUT
Figure 21. VOUT Charges CBOOST
When the LMR12007 starts up, internal circuitry from the BOOST pin supplies a maximum of 20mA to CBOOST.
This current charges CBOOST to a voltage sufficient to turn the switch on. The BOOST pin will continue to source
current to CBOOST until the voltage at the feedback pin is greater than 1.18V.
There are various methods to derive VBOOST:
1. From the input voltage (VIN)
2. From the output voltage (VOUT)
3. From an external distributed voltage rail (VEXT)
4. From a shunt or series zener diode
In the Simplifed Block Diagram of Figure 19, capacitor CBOOST and diode D2 supply the gate-drive current for the
NMOS switch. Capacitor CBOOST is charged via diode D2 by VIN. During a normal switching cycle, when the
internal NMOS control switch is off (TOFF) (refer to Figure 20), VBOOST equals VIN minus the forward voltage of D2
(VFD2), during which the current in the inductor (L) forward biases the Schottky diode D1 (VFD1). Therefore the
voltage stored across CBOOST is
VBOOST - VSW = VIN - VFD2 + VFD1
8
(1)
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When the NMOS switch turns on (TON), the switch pin rises to
VSW = VIN – (RDSON x IL),
(2)
forcing VBOOST to rise thus reverse biasing D2. The voltage at VBOOST is then
VBOOST = 2VIN – (RDSON x IL) – VFD2 + VFD1
(3)
which is approximately
2VIN - 0.4V
(4)
for many applications. Thus the gate-drive voltage of the NMOS switch is approximately
VIN - 0.2V
(5)
An alternate method for charging CBOOST is to connect D2 to the output as shown in Figure 21. The output
voltage should be between 2.5V and 5.5V, so that proper gate voltage will be applied to the internal switch. In
this circuit, CBOOST provides a gate drive voltage that is slightly less than VOUT.
In applications where both VIN and VOUT are greater than 5.5V, or less than 3V, CBOOST cannot be charged
directly from these voltages. If VIN and VOUT are greater than 5.5V, CBOOST can be charged from VIN or VOUT
minus a zener voltage by placing a zener diode D3 in series with D2, as shown in Figure 22. When using a
series zener diode from the input, ensure that the regulation of the input supply doesn’t create a voltage that falls
outside the recommended VBOOST voltage.
(VINMAX – VD3) < 5.5V
(VINMIN – VD3) > 1.6V
D2
D3
VIN
VIN
BOOST
VBOOST
CBOOST
CIN
L
GND
VOUT
SW
D1
COUT
Figure 22. Zener Reduces Boost Voltage from VIN
An alternative method is to place the zener diode D3 in a shunt configuration as shown in Figure 23. A small
350mW to 500mW 5.1V zener in a SOT or SOD package can be used for this purpose. A small ceramic
capacitor such as a 6.3V, 0.1µF capacitor (C4) should be placed in parallel with the zener diode. When the
internal NMOS switch turns on, a pulse of current is drawn to charge the internal NMOS gate capacitance. The
0.1 µF parallel shunt capacitor ensures that the VBOOST voltage is maintained during this time.
Resistor R3 should be chosen to provide enough RMS current to the zener diode (D3) and to the BOOST pin. A
recommended choice for the zener current (IZENER) is 1 mA. The current IBOOST into the BOOST pin supplies the
gate current of the NMOS control switch and varies typically according to the following formula for the X version:
IBOOST = 0.49 x (D + 0.54) x (VZENER – VD2) mA
(6)
IBOOST can be calculated for the Y version using the following:
IBOOST = 0.20 x (D + 0.54) x (VZENER - VD2) µA
(7)
where D is the duty cycle, VZENER and VD2 are in volts, and IBOOST is in milliamps. VZENER is the voltage applied to
the anode of the boost diode (D2), and VD2 is the average forward voltage across D2. Note that this formula for
IBOOST gives typical current. For the worst case IBOOST, increase the current by 40%. In that case, the worst case
boost current will be
IBOOST-MAX = 1.4 x IBOOST
(8)
R3 will then be given by
R3 = (VIN - VZENER) / (1.4 x IBOOST + IZENER)
(9)
For example, using the X-version let VIN = 10V, VZENER = 5V, VD2 = 0.7V, IZENER = 1mA, and duty cycle D = 50%.
Then
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IBOOST = 0.49 x (0.5 + 0.54) x (5 - 0.7) mA = 2.19mA
R3 = (10V - 5V) / (1.4 x 2.19mA + 1mA) = 1.23kΩ
(10)
(11)
VZ
C4
D2
D3
R3
VIN
BOOST
VIN
VBOOST
CBOOST
CIN
L
VOUT
SW
GND
D1
COUT
Figure 23. Boost Voltage Supplied from the Shunt Zener on VIN
ENABLE PIN / SHUTDOWN MODE
The LMR12007 has a shutdown mode that is controlled by the enable pin (EN). When a logic low voltage is
applied to EN, the part is in shutdown mode and its quiescent current drops to typically 30nA. Switch leakage
adds another 40nA from the input supply. The voltage at this pin should never exceed VIN + 0.3V.
SOFT-START
This function forces VOUT to increase at a controlled rate during start up. During soft-start, the error amplifier’s
reference voltage ramps from 0V to its nominal value of 1.25V in approximately 200µs. This forces the regulator
output to ramp up in a more linear and controlled fashion, which helps reduce inrush current.
OUTPUT OVERVOLTAGE PROTECTION
The overvoltage comparator compares the FB pin voltage to a voltage that is 10% higher than the internal
reference Vref. Once the FB pin voltage goes 10% above the internal reference, the internal NMOS control
switch is turned off, which allows the output voltage to decrease toward regulation.
UNDERVOLTAGE LOCKOUT
Undervoltage lockout (UVLO) prevents the LMR12007 from operating until the input voltage exceeds 2.74V(typ).
The UVLO threshold has approximately 440mV of hysteresis, so the part will operate until VIN drops below
2.3V(typ). Hysteresis prevents the part from turning off during power up if VIN is non-monotonic.
CURRENT LIMIT
The LMR12007 uses cycle-by-cycle current limiting to protect the output switch. During each switching cycle, a
current limit comparator detects if the output switch current exceeds 1.5A (typ), and turns off the switch until the
next switching cycle begins.
THERMAL SHUTDOWN
Thermal shutdown limits total power dissipation by turning off the output switch when the IC junction temperature
exceeds 165°C. After thermal shutdown occurs, the output switch doesn’t turn on until the junction temperature
drops to approximately 150°C.
10
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Design Guide
INDUCTOR SELECTION
The Duty Cycle (D) can be approximated quickly using the ratio of output voltage (VO) to input voltage (VIN):
VO
D=
VIN
(12)
The catch diode (D1) forward voltage drop and the voltage drop across the internal NMOS must be included to
calculate a more accurate duty cycle. Calculate D by using the following formula:
VO + VD
D=
VIN + VD - VSW
(13)
VSW can be approximated by:
VSW = IO x RDS(ON)
(14)
The diode forward drop (VD) can range from 0.3V to 0.7V depending on the quality of the diode. The lower VD is,
the higher the operating efficiency of the converter.
The inductor value determines the output ripple current. Lower inductor values decrease the size of the inductor,
but increase the output ripple current. An increase in the inductor value will decrease the output ripple current.
The ratio of ripple current (ΔiL) to output current (IO) is optimized when it is set between 0.3 and 0.4 at 750mA.
The ratio r is defined as:
r=
'iL
lO
(15)
One must also ensure that the minimum current limit (1.0A) is not exceeded, so the peak current in the inductor
must be calculated. The peak current (ILPK) in the inductor is calculated by:
ILPK = IO + ΔIL/2
(16)
If r = 0.7 at an output of 750mA, the peak current in the inductor will be 1.0125A. The minimum ensured current
limit over all operating conditions is 1.0A. One can either reduce r to 0.6 resulting in a 975mA peak current, or
make the engineering judgement that 12.5mA over will be safe enough with a 1.5A typical current limit and 6
sigma limits. When the designed maximum output current is reduced, the ratio r can be increased. At a current of
0.1A, r can be made as high as 0.9. The ripple ratio can be increased at lighter loads because the net ripple is
actually quite low, and if r remains constant the inductor value can be made quite large. An equation empirically
developed for the maximum ripple ratio at any current below 2A is:
r = 0.387 x IOUT-0.3667
(17)
Note that this is just a guideline.
The LMR12007 operates at frequencies allowing the use of ceramic output capacitors without compromising
transient response. Ceramic capacitors allow higher inductor ripple without significantly increasing output ripple.
See the OUTPUT CAPACITOR section for more details on calculating output voltage ripple.
Now that the ripple current or ripple ratio is determined, the inductance is calculated by:
L=
VO + VD
IO x r x fS
x (1-D)
(18)
where fs is the switching frequency and IO is the output current. When selecting an inductor, make sure that it is
capable of supporting the peak output current without saturating. Inductor saturation will result in a sudden
reduction in inductance and prevent the regulator from operating correctly. Because of the speed of the internal
current limit, the peak current of the inductor need only be specified for the required maximum output current. For
example, if the designed maximum output current is 0.5A and the peak current is 0.7A, then the inductor should
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be specified with a saturation current limit of >0.7A. There is no need to specify the saturation or peak current of
the inductor at the 1.5A typical switch current limit. The difference in inductor size is a factor of 5. Because of the
operating frequency of the LMR12007, ferrite based inductors are preferred to minimize core losses. This
presents little restriction since the variety of ferrite based inductors is huge. Lastly, inductors with lower series
resistance (DCR) will provide better operating efficiency. For recommended inductors see Example Circuits.
INPUT CAPACITOR
An input capacitor is necessary to ensure that VIN does not drop excessively during switching transients. The
primary specifications of the input capacitor are capacitance, voltage, RMS current rating, and ESL (Equivalent
Series Inductance). The recommended input capacitance is 10µF, although 4.7µF works well for input voltages
below 6V. The input voltage rating is specifically stated by the capacitor manufacturer. Make sure to check any
recommended deratings and also verify if there is any significant change in capacitance at the operating input
voltage and the operating temperature. The input capacitor maximum RMS input current rating (IRMS-IN) must be
greater than:
IRMS-IN = IO x
r2
D x 1-D +
12
(19)
It can be shown from the above equation that maximum RMS capacitor current occurs when D = 0.5. Always
calculate the RMS at the point where the duty cycle, D, is closest to 0.5. The ESL of an input capacitor is usually
determined by the effective cross sectional area of the current path. A large leaded capacitor will have high ESL
and a 0805 ceramic chip capacitor will have very low ESL. At the operating frequencies of the LMR12007,
certain capacitors may have an ESL so large that the resulting impedance (2πfL) will be higher than that required
to provide stable operation. As a result, surface mount capacitors are strongly recommended. Sanyo POSCAP,
Tantalum or Niobium, Panasonic SP or Cornell Dubilier ESR, and multilayer ceramic capacitors (MLCC) are all
good choices for both input and output capacitors and have very low ESL. For MLCCs it is recommended to use
X7R or X5R dielectrics. Consult capacitor manufacturer datasheet to see how rated capacitance varies over
operating conditions.
OUTPUT CAPACITOR
The output capacitor is selected based upon the desired output ripple and transient response. The initial current
of a load transient is provided mainly by the output capacitor. The output ripple of the converter is:
'VO = 'iL x (RESR +
1
)
8 x fS x CO
(20)
When using MLCCs, the ESR is typically so low that the capacitive ripple may dominate. When this occurs, the
output ripple will be approximately sinusoidal and 90° phase shifted from the switching action. Given the
availability and quality of MLCCs and the expected output voltage of designs using the LMR12007, there is really
no need to review any other capacitor technologies. Another benefit of ceramic capacitors is their ability to
bypass high frequency noise. A certain amount of switching edge noise will couple through parasitic
capacitances in the inductor to the output. A ceramic capacitor will bypass this noise while a tantalum will not.
Since the output capacitor is one of the two external components that control the stability of the regulator control
loop, most applications will require a minimum at 10 µF of output capacitance. Capacitance can be increased
significantly with little detriment to the regulator stability. Like the input capacitor, recommended multilayer
ceramic capacitors are X7R or X5R. Again, verify actual capacitance at the desired operating voltage and
temperature.
Check the RMS current rating of the capacitor. The RMS current rating of the capacitor chosen must also meet
the following condition:
IRMS-OUT = IO x
12
r
12
(21)
Copyright © 2013, Texas Instruments Incorporated
LMR12007
www.ti.com.cn
ZHCSBI7 – SEPTEMBER 2013
CATCH DIODE
The catch diode (D1) conducts during the switch off-time. A Schottky diode is recommended for its fast switching
times and low forward voltage drop. The catch diode should be chosen so that its current rating is greater than:
ID1 = IO x (1-D)
(22)
The reverse breakdown rating of the diode must be at least the maximum input voltage plus appropriate margin.
To improve efficiency choose a Schottky diode with a low forward voltage drop.
BOOST DIODE
A standard diode such as the 1N4148 type is recommended. For VBOOST circuits derived from voltages less than
3.3V, a small-signal Schottky diode is recommended for greater efficiency. A good choice is the BAT54 small
signal diode.
BOOST CAPACITOR
A ceramic 0.01µF capacitor with a voltage rating of at least 6.3V is sufficient. The X7R and X5R MLCCs provide
the best performance.
OUTPUT VOLTAGE
The output voltage is set using the following equation where R2 is connected between the FB pin and GND, and
R1 is connected between VO and the FB pin. A good value for R2 is 10kΩ.
R1 =
VO
VREF
- 1 x R2
(23)
PCB Layout Considerations
When planning layout there are a few things to consider when trying to achieve a clean, regulated output. The
most important consideration when completing the layout is the close coupling of the GND connections of the CIN
capacitor and the catch diode D1. These ground ends should be close to one another and be connected to the
GND plane with at least two through-holes. Place these components as close to the IC as possible. Next in
importance is the location of the GND connection of the COUT capacitor, which should be near the GND
connections of CIN and D1.
There should be a continuous ground plane on the bottom layer of a two-layer board except under the switching
node island.
The FB pin is a high impedance node and care should be taken to make the FB trace short to avoid noise pickup
and inaccurate regulation. The feedback resistors should be placed as close as possible to the IC, with the GND
of R2 placed as close as possible to the GND of the IC. The VOUT trace to R1 should be routed away from the
inductor and any other traces that are switching.
High AC currents flow through the VIN, SW and VOUT traces, so they should be as short and wide as possible.
However, making the traces wide increases radiated noise, so the designer must make this trade-off. Radiated
noise can be decreased by choosing a shielded inductor.
The remaining components should also be placed as close as possible to the IC. Please see Application Note
AN-1229 SNVA054 for further considerations and the LMR12007 demo board as an example of a four-layer
layout.
Copyright © 2013, Texas Instruments Incorporated
13
LMR12007
ZHCSBI7 – SEPTEMBER 2013
www.ti.com.cn
LMR12007X Circuit Examples
D2
VIN
BOOST
VIN
C3
C1
L1
R3
VOUT
SW
ON
D1
EN
C2
R1
OFF
FB
GND
R2
Figure 24. LMR12007X (1.6MHz)
VBOOST Derived from VIN
5V to 1.5V/750mA
Table 1. Bill of Materials for Figure 24
Part ID
Part Value
Part Number
Manufacturer
U1
750mA Buck Regulator
LMR12007X
Texas Instruments
C1, Input Cap
10µF, 6.3V, X5R
C3216X5ROJ106M
TDK
C2, Output Cap
10µF, 6.3V, X5R
C3216X5ROJ106M
TDK
C3, Boost Cap
0.01uF, 16V, X7R
C1005X7R1C103K
TDK
D1, Catch Diode
0.3VF Schottky 1A, 10VR
MBRM110L
ON Semi
D2, Boost Diode
1VF @ 50mA Diode
1N4148W
Diodes, Inc.
L1
4.7µH, 1.7A,
VLCF4020T- 4R7N1R2
TDK
R1
2kΩ, 1%
CRCW06032001F
Vishay
R2
10kΩ, 1%
CRCW06031002F
Vishay
R3
100kΩ, 1%
CRCW06031003F
Vishay
14
Copyright © 2013, Texas Instruments Incorporated
LMR12007
www.ti.com.cn
ZHCSBI7 – SEPTEMBER 2013
D2
VIN
BOOST
VIN
C3
C1
R3
L1
SW
ON
VOUT
D1
C2
EN
OFF
R1
FB
GND
R2
Figure 25. LMR12007X (1.6MHz)
VBOOST Derived from VOUT
12V to 3.3V/750mA
Table 2. Bill of Materials for Figure 25
Part ID
Part Value
Part Number
Manufacturer
U1
750mA Buck Regulator
LMR12007X
Texas Instruments
C1, Input Cap
10µF, 25V, X7R
C3225X7R1E106M
TDK
C2, Output Cap
22µF, 6.3V, X5R
C3216X5ROJ226M
TDK
C3, Boost Cap
0.01µF, 16V, X7R
C1005X7R1C103K
TDK
D1, Catch Diode
0.34VF Schottky 1A, 30VR
SS1P3L
Vishay
D2, Boost Diode
30V, 200 mA Schottky
BAT54
Diodes Inc.
L1
4.7µH, 1.7A,
VLCF4020T- 4R7N1R2
TDK
R1
16.5kΩ, 1%
CRCW06031652F
Vishay
R2
10.0 kΩ, 1%
CRCW06031002F
Vishay
R3
100kΩ, 1%
CRCW06031003F
Vishay
Copyright © 2013, Texas Instruments Incorporated
15
LMR12007
ZHCSBI7 – SEPTEMBER 2013
www.ti.com.cn
C4
D3
R4
D2
BOOST
VIN
VIN
C3
C1
R3
L1
VOUT
SW
ON
D1
C2
EN
OFF
R1
FB
GND
R2
Figure 26. LMR12007X (1.6MHz)
VBOOST Derived from VSHUNT
18V to 1.5V/750mA
Table 3. Bill of Materials for Figure 26
Part ID
Part Value
Part Number
Manufacturer
U1
750mA Buck Regulator
LMR12007X
Texas Instruments
C1, Input Cap
10µF, 25V, X7R
C3225X7R1E106M
TDK
C2, Output Cap
22µF, 6.3V, X5R
C3216X5ROJ226M
TDK
C3, Boost Cap
0.01µF, 16V, X7R
C1005X7R1C103K
TDK
C4, Shunt Cap
0.1µF, 6.3V, X5R
C1005X5R0J104K
TDK
D1, Catch Diode
0.4VF Schottky 1A, 30VR
SS1P3L
Vishay
D2, Boost Diode
1VF @ 50mA Diode
1N4148W
Diodes, Inc.
D3, Zener Diode
5.1V 250Mw SOT
BZX84C5V1
Vishay
L1
6.8µH, 1.6A,
SLF7032T-6R8M1R6
TDK
R1
2kΩ, 1%
CRCW06032001F
Vishay
R2
10kΩ, 1%
CRCW06031002F
Vishay
R3
100kΩ, 1%
CRCW06031003F
Vishay
R4
4.12kΩ, 1%
CRCW06034121F
Vishay
16
Copyright © 2013, Texas Instruments Incorporated
LMR12007
www.ti.com.cn
ZHCSBI7 – SEPTEMBER 2013
D3
D2
BOOST
VIN
VIN
C1
C3
L1
R3
VOUT
SW
ON
D1
EN
C2
R1
OFF
FB
GND
R2
Figure 27. LMR12007X (1.6MHz)
VBOOST Derived from Series Zener Diode (VIN)
15V to 1.5V/750mA
Table 4. Bill of Materials for Figure 27
Part ID
Part Value
Part Number
Manufacturer
U1
750mA Buck Regulator
LMR12007X
Texas Instruments
C1, Input Cap
10µF, 25V, X7R
C3225X7R1E106M
TDK
C2, Output Cap
22µF, 6.3V, X5R
C3216X5ROJ226M
TDK
C3, Boost Cap
0.01µF, 16V, X7R
C1005X7R1C103K
TDK
D1, Catch Diode
0.4VF Schottky 1A, 30VR
SS1P3L
Vishay
D2, Boost Diode
1VF @ 50mA Diode
1N4148W
Diodes, Inc.
D3, Zener Diode
11V 350Mw SOT
BZX84C11T
Diodes, Inc.
L1
6.8µH, 1.6A,
SLF7032T-6R8M1R6
TDK
R1
2kΩ, 1%
CRCW06032001F
Vishay
R2
10kΩ, 1%
CRCW06031002F
Vishay
R3
100kΩ, 1%
CRCW06031003F
Vishay
Copyright © 2013, Texas Instruments Incorporated
17
LMR12007
ZHCSBI7 – SEPTEMBER 2013
www.ti.com.cn
D3
D2
VIN
BOOST
VIN
C3
C1
R3
L1
VOUT
SW
ON
D1
EN
C2
R1
OFF
FB
GND
R2
Figure 28. LMR12007X (1.6MHz)
VBOOST Derived from Series Zener Diode (VOUT)
15V to 9V/750mA
Table 5. Bill of Materials for Figure 28
Part ID
Part Value
Part Number
Manufacturer
U1
750mA Buck Regulator
LMR12007X
Texas Instruments
C1, Input Cap
10µF, 25V, X7R
C3225X7R1E106M
TDK
C2, Output Cap
22µF, 16V, X5R
C3216X5R1C226M
TDK
C3, Boost Cap
0.01µF, 16V, X7R
C1005X7R1C103K
TDK
D1, Catch Diode
0.4VF Schottky 1A, 30VR
SS1P3L
Vishay
D2, Boost Diode
1VF @ 50mA Diode
1N4148W
Diodes, Inc.
D3, Zener Diode
4.3V 350mw SOT
BZX84C4V3
Diodes, Inc.
L1
6.8µH, 1.6A,
SLF7032T-6R8M1R6
TDK
R1
61.9kΩ, 1%
CRCW06036192F
Vishay
R2
10kΩ, 1%
CRCW06031002F
Vishay
R3
100kΩ, 1%
CRCW06031003F
Vishay
18
Copyright © 2013, Texas Instruments Incorporated
LMR12007
www.ti.com.cn
ZHCSBI7 – SEPTEMBER 2013
LMR12007Y Circuit Examples
D2
VIN
BOOST
VIN
C3
C1
L1
R3
VOUT
SW
ON
D1
EN
C2
R1
OFF
FB
GND
R2
Figure 29. LMR12007Y (550kHz)
VBOOST Derived from VIN
5V to 1.5V/750mA
Table 6. Bill of Materials for Figure 29
Part ID
Part Value
Part Number
Manufacturer
U1
750mA Buck Regulator
LMR12007Y
Texas Instruments
C1, Input Cap
10µF, 6.3V, X5R
C3216X5ROJ106M
TDK
C2, Output Cap
22µF, 6.3V, X5R
C3216X5ROJ226M
TDK
C3, Boost Cap
0.01µF, 16V, X7R
C1005X7R1C103K
TDK
D1, Catch Diode
0.3VF Schottky 1A, 10VR
MBRM110L
ON Semi
D2, Boost Diode
1VF @ 50mA Diode
1N4148W
Diodes, Inc.
L1
10µH, 1.6A,
SLF7032T-100M1R4
TDK
R1
2kΩ, 1%
CRCW06032001F
Vishay
R2
10kΩ, 1%
CRCW06031002F
Vishay
R3
100kΩ, 1%
CRCW06031003F
Vishay
Copyright © 2013, Texas Instruments Incorporated
19
LMR12007
ZHCSBI7 – SEPTEMBER 2013
www.ti.com.cn
D2
VIN
BOOST
VIN
C3
C1
R3
L1
SW
ON
VOUT
D1
C2
EN
OFF
R1
FB
GND
R2
Figure 30. LMR12007Y (550kHz)
VBOOST Derived from VOUT
12V to 3.3V/750mA
Table 7. Bill of Materials for Figure 30
Part ID
Part Value
Part Number
Manufacturer
U1
750mA Buck Regulator
LMR12007Y
Texas Instruments
C1, Input Cap
10µF, 25V, X7R
C3225X7R1E106M
TDK
C2, Output Cap
22µF, 6.3V, X5R
C3216X5ROJ226M
TDK
C3, Boost Cap
0.01µF, 16V, X7R
C1005X7R1C103K
TDK
D1, Catch Diode
0.34VF Schottky 1A, 30VR
SS1P3L
Vishay
D2, Boost Diode
30V, 200 mA Schottky
BAT54
Diodes Inc.
L1
10µH, 1.6A,
SLF7032T-100M1R4
TDK
R1
16.5kΩ, 1%
CRCW06031652F
Vishay
R2
10.0 kΩ, 1%
CRCW06031002F
Vishay
R3
100kΩ, 1%
CRCW06031003F
Vishay
20
Copyright © 2013, Texas Instruments Incorporated
LMR12007
www.ti.com.cn
ZHCSBI7 – SEPTEMBER 2013
C4
D3
R4
D2
BOOST
VIN
VIN
C3
C1
R3
L1
VOUT
SW
ON
D1
C2
EN
OFF
R1
FB
GND
R2
Figure 31. LMR12007Y (550kHz)
VBOOST Derived from VSHUNT
18V to 1.5V/750mA
Table 8. Bill of Materials for Figure 31
Part ID
Part Value
Part Number
Manufacturer
U1
750mA Buck Regulator
LMR12007Y
Texas Instruments
C1, Input Cap
10µF, 25V, X7R
C3225X7R1E106M
TDK
C2, Output Cap
22µF, 6.3V, X5R
C3216X5ROJ226M
TDK
C3, Boost Cap
0.01µF, 16V, X7R
C1005X7R1C103K
TDK
C4, Shunt Cap
0.1µF, 6.3V, X5R
C1005X5R0J104K
TDK
D1, Catch Diode
0.4VF Schottky 1A, 30VR
SS1P3L
Vishay
D2, Boost Diode
1VF @ 50mA Diode
1N4148W
Diodes, Inc.
D3, Zener Diode
5.1V 250Mw SOT
BZX84C5V1
Vishay
L1
15µH, 1.5A
SLF7045T-150M1R5
TDK
R1
2kΩ, 1%
CRCW06032001F
Vishay
R2
10kΩ, 1%
CRCW06031002F
Vishay
R3
100kΩ, 1%
CRCW06031003F
Vishay
R4
4.12kΩ, 1%
CRCW06034121F
Vishay
Copyright © 2013, Texas Instruments Incorporated
21
LMR12007
ZHCSBI7 – SEPTEMBER 2013
www.ti.com.cn
D3
D2
BOOST
VIN
VIN
C1
C3
L1
R3
VOUT
SW
ON
D1
EN
C2
R1
OFF
FB
GND
R2
Figure 32. LMR12007Y (550kHz)
VBOOST Derived from Series Zener Diode (VIN)
15V to 1.5V/750mA
Table 9. Bill of Materials for Figure 32
Part ID
Part Value
Part Number
Manufacturer
U1
750mA Buck Regulator
LMR12007Y
Texas Instruments
C1, Input Cap
10µF, 25V, X7R
C3225X7R1E106M
TDK
C2, Output Cap
22µF, 6.3V, X5R
C3216X5ROJ226M
TDK
C3, Boost Cap
0.01µF, 16V, X7R
C1005X7R1C103K
TDK
D1, Catch Diode
0.4VF Schottky 1A, 30VR
SS1P3L
Vishay
D2, Boost Diode
1VF @ 50mA Diode
1N4148W
Diodes, Inc.
D3, Zener Diode
11V 350Mw SOT
BZX84C11T
Diodes, Inc.
L1
15µH, 1.5A,
SLF7045T-150M1R5
TDK
R1
2kΩ, 1%
CRCW06032001F
Vishay
R2
10kΩ, 1%
CRCW06031002F
Vishay
R3
100kΩ, 1%
CRCW06031003F
Vishay
22
Copyright © 2013, Texas Instruments Incorporated
LMR12007
www.ti.com.cn
ZHCSBI7 – SEPTEMBER 2013
D3
D2
VIN
BOOST
VIN
C3
C1
R3
L1
VOUT
SW
ON
D1
EN
C2
R1
OFF
FB
GND
R2
Figure 33. LMR12007Y (550kHz)
VBOOST Derived from Series Zener Diode (VOUT)
15V to 9V/750mA
Table 10. Bill of Materials for Figure 33
Part ID
Part Value
Part Number
Manufacturer
U1
750mA Buck Regulator
LMR12007Y
Texas Instruments
C1, Input Cap
10µF, 25V, X7R
C3225X7R1E106M
TDK
C2, Output Cap
22µF, 16V, X5R
C3216X5R1C226M
TDK
C3, Boost Cap
0.01µF, 16V, X7R
C1005X7R1C103K
TDK
D1, Catch Diode
0.4VF Schottky 1A, 30VR
SS1P3L
Vishay
D2, Boost Diode
1VF @ 50mA Diode
1N4148W
Diodes, Inc.
D3, Zener Diode
4.3V 350mw SOT
BZX84C4V3
Diodes, Inc.
L1
22µH, 1.4A,
SLF7045T-220M1R3-1PF
TDK
R1
61.9kΩ, 1%
CRCW06036192F
Vishay
R2
10kΩ, 1%
CRCW06031002F
Vishay
R3
100kΩ, 1%
CRCW06031003F
Vishay
Copyright © 2013, Texas Instruments Incorporated
23
PACKAGE OPTION ADDENDUM
www.ti.com
23-May-2025
PACKAGING INFORMATION
Orderable part number
(1)
Status
Material type
(1)
(2)
Package | Pins
Package qty | Carrier
RoHS
(3)
Lead finish/
Ball material
MSL rating/
Peak reflow
(4)
(5)
Op temp (°C)
Part marking
(6)
LMR12007XMK
Active
Production
SOT-23THIN (DDC) | 6
1000 | SMALL T&R
Yes
SN
Level-1-260C-UNLIM
-40 to 125
SP1B
LMR12007XMK.A
Active
Production
SOT-23THIN (DDC) | 6
1000 | SMALL T&R
Yes
SN
Level-1-260C-UNLIM
-40 to 125
SP1B
LMR12007XMKX
Active
Production
SOT-23THIN (DDC) | 6
3000 | LARGE T&R
Yes
SN
Level-1-260C-UNLIM
-40 to 125
SP1B
LMR12007XMKX.A
Active
Production
SOT-23THIN (DDC) | 6
3000 | LARGE T&R
Yes
SN
Level-1-260C-UNLIM
-40 to 125
SP1B
LMR12007YMK
Active
Production
SOT-23THIN (DDC) | 6
1000 | SMALL T&R
Yes
SN
Level-1-260C-UNLIM
-40 to 125
SP2B
LMR12007YMK.A
Active
Production
SOT-23THIN (DDC) | 6
1000 | SMALL T&R
Yes
SN
Level-1-260C-UNLIM
-40 to 125
SP2B
LMR12007YMKX
Active
Production
SOT-23THIN (DDC) | 6
3000 | LARGE T&R
Yes
SN
Level-1-260C-UNLIM
-40 to 125
SP2B
LMR12007YMKX.A
Active
Production
SOT-23THIN (DDC) | 6
3000 | LARGE T&R
Yes
SN
Level-1-260C-UNLIM
-40 to 125
SP2B
Status: For more details on status, see our product life cycle.
(2)
Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance,
reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional
waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind.
(3)
RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition.
(4)
Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum
column width.
(5)
MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown.
Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board.
(6)
Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
23-May-2025
Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two
combined represent the entire part marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and
makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative
and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers
and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE OUTLINE
DDC0006A
SOT-23 - 1.1 max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
3.05
2.55
1.75
1.45
PIN 1
INDEX AREA
1.1
0.7
B
1
0.1 C
A
6
4X 0.95
3.05
2.75
1.9
4
3
4X 0 -15
0.5
0.3
0.2
0.1
TYP
0.0
6X
C A B
4X 4 -15
C
0 -8 TYP
0.20
TYP
0.12
SEATING PLANE
0.6
TYP
0.3
0.25
GAGE PLANE
4214841/E 08/2024
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC MO-193.
www.ti.com
EXAMPLE BOARD LAYOUT
DDC0006A
SOT-23 - 1.1 max height
SMALL OUTLINE TRANSISTOR
SYMM
6X (1.1)
1
6
6X (0.6)
SYMM
4X (0.95)
4
3
(R0.05) TYP
(2.7)
LAND PATTERN EXAMPLE
EXPLOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
SOLDERMASK DETAILS
4214841/E 08/2024
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DDC0006A
SOT-23 - 1.1 max height
SMALL OUTLINE TRANSISTOR
SYMM
6X (1.1)
1
6
6X (0.6)
SYMM
4X(0.95)
4
3
(R0.05) TYP
(2.7)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:15X
4214841/E 08/2024
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
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