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LMR22007YYZFT

LMR22007YYZFT

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    9-UFBGA,DSBGA

  • 描述:

    IC REG BCK ADJ 0.75A SYNC 9DSBGA

  • 数据手册
  • 价格&库存
LMR22007YYZFT 数据手册
LMR22007 www.ti.com SNVS985A – OCTOBER 2013 – REVISED OCTOBER 2013 LMR22007 2.7V - 20V, 750mA Step-Down Converter with Adjustable Input Current Limit Check for Samples: LMR22007 FEATURES APPLICATIONS • • • 1 2 • • • • • • • • • • • • • High efficiency – Greater than 90% at 12 VIN to 5 VOUT Adjustable input current limit from 150mA to 600mA Input voltage range: 2.7V to 20V Adjustable output voltage from 0.9V to 5.5V Up to 750 mA output current Ultra low quiescent current (18µA typical) Ultra low shutdown current (300nA typical) < +/-2% VOUT ripple at no load < +/-1% VOUT ripple at full load Internal compensation, Soft-start and Thermal Shutdown Solution size less than 26mm2 – Low BOM count with small external components Wafer Chip Scale Package (WCSP) Light load power save mode Set frequency of 2.1 MHz (typical) • • • 3.3V, 5V and 12V Interface POL Supply from Single or Multiple Li-Ion Battery Solid-State Disk Drives LDO Replacement Mobile PC’s, Tablet, Modems, Cameras DESCRIPTION The LMR22007 is a switching regulator designed for the high-efficiency requirement of applications with stand-by and shut-down modes. The device features a low-current mode to maintain efficiency under lightload conditions, and an adaptive on-time control architecture for fast transient response. The LMR22007 can deliver up to 750mA of continuous load current with an adjustable input current limit. The device has a wide input voltage range of 2.7V to 20V, and supports VIN transients to 24V. Other features include internal compensation, internal soft start, input under-voltage protection, internal bootstrap diode, and thermal shutdown. TYPICAL APPLICATION Cin 10µF Cout 22µF Vin 4.5 ± 20V Rlim 200k Vout 3.3V EN VIN PGND ILIM PG SW AGND FB VOUTS Rfbb 100k * L 2.2µH Rfbt 267k * 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. DCS-Control is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2013, Texas Instruments Incorporated LMR22007 SNVS985A – OCTOBER 2013 – REVISED OCTOBER 2013 ABSOLUTE MAXIMUM RATINGS www.ti.com (1) Over operating free-air temperature range (unless otherwise noted) Pin voltage range (2) MIN MAX UNIT VIN, SW, PG -0.3 24 V EN -0.3 24 VOUT -0.3 6 FB, ILIM -0.3 3.3 Power good sink current PG 10 mA Temperature range Operating junction temperature range, TJ -40 125 °C Storage temperature range, Tstg -65 150 ESD rating (1) (2) (1) HBM Human body model 2 CDM Charge device model 0.5 kV Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. All voltages are with respect to network ground terminal. RECOMMENDED OPERATING CONDITIONS Over operating free-air temperature range (unless otherwise noted) Pin voltage range MIN MAX UNIT VIN, EN, PG 2.7 20 V VOUT 0.9 5.5 Power Good sink current PG Temperature range Operating junction temperature range, TJ -40 100 µA 125 °C THERMAL CHARACTERISTICS over operating free-air temperature range (unless otherwise THERMAL METRIC (1) UNIT θJA Junction-to-ambient thermal resistance 72.3 °C/W θJB Junction-to-board characterization parameter 32.5 °C/W (1) The package thermal impedance is calculated in accordance with JESD 51-7. ELECTRICAL CHARACTERISTICS Min and Max Limits apply over the junction temperature (TJ) range of -40°C to +125°C, typical values at VIN = 12V and TA = 25°C (unless otherwise noted) SYMBOL PARAMETER CONDITION MIN TYP MAX UNIT IOUT = 0.5A, TJ -40°C to 85°C 0.891 0.9 0.909 V IOUT = 0.5A, TJ -40°C to 125°C 0.886 0.9 0.914 Regulation and Over-Voltage Comparator VFB In-regulation feedback voltage IFB Feedback input bias current 0.25 nA Quiescent Current IQ Non Switching Quiescent Current Non Switching 18 100 µA ISD Shut down VEN = 0V, TJ = -40°C to 85°C 0.3 2 μA VIN Rising threshold 2.3 2.6 V VIN Under Voltage Lockout (UVLO) VUVLO VIN Under Voltage Lockout VUVLO-HYS VIN UVLO Hysteresis 2 269 Submit Documentation Feedback mV Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMR22007 LMR22007 www.ti.com SNVS985A – OCTOBER 2013 – REVISED OCTOBER 2013 ELECTRICAL CHARACTERISTICS (continued) Min and Max Limits apply over the junction temperature (TJ) range of -40°C to +125°C, typical values at VIN = 12V and TA = 25°C (unless otherwise noted) SYMBOL PARAMETER CONDITION MIN TYP MAX UNIT Internal soft-start time VOUT 10% to 90%, TJ -40°C to 85°C 1.4 3.3 5 ms RPG Power Good Pull-Down Resistance IOUT = 5mA, EN = 2V 70 Ohms VPG_Rising Power Good Pin is floating when VFB rises above this voltage 0.855 V VPG_Falling Power Good Pin is pulled low when VFB falls below this voltage 0.812 V 2.09 MHz 77 ns Softstart SS Power Good Switch Frequency Range fSW Ton Minimum on time of NMOS highside Switch Toff Minimum off time of NMOS lowside Switch TJ = 25°C D-max The Max Duty Cycle of the high side NMOS FET IOUT = 750mA 157 80 ns % Switch Characteristics RDSON-NMOS-HIGH High Side NMOS switch onresistance 0.141 0.21 Ω RDSON-NMOS-LOW Low side NMOS switch onresistance 0.1 0.144 Ω 1000 1150 mA Input Current limit ILIMIN Open Loop Input current limit RLIM = 15kΩ, VIN = 12V, TJ = 25°C ILIMIN_HOT Open Loop Input current limit RLIM = 15kΩ, VIN = 12V, TJ = 125°C 925 907 ILIMIN_COLD Open Loop Input current limit RLIM = 15kΩ, VIN = 12V, TJ = -40°C 1084 Current limit for NMOS switch devices ILIMIT- LOWSIDE ILIMITLOWSIDE_HOT ILIMITLOWSIDE_COLD Current limit for short circuit and faults TJ = 25°C 900 977 Current limit for short circuit and faults TJ = 125°C 858 Current limit for short circuit and faults TJ = -40°C 1008 Enable threshold-Rising VEN Rising Enable threshold-Falling VEN Falling mA Enable Control VEN 0.662 0.4 0.9 0.612 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMR22007 V V 3 LMR22007 SNVS985A – OCTOBER 2013 – REVISED OCTOBER 2013 www.ti.com 9 Bump WCSP Package, Bump size 300 µm, 0.5mm pitch Top View and Bottom View C3 C2 C1 B3 B2 B1 A3 A2 A1 C1 C2 C3 B1 B2 B3 A1 A2 A3 PIN FUNCTIONS NO. NAME TYPE(1) DESCRIPTION A1 AGND G Ground reference for all internal circuitry. A2 ILIM I Connect to ground through a resistor to adjust input current limit, see applications information. DO NOT FLOAT. A3 EN I The device is in shutdown mode when voltage to the EN pin is 0.9V. Do not leave this pin floating. Maximum operating voltage on this pin is 20V. B1 FB I Divide down the output voltage with a resistor divider to 0.9 and connect to this pin. B2 PG O Power good flag. Open drain connection of an internal pull-down MOSFET. Tie a resistor from the desired logic voltage to the PG pin. The pin will float when the FB pin is greater than 0.855V. The pin will be pulled down when VIN > 2.5V and the FB pin is less than 0.812V. B3 VIN P Input voltage to the device. Connect directly to closely placed input bypass capacitor. C1 VOUT I Connect to the regulated output voltage. C2 SW O Connection to the external inductor. C3 PGND G Power ground connection to internal half bridge. Connect directly to closely placed input bypass capacitor. TYPICAL CHARACTERISTICS Input Current Limit vs VIN VOUT = 1.2V 100K 50K 75K Iout = 750mA Input Current Limit (A) 0.5 0.4 0.3 0.2 0.1 0.6 100K 50K 75K Iout = 750mA 0.5 Input Current Limit (A) 0.6 Input Current Limit vs VIN VOUT = 2.5V 0.4 0.3 0.2 0.1 0.0 0.0 2.7 3.3 3.9 4.5 5.1 Vin (V) 5.7 6.3 6.9 4 C001 Figure 1. 4 5 6 7 Vin (V) 8 9 10 C002 Figure 2. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMR22007 LMR22007 www.ti.com SNVS985A – OCTOBER 2013 – REVISED OCTOBER 2013 TYPICAL CHARACTERISTICS (continued) Input Current Limit vs VIN VOUT = 3.3V 0.6 0.7 100K 50K 75K Iout = 750mA 100K 50K 75K Iout = 750mA 0.6 Input Current Limit (A) 0.5 Input Current Limit (A) Input Current Limit vs VIN VOUT = 5V 0.4 0.3 0.2 0.1 0.5 0.4 0.3 0.2 0.1 0.0 0.0 5 6 7 8 9 10 11 Vin (V) 7 12 8 9 10 C003 Power Dissipation 5V 0.7 0.6 14 C004 5.050 0.4 5.025 9Vin @ ±40C 9Vin @ 25C 9Vin @ 85C 12Vin @ ±40C 12Vin @ 25C 12Vin @ 85C 15Vin @ ±40C 15Vin @ 25C 15Vin @ 85C 20Vin @ ±40C 20Vin @ 25C 20Vin @ 85C 5.000 0.3 4.975 0.2 0.1 4.950 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 Load (A) 0.0 0.8 0.1 0.2 0.3 0.5 0.6 0.7 0.8 C002 Figure 6. Efficiency 5V @85°C Efficiency 5V @25°C 100 100 90 90 80 80 70 70 Efficiency (%) Efficiency (%) 0.4 Load (A) C001 Figure 5. 60 50 40 30 60 50 40 30 9Vin 12Vin 15Vin 20Vin 20 10 0 0.001 16 VOUT Regulation 5V 0.5 0.0 15 5.075 Vout (V) Power Dissipation (W) 0.8 13 Figure 4. 9Vin @ 25C 9Vin @ 85C 12Vin @ 25C 12Vin @ 85C 15Vin @ 25C 15Vin @ 85C 20Vin @ 25C 20Vin @ 85C 0.9 12 Vin (V) Figure 3. 1.0 11 0.01 0.1 Load (A) 9Vin 12Vin 15Vin 20Vin 20 10 1 0 0.001 C004 Figure 7. 0.01 0.1 Load (A) 1 C005 Figure 8. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMR22007 5 LMR22007 SNVS985A – OCTOBER 2013 – REVISED OCTOBER 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) Efficiency 5V @-40°C Power Dissipation 3.3V 1.0 90 0.9 80 0.8 Power Dissipation (W) 100 Efficiency (%) 70 60 50 40 30 9Vin 12Vin 15Vin 20Vin 20 10 0 0.001 0.01 0.1 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 1 Load (A) 5Vin @ 25C 5Vin @ 85C 9Vin @ 25C 9Vin @ 85C 12Vin @ 25C 12Vin @ 85C 15Vin @ 25C 15Vin @ 85C 20Vin @ 25C 20Vin @ 85C 0.0 90 80 80 70 70 Efficiency (%) Efficiency (%) 90 60 50 40 30 20 10 0.1 40 0 0.001 90 80 70 Efficiency (%) Power Dissipation (W) Efficiency 2.5V @85°C 100 60 50 40 0.2 20 0.1 10 0.0 0.2 0.3 0.4 Load (A) 0.5 0.6 0.7 0.8 0 0.001 C001 Figure 13. 6 1 C008 Figure 12. 30 0.1 0.1 Load (A) 0.3 0.0 0.01 C007 Power Dissipation 2.5V 0.4 5Vin 9Vin 12Vin 15Vin 20Vin 10 3.3Vin @ 25C 3.3Vin @ 85C 5Vin @ 25C 5Vin @ 85C 9Vin @ 25C 9Vin @ 85C 12Vin @ 25C 12Vin @ 85C 15Vin @ 25C 15Vin @ 85C 20Vin @ 25C 20Vin @ 85C 0.5 0.8 50 Figure 11. 0.6 0.7 60 20 1 Load (A) 0.7 0.6 C006 30 5Vin 9Vin 12Vin 15Vin 20Vin 0.8 0.5 Efficiency 3.3V @25°C 100 0.9 0.4 Figure 10. Efficiency 3.3V @85°C 1.0 0.3 C003 100 0.01 0.2 Load (A) Figure 9. 0 0.001 0.1 3.3Vin 5Vin 9Vin 12Vin 15Vin 20Vin 0.01 0.1 Load (A) 1 C002 Figure 14. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMR22007 LMR22007 www.ti.com SNVS985A – OCTOBER 2013 – REVISED OCTOBER 2013 TYPICAL CHARACTERISTICS (continued) Efficiency 2.5V @25°C Efficiency VOUT = 2.5 90 90 80 80 70 70 Efficiency (%) 100 Efficiency (%) 100 60 50 40 3.3Vin 5Vin 9Vin 12Vin 15Vin 20Vin 30 20 10 0 0.001 0.01 0.1 50 40 3.3Vin 5Vin 9Vin 12Vin 15Vin 20Vin 30 20 10 0 0.001 1 Load (A) 60 0.01 C003 Figure 15. 80 80 70 70 60 60 50 40 3.3Vin 5Vin 9Vin 12Vin 15Vin 20Vin 30 20 10 0.01 0.1 50 40 3.3Vin 5Vin 9Vin 12Vin 15Vin 20Vin 30 20 10 0 0.001 1 Load (A) 0.01 1.2VOUT Regulation Power Dissipation 1.2V 0.7 3.3Vin @ 25C 3.3Vin @ 85C 5Vin @ 25C 5Vin @ 85C 9Vin @ 25C 9Vin @ 85C 12Vin @ 25C 12Vin @ 85C 15Vin @ 25C 15Vin @ 85C 20Vin @ 25C 20Vin @ 85C 0.6 Power Dissipation (W) 1.206 1.200 Vout 3.3Vin @ ±40C 3.3Vin @ 25C 3.3Vin @ 85C 5Vin @ ±40C 5Vin @ 25C 5Vin @ 85C 9Vin @ ±40C 9Vin @ 25C 9Vin @ 85C 12Vin @ ±40C 12Vin @ 25C 12Vin @ 85C 15Vin @ ±40C 15Vin @ 25C 15Vin @ 85C 20Vin @ ±40C 20Vin @ 25C 20Vin @ 85C 1.194 1.188 1.182 0.3 0.4 1 C006 Figure 18. 1.212 0.2 0.1 Load (A) C007 Figure 17. 0.1 C003 Efficiency VOUT = 1.2 @ 85°C 90 Efficiency (%) Efficiency (%) Efficiency VOUT = 1.2 0.0 1 Figure 16. 90 0 0.001 0.1 Load (A) 0.5 0.6 0.7 0.5 0.4 0.3 0.2 0.8 0.1 Iout (m) | Load C004 0.0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 Load (A) Figure 19. 0.8 C005 Figure 20. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMR22007 7 LMR22007 SNVS985A – OCTOBER 2013 – REVISED OCTOBER 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) 8 Startup 5VIN Full Load Load Transient 12VIN 50-750mA Figure 21. Figure 22. Shutdown 5VIN Full Load Line Transient 9-15V 500mA Load Figure 23. Figure 24. Switching Light Load Switching Loaded Figure 25. Figure 26. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMR22007 LMR22007 www.ti.com SNVS985A – OCTOBER 2013 – REVISED OCTOBER 2013 TYPICAL CHARACTERISTICS (continued) Short Circuit 12VIN Short Circuit Recovery 12VIN Figure 27. Figure 28. Thermal Shutdown Thermal Shutdown Recovery Figure 29. Figure 30. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMR22007 9 LMR22007 SNVS985A – OCTOBER 2013 – REVISED OCTOBER 2013 www.ti.com FUNCTIONAL BLOCK DIAGRAM Power Good Control UVLO Average Threshold Average Input Current Detector Soft Start PG VIN Control Logic Power Control SW Gate Drive EN + Current Limit Control ILIM Average Threshold Low Side Current Limit Threshold PGND Direct Control & Compensation VOUTS + Timer tON - FB + AGND Theory of Operation The LMR22007 is a buck regulator IC that delivers a 750 mA load current. The regulator has a preset switching frequency of 2.1 MHz. This high frequency allows the LMR22007 to operate with small surface mount capacitors and inductors, resulting in a DC-DC converter that requires a minimum amount of board space. The LMR22007 is internally compensated, which reduces design time, and requires few external components. The following operating description of the LMR22007 will refer to the Block Diagram and to the waveforms in the Figure below. The LMR22007 supplies a regulated output voltage by turning on the internal NMOS switch and varying the on-time. During the on-time, the SW pin voltage VSW swings up to approximately VIN, and the inductor current iL increases with a linear slope. The switch is turned off by the control logic. During the switch off-time tOFF, inductor current discharges through the low side device, which forces the SW pin (VSW) to swing below ground by the voltage drop across the low side device. The regulator loop adjusts the duty cycle (D) to maintain a constant output voltage. VOUT D VIN 10 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMR22007 LMR22007 www.ti.com SNVS985A – OCTOBER 2013 – REVISED OCTOBER 2013 VSW SW Voltage D = tON / TSW VIN ttONt 0 -VD1 ttOFFt t tTSWt Inductor Current iL ILPK IOUT tûiLt 0 t The LMR22007 synchronous switched mode power converters are based on DCS-Control™ (Direct Control with Seamless Transition into Power Save Mode), an advanced regulation topology, that combines the advantages of hysteretic, voltage mode and current mode control including an AC loop directly associated to the output voltage. This control loop takes information about output voltage changes and feeds it directly to a fast comparator stage. It sets the switching frequency, which is constant for steady state operating conditions, and provides immediate response to dynamic load changes. To get accurate DC load regulation, a voltage feedback loop is used. The internally compensated regulation network achieves fast and stable operation with small external components and low ESR capacitors. The DCS-Control™ topology supports PWM (Pulse Width Modulation) mode for medium and heavy load conditions and a Power Save Mode at light loads. During PWM, it operates at its nominal switching frequency in continuous conduction mode. This frequency is typically about 2.1 MHz with a controlled frequency variation depending on the input voltage. If the load current decreases, the converter enters Power Save Mode to sustain high efficiency down to very light loads. In Power Save Mode the switching frequency decreases linearly with the load current. Since DCS-Control™ supports both operation modes within one single building block, the transition from PWM to Power Save Mode is seamless without effects on the output voltage. Detailed Description of Pins and Key Functions POWER SAVE MODE OPERATION The LMR22007's built in Power Save Mode will be entered seamlessly, if the load current decreases. This secures a high efficiency in light load operation. The device remains in Power Save Mode as long as the inductor current is discontinuous. In Power Save Mode the switching frequency decreases linearly with the load current maintaining high efficiency. The transition into and out of Power Save Mode happens within the entire regulation scheme and is seamless in both directions. The LMR22007 includes a fixed on-time circuitry. This on-time, in steady-state operation, can be estimated as: VOUT t ON u 478ns VIN (1) For very small output voltages, an absolute minimum on-time of about 77ns is kept to limit switching losses. Using tON, the typical peak inductor current in Power Save Mode can be approximated by: (VIN  VOUT ) u t ON iLPSM(peak) (2) L When VIN decreases to typically 15% above VOUT, the LMR22007 won't enter Power Save Mode, regardless of the load current. The device maintains output regulation in PWM mode. ENABLE (EN) The simplest way to enable the operation of the LMR22007 is to connect the EN pin to VIN which allows self start-up of the LMR22007 when the input voltage is applied. A resistor value of less than 3kΩ is recomended. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMR22007 11 LMR22007 SNVS985A – OCTOBER 2013 – REVISED OCTOBER 2013 www.ti.com Connect the EN pin to a voltage source greater than 0.9V to enable operation of the LMR22007. Apply a voltage less than 0.4V to put the part into shutdown mode. In shutdown mode the quiescent current drops to typically 300nA. An internal pull-down resistor of about 400kΩ keeps EN logic low, if the pin is floating. The pull-down resistor is disconnected if the pin is held High. During the soft start sequence the part will pull down with 2kΩ from the EN pin to ground. To keep the part from turning itself off when using a pull-up resistor, the resistor should be sized to keep the EN voltage above 0.9V when the UVLO threshold of the LMR22007 is reached. The 2kΩ is disconnected after start up. When the rise time of VIN is longer than the soft-start time of the LMR22007 this method may result in an overshoot in output voltage. In such applications, the EN pin voltage can be controlled by a separate logic signal, or tied to a resistor divider, which reaches 0.9V after VIN is fully established. Connecting the EN pin to an appropriate output signal of another power rail provides sequencing of multiple power rails. This will minimize the potential for output voltage overshoot during a slow VIN ramp condition. Use the lowest value of VIN, seen in your application when calculating the resistor network, to ensure that the 0.9V minimum EN threshold is reached. INPUT CURRENT LIMIT and RLIM SECTION The LMR22007 offers a user adjustable input current limit. Limiting the input current can be very useful when the upstream power supply has a tight current budget. The input current limit can be set over a range of 150mA to 1000mA by connecting a resistor from 100kΩ to 15kΩ from pin B2 and ground. The higher the value of the RLIM resistor, the lower the average input current limit. When the output current increases, either from increased load current or charging of external capacitors during start-up, the average input current will increase until it exceeds the set point. At this point the off time of the next switching cycle will be lengthened to lower the average input current. This has the effect of lowering the switching frequency and decreasing the duty cycle, thus lowering the output voltage. Although the average input current is limited the peak switch current can still increase, this peak current is limited by the low side current limit. A simplified equation for calculating the input current limit is shown below. 15000 Volts Input Current Limit RLIM (3) The input current limit is dependent on the delay of the comparator circuit (τ) and the inductor current ripple. When we include these higher order terms into the equation for the current limit set resistor we get the following equation. 15000 Volts RLIM (V  VOUT ) u VOUT u W Input Current Limit  IN VIN u L u K (4) Here, VIN is the input voltage where input current limit is most critical, VOUT is the output voltage set by the feedback resistors, L is the value of the inductor in µH, η is converter efficiency found in the characteristic charts, and the delay τ is a non linear factor with a typical value of 40ns. The higher the ripple current in the inductor the more the input current limit will vary with input voltage. However, variation of the input current limit is usually only significant when the inductor ripple current is comparable in magnitude to the current limit to be set. Please refer to the characteristic curves for input current limit for more details. The input current limit also tends to move up as the input voltage increases. This effect becomes much more significant as the device goes below 25% duty cycle. LOW SIDE CURRENT LIMIT The LMR22007 uses cycle-by-cycle current limiting to protect the output switches. During each switching cycle, a current limit comparator detects if the low side device current exceeds the low side current limit. If the low side current limit is exceeded the part skips the next on-time pulse until the current falls below the limit. This protects the part from current run-away due to short circuits of the output. 12 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: LMR22007 LMR22007 www.ti.com SNVS985A – OCTOBER 2013 – REVISED OCTOBER 2013 SOFT-START The LMR22007 has a fixed internal soft-start of 3.3 ms (typ). During soft-start, the error amplifier’s reference voltage ramps from 0.0 V to its nominal value of 0.9 V in approximately 3.3 ms. This forces the regulator output to ramp in a controlled fashion, which helps reduce inrush current. Upon soft-start the part will initially be in diode emulation mode to avoid discharging a pre-biased load. If the device is set to shutdown (EN
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