LMR50410QEVM

www.ti.com Table of Contents User’s Guide LMR50410QEVM User's Guide ABSTRACT The Texas Instruments LMR50410QEVM evaluation module (EVM) helps designers evaluate the operation and performance of the LMR50410-Q1 wide-input synchronous buck regulator. This document describes the setup, input/output connections of the EVM, board layout, schematic, and bill of materials. Table of Contents 1 Introduction.............................................................................................................................................................................2 2 Setup........................................................................................................................................................................................3 2.1 Input/Output Connector Description...................................................................................................................................3 2.2 Adjusting the Output Voltage..............................................................................................................................................3 3 LMR50410QEVM Schematic.................................................................................................................................................. 4 4 Board Layout...........................................................................................................................................................................5 5 Bill of Materials....................................................................................................................................................................... 7 Trademarks All other trademarks are the property of their respective owners. SLUUC77 – JULY 2020 Submit Document Feedback LMR50410QEVM User's Guide Copyright © 2020 Texas Instruments Incorporated 1 Introduction www.ti.com 1 Introduction The Texas Instruments LMR50410QEVM evaluation module (EVM) helps designers evaluate the operation and performance of the LMR50410-Q1 wide-input buck regulator. Figure 1-1. LMR50410QEVM Board EVM Features • • • • • • 4-V to 36-V input voltage range Default 3.3-V output Up to 1-A output current 2100-kHz switching frequency Hiccup mode short current protection Internal compensation The EVM contains one DC/DC converter (see Table 1-1). Table 1-1. Device and Package Configurations 2 CONVERTER EVM DEVICE PACKAGE U1 LMR50410QEVM LMR50410-Q1 SOT23-6 LMR50410QEVM User's Guide SLUUC77 – JULY 2020 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Setup www.ti.com 2 Setup This section describes the jumpers and connectors on the EVM and how to properly connect, set up, and use the LMR50410QEVM. 2.1 Input/Output Connector Description VIN — Terminal TP1 – Power input terminal for the converter. Adjacent to it is the GND reference ground. Use this terminal to attach the EVM to a cable harness. VOUT — Terminal TP3 – Regulated output voltage for the converter. Adjacent to it is the GND reference ground. GND — Terminal TP2, TP4 – Ground reference for the converter. Use these terminals to attach the EVM to a cable harness. ENABLE SETTING — Jumper JP1 – Used to enable the switch-mode converter. The device will be enabled when the EN pin is high, and disabled when low. JP1 1 2 3 Disable JP1 1 2 3 Enabled by VIN UVLO Figure 2-1. Vout Jumper Setting Enable Jumper Setting Testpoint — TP6, TP7, TP9 – Test points used for loop response measurements 2.2 Adjusting the Output Voltage If other outputs need to be configured, adjust the feedback resistors using the Equation 1. VOUT = VREF × ( 1 + ( R4 / R5 ) ) (1) where • VREF is 1.0 V SLUUC77 – JULY 2020 Submit Document Feedback LMR50410QEVM User's Guide Copyright © 2020 Texas Instruments Incorporated 3 LMR50410QEVM Schematic www.ti.com 3 LMR50410QEVM Schematic Figure 3-1. LMR50410QEVM Schematic 4 LMR50410QEVM User's Guide SLUUC77 – JULY 2020 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Board Layout www.ti.com 4 Board Layout Figure 4-1 to Figure 4-4 show the board layout for the LMR50410QEVM. The PCB consists of a 4-layer design. The board size is 46-mm x 69-mm, 2-oz copper planes are applied on top and bottom layers, 1-oz copper planes are applied on middle layers. Figure 4-1. Top Layer Figure 4-2. Middle Layer One Figure 4-3. Middle Layer Two SLUUC77 – JULY 2020 Submit Document Feedback LMR50410QEVM User's Guide Copyright © 2020 Texas Instruments Incorporated 5 Board Layout www.ti.com Figure 4-4. Bottom Layer 6 LMR50410QEVM User's Guide SLUUC77 – JULY 2020 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated www.ti.com Bill of Materials 5 Bill of Materials Table 5-1. Bill of Materials DESIGNATOR QUANTITY VALUE DESCRIPTION PACKAGE REFERENCE PART NUMBER C1 1 2.2 μF CAP, CERM, 2.2 μF, 50 V, ±10%, X7R, 0805 0805 C2 1 0.1 μF CAP, CERM, 0.1 μF, 50 V, ±10%, X7R, 0603 0603 C3 1 0.1 μF CAP, CERM, 0.1 μF, 25 V, ±10%, X7R, 0402 0402 C4 1 10 μF CAP, CERM, 10 μF, 25 V, ±10%, X7R, 0805 0805 C6 1 0.1 μF CAP, CERM, 0.1 μF, 25 V, ±10%, X7R, 0603 0603 JP1 1 Header, 100 mil, 3x1, Tin, TH Header, 3 PIN, 100mil, Tin L1 1 3.3-µH Shielded Molded Inductor 2.5-A 76-mΩ Max Nonstandard SMT_IND_4MM06_4MM 74437324033 06 R1 1 402 k RES, 402 k, 1%, 0.1 W, 0603 0603 R2 1 133 k RES, 133 k, 1%, 0.1 W, 0603 0603 R3 1 51 RES, 51, 5%, 0.1 W, 0603 0603 R4 1 51.0 k RES, 51.0 k, 1%, 0.1 W, 0603 0603 R5 1 22.1 k RES, 22.1 k, 1%, 0.1 W, 0603 0603 SH-J1 1 1x2 Shunt, 100 mil, Gold plated, Black Shunt TP1, TP2, TP3, TP4 4 Terminal, Turret, TH, Double Keystone1502-2 TP6 1 Test Point, Multipurpose, Red, TH Red Multipurpose Testpoint TP7, TP8 2 Test Point, Multipurpose, Yellow, TH Yellow Multipurpose Testpoint TP9 1 Test Point, Multipurpose, Black, TH Black Multipurpose Testpoint U1 1 LMR50410YQDBVRQ1, DBV0006A (SOT-23-6) DBV0006A C5 0 22 μF CAP, CERM, 22 μF, 25 V, ±20%, X7R 1812 C7 0 22 pF CAP, CERM, 22 pF, 50 V, ±5%, C0G/NP0, 0603 0603 C8 0 47 μF CAP, AL, 47 μF, 50 V, ±20%, 0.6 Ω, SMD F80 C9, C10, C11 0 2.2 μF CAP, CERM, 2.2 μF, 50 V, ±10%, X7R, 0805 0805 L2 0 1000 Ω Ferrite Bead, 1000 Ω at 100 MHz, 1.5 A, 1806 L3 0 1 μH Inductor, Shielded, Metal Composite, 1 µH, 2.9 A, 0.048 Ω, SMD L4 0 600 Ω TP5 0 MANUFACTURER Wurth Electronics LMR50410YQDBVRQ1 Texas Instruments 1806 BLM41PG102SN1L MuRata 2x1.6mm DFE201612E-1R0M MuRata Ferrite Bead, 600 Ω at 100 MHz, 1.5 A, 1206 1206 BLM31PG601SH1L MuRata Terminal, Turret, TH, Double Keystone1502-2 SLUUC77 – JULY 2020 Submit Document Feedback LMR50410QEVM User's Guide Copyright © 2020 Texas Instruments Incorporated 7 IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. 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