LMS202EIM/NOPB

LMS202EIM/NOPB

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC16_150MIL

  • 描述:

    IC TRANSCEIVER FULL 2/2 16SOIC

  • 数据手册
  • 价格&库存
LMS202EIM/NOPB 数据手册
LMS202E www.ti.com SNLS160D – DECEMBER 2002 – REVISED APRIL 2013 LMS202E 15KV ESD Rated, 5V Single Supply TIA/EIA-232 Dual Transceivers Check for Samples: LMS202E FEATURES DESCRIPTION • • The LMS202E features two transmitters and two receivers for RS-232 communication. It has a DC-toDC converter that permits the device to operate with only a single +5V power supply. The on-chip DC-toDC converter which utilizes four external 0.1μF capacitors to generate dual internal power supplies for RS-232 compatible output levels. 1 2 • • • • • • • ESD Protection for RS-232 I/O Pins ±15kV-IEC1000 4-2 (EN61000-4-2) Contact Discharge ±8kV-IEC1000 4-2 (EN61000-4-2) Air-Gap Discharge ±15kV Human Body Model Single +5V Power Supply 230 Kbps Data Rate On-Board DC-to-DC Converter 0.1μF Charge Pump Capacitors Drop-In Replacement to Maxim’s MAX202E APPLICATIONS • • • POS Equipment (Bar code reader) Hand-Held Equipment General Purpose RS-232 Communication The device meet EIA/TIA-232E and CCITT V.28 specifications up to 230kbits/sec. The LMS202E is available in a 16 pin narrow and wide SOIC package. The transmitter outputs and receiver inputs have ±15kV electrostatic discharge (ESD) protection. The LMS202E survives a ± 15kV ESD event to the RS232 input and output pins when subjected according to Human Body Model or IEC 1000-4-2 (EN61000-42), air-gap specification. It survives a ±8kV discharge when subjected to IEC 1000-4-2 (EN61000-4-2), contact specification. This device is designed for use in harsh environments where ESD is a concern. CONNECTION DIAGRAM AND TYPICAL CIRCUIT 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2002–2013, Texas Instruments Incorporated LMS202E SNLS160D – DECEMBER 2002 – REVISED APRIL 2013 www.ti.com PIN DESCRIPTIONS Pin Number Pin Name Pin Function 1, 3 C1+, C1− External capacitor connection pins. Recommended external capacitor C1 = 0.1μF (6.3V) 2 V+ Positive supply for TIA/EIA-232E drivers. Recommended external capacitor C4 = 0.1μF (6.3V) 4, 5 C2+, C2− External capacitor connection pins. Recommended external capacitor C2 = 0.1μF (16V) 6 V− Negative supply for TIA/EIA-232E drivers. Recommended external capacitor C3 = 0.1μF (16V) 7, 14 T1out, T2out Transmitter output pins conform to TIA/EIA-232E levels. The typical transmitter output swing is ±8V when loaded 3kΩ load to ground. The open-circuit output voltage swings from (V+ − 0.6V) to V− 8,13 R1in, R2in Receiver inputs accept TIA/EIA-232 9, 12 R1out and R2out Receiver output pins are TTL/CMOS compatible 10, 11 Tin1, Tin2 Transmitter input pins are TTL/CMOS compatible. Inputs of transmitter do not have pull-up resistors. Connect all unused transmitter inputs to ground 15 GND Ground pin 16 VS Power supply pin for the device, +5V (±10%) These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS (1) (2) VS −0.3V to 6V V+ (VS − 0.3V) to + 14V +0.3V to −14V V− −0.3V to (V+ +0.3V) Driver Input Voltage, TIN Receiver Input Voltage, RIN ± 30V (V− −0.3V to (V+ + 0.3V) Driver Output Voltage TO −0.3 to (VS + 0.3) Receiver Output Voltage RO Short Circuit Duration, TO ESD Rating Continuous IEC 1000-4-2) (3) See (4) Air-Gap Discharge 15kV Contact Discharge Human Body Model 8kV (5) See (4) See (6) ESD Rating (MM) Soldering Information (20sec.) (3) (4) (5) (6) (7) 2 (7) (6) 235°C 150°C −65°C to +150°C Storage Temperature Range (2) 2kV 200V Infrared or Convection Junction Temperature (1) 15kV Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For specifications and the test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. IEC 1000-4-2, 330Ω in series with 150pF ESD rating applies to pins 7,8 13 and 14 Human Body Model, 1.5kΩ in series with 100pF ESD rating applies to pins 1, 2, 3, 4, 5, 6, 9, 10, 11, 12, 15 and 16 Machine model, 0Ω in series with 200pF Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMS202E LMS202E www.ti.com SNLS160D – DECEMBER 2002 – REVISED APRIL 2013 OPERATING RATINGS Supply Voltage VS 4.5V to 5.5V Ambient Temperature Range, TA Commercial (C) 0°C to +70°C −40°C to +85°C Industrial (I) Package Thermal Resistance (1) SO 71°C/W WSO 55°C/W The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) − TA)/ θJA. All numbers apply for packages soldered directly onto a PC board. (1) ELECTRICAL CHARACTERISTICS Over recommended operating supply and temperature ranges unless otherwise specified C1 = C2 = C3 = C4 = Cbp = 0.1μF Symbol Parameter Conditions (1) Min Typ (2) Max (1) Units DC Characteristics IS Supply Current No Load, TA = 25°C IINPUT Input Leakage Current VTHL Input Logic Theshold Low VTHH Input Logic Theshold High TIN VOL TTL/CMOS Output Voltage Low ROUT, IOUT = 3.2mA VOH TTL/CMOS Output Voltage High ROUT, IOUT = −1.0mA 1 7 mA TIN = 0V to VS ±10 μA TIN 0.8 V Logic 2.0 V 0.4 3.5 V VS −0.1 V RS-232 Receiver Inputs −30 VRI Receiver Input Voltage Range VRTHL Receiver Input Theshold Low VS = 5V, TA = 25°C VRTHH Receiver Input Theshold High VS = 5V, TA = 25°C VHYST Receiver Input Hysteresis VS = 5V RI Receiver Input Resistance 0.8 +30 V 1.4 V 2 2.4 V 0.2 0.6 1.0 V VS = 5V, TA = 25°C 3 5 7 kΩ ±8 RS-232 Transmitter Outputs VO Transmitter Output Voltage Swing All transmitters loaded with 3kΩ to GND ±5 RO Output Resistance VS = V+ = V− = 0V, VO = ± 2V 300 IOS Output Short Circuit Current V Ω ±11 ±60 mA Timing Characteristics DR Maximum Data Rate CL = 50pF to 1000pF, RL = 3kΩ to 7kΩ 230 TRPLH TRPHL Receiver Propagation Delay CL = 150pF 0.08 TDPLH TDPHL Transmitter Propagation Delay RL = 3kΩ, CL = 2500pF All transmitters loaded 2.4 VSLEW Transition Region Slew Rate TA = 25°C, VS = 5V CL = 50pF to 1000pF, RL = 3kΩ to 7kΩ Measured from +3V to −3V or vice versa 3 kbps 6 μs 1 μs 30 V/μs ESD Performance: Transmitter Outputs and Receiver Inputs ESD Rating (1) (2) Human Body Model ±15 IEC 1000-4-2, Contact ±8 IEC 1000-4-2, Air-gap ±15 kV All limits are specified by testing or statistical analysis Typical Values represent the most likely parametric norm. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMS202E 3 LMS202E SNLS160D – DECEMBER 2002 – REVISED APRIL 2013 www.ti.com TYPICAL CHARACTERISTICS Transmitter Output High Voltage vs. Load Capacitance 4 Transmitter Slew Rate vs. Load Capacitance Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMS202E LMS202E www.ti.com SNLS160D – DECEMBER 2002 – REVISED APRIL 2013 APPLICATION INFORMATION CAPACITOR SELECTION The recommended capacitors are 0.1μF. However, larger capacitors for the charge pump may be used to minimized ripples on V+ and V− pins. POWER SUPPLY DECOUPLING In some applications that are sensitive to power supply noise from the charge pump, place a decoupling capacitor, Cbp, from VS to GND. Use at least a 0.1µF capacitor or the same size as the charge pump capacitors (C1 − C4). CHARGED PUMP The dual internal charged-pump provides the ±10V to the to transmitters. Using capacitor C1, the charge pump converts +5V to +10V then stores the +10V in capacitor C3. The charge pump uses capacitor C2 to invert the +10V to −10V. The −10V is then stored in capacitor C4. ELECTROSTATIC DISCHARGE PROTECTION ESD protection has been placed at all pins to protect the device from ESD. All pins except for the transmitter output pins (pins 7 and 14) and receiver input pins (pins 8 and 13) have a ESD rating of 2kV Human Body Model (HBM) and 200V Machine Model (MM). The RS-232 bus pins (pins 7, 8, 13 and 14) have a more robust ESD protection. The RS-232 bus pins have a ESD rating of 15kV HBM and IEC 1000-4-2, air-gap. In addition the bus pins meet an ESD rating of 8kV with IEC 1000-4-2, contact. The ESD structures can withstand a high ESD event under the following conditions: powered-on, powered-off, and Input connected to high and low with outputs unloaded. HUMAN BODY MODEL The Human Body Model is an ESD testing standard, defined in Mil-STD-883C method 3015.7. It simulates a human discharging an ESD charge to the IC device. The rise time is approximately 10 ns and decay time is approximately 150 ns. The waveform is obtained by discharging 2kV volts capacitor through a resistor, R2 = 1.5 kΩ. The peak current is approximately 1.33A. Figure 1. HBM ESD Test Model Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMS202E 5 LMS202E SNLS160D – DECEMBER 2002 – REVISED APRIL 2013 www.ti.com Figure 2. HBM Waveform MACHINE MODEL The Machine Model is the standard ESD test method in Japan and the automotive industry. It simulates a charge on large object discharging through the IC device. This takes place in automated test and handling systems. The equipment can accumulate static charge due to improper grounding, which is transmitted through the IC when it is picked and placed. The waveform is obtained by discharging 400V volts capacitor to the device. Resistor, R2 = 0Ω. The parasitic inductance, L, from the PCB affects the peak current and period of the waveform. For L = 0.5µF, the peak current is approximately 7A with a period of 60 ns. For L = 2.5µH, the peak current is reduced to 4A with a period of 140 ns. Figure 3. MM ESD Model Figure 4. MM Waveform 6 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMS202E LMS202E www.ti.com SNLS160D – DECEMBER 2002 – REVISED APRIL 2013 IEC 1000-4-2 (EN61000-4-2) The European Union requires ESD immunity testing for all electronic products as a condition for EMC Mark before shipping to any member countries. This is not a IC requirement but an overall system requirement. IEC 1000-4-2 specifies ESD testing both by contact and air-gap discharge. ESD testing by contact are generally more repeatable than air-gap but is less realistic to actual ESD event. However, air-gap discharge is more realistic but ESD results may vary widely dependent on environmental conditions (temperature, humidity,....) The waveform is obtained by discharging 150pF capacitor through a resistor, R2 = 330Ω. A typical peak current may be high as 37A with 10kV. Figure 5. IEC ESD Model Figure 6. IEC Waveform Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMS202E 7 LMS202E SNLS160D – DECEMBER 2002 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision C (April 2013) to Revision D • 8 Page Changed layout of National Data Sheet to TI format ............................................................................................................ 7 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LMS202E PACKAGE OPTION ADDENDUM www.ti.com 25-Feb-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LMS202ECM/NOPB ACTIVE SOIC D 16 48 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMS202ECM LMS202ECMX/NOPB ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMS202ECM LMS202EIM/NOPB ACTIVE SOIC D 16 48 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMS202EIM LMS202EIMX/NOPB ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMS202EIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Feb-2015 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 5-Dec-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LMS202ECMX/NOPB SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1 LMS202EIMX/NOPB SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 5-Dec-2014 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMS202ECMX/NOPB SOIC D 16 2500 367.0 367.0 35.0 LMS202EIMX/NOPB SOIC D 16 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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