LMV1091TMX/NOPB

LMV1091TMX/NOPB

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    WFBGA25

  • 描述:

    LMV1091TMX/NOPB

  • 数据手册
  • 价格&库存
LMV1091TMX/NOPB 数据手册
LMV1091 www.ti.com SNAS481C – OCTOBER 2009 – REVISED MAY 2013 LMV1091 Dual Input, Far Field Noise Suppression Microphone Amplifier Check for Samples: LMV1091 FEATURES DESCRIPTION • • • • • • • • The LMV1091 is a fully analog dual differential input, differential output, microphone array amplifier designed to reduce background acoustic noise, while delivering superb speech clarity in voice communication applications. 1 2 No Loss of Voice Intelligibility Low Power Consumption Shutdown Function No added Processing Delay Differential Outputs Adjustable 12 - 54dB Gain Excellent RF Immunity Available in a 25–Bump DSBGA Package APPLICATIONS • • • • Mobile Headset Mobile and Handheld Two-way Radios Bluetooth and Other Powered Headsets Hand-held Voice Microphones KEY SPECIFICATIONS • • • • • • • • Far Field Noise Suppression Electrical (FFNSE at f = 1kHz): 34dB (typ) SNRIE: 26dB (typ) Supply Voltage: 2.7V to 5.5V Supply Current: 600μA (typ) Standby Current: 0.1μA (typ) Signal-to-Noise Ratio (Voice band): 65dB (typ) Total Harmonic Distortion + Noise: 0.1% (typ) PSRR (217Hz): 99dB (typ) The LMV1091 preserves near-field voice signals within 4cm of the microphones while rejecting far-field acoustic noise greater than 50cm from the microphones. Up to 20dB of far-field rejection is possible in a properly configured and using ±0.5dB matched micropohones. Part of the Powerwise™ family of energy efficient solutions, the LMV1091 consumes only 600μA of supply current providing superior performance over DSP solutions consuming greater than ten times the power. The dual microphone inputs and the processed signal output are differential to provide excellent noise immunity. The microphones are biased with an internal low-noise bias supply. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009–2013, Texas Instruments Incorporated LMV1091 SNAS481C – OCTOBER 2009 – REVISED MAY 2013 www.ti.com System Diagram Far-field noise, > 50 cm Near-Field Voice Tra ffic N Up to 4 cm ois e Lo ud LMV1091 Pure analog solution provides superior performance over DSP solutions Music Analog Noise Canceling Block Crowd Noise Anno unce men ts e Ma in ch Near-Field Voice eN ois Far field noise reduced by up to 20 dB in properly configured and using +/-0.5 dB matched microphones +/-0.5 dB matched omnidirectional microphones Typical Application VDD CVREF C1 10 nF 1 PF REF VDD Mic Bias Bias Mute 2 RIN3 1.1 k: RIN1 1.1 k: Mic CNTRL CIN1 470 nF CIN2 LPF+ Mute 1 * Mic2- 470 nF CIN4 LPF- + 470 nF CIN3 Mic1+ * OUT- Mic1- 470 nF RIN4 RIN2 1.1 k: 1.1 k: Optimized Audio Ouput OUT+ Mic2+ Pre-Amp Gain (6 - 36 dB) GND GA0 GA1 GA2 Optimized Audio Ouput Post-Amp Gain (6-18 dB) Shutdown Mode SD Mode 0 Mode 1 GA3 GB0 GB1 GB2 * The value of the low-pass filter capacitor is application dependent, see the application section for additional information. Figure 1. Typical Dual Microphone Far Field noise Cancelling Application 2 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1091 LMV1091 www.ti.com SNAS481C – OCTOBER 2009 – REVISED MAY 2013 Connection Diagram 1 2 3 4 5 A Mic Bias Mic2+ Mic2- Mic1+ Mic1- B Mode0 Mode1 GA0 GA1 GND C Mute2 GB0 NC GA2 REF D Mute1 GB1 GB2 GA3 VDD E LPF+ OUT+ OUT- LPF- _SD Figure 2. 25-Bump DSBGA (Top View) See YFQ0025 Package PIN NAME AND FUNCTION Bump Numbe r Pin Name A1 A2 Pin Function Pin Type MIC BIAS Microphone Bias Analog Output MIC2+ Microphone 2 positive input Analog Input A3 MIC2– Microphone 2 negative input Analog Input A4 MIC1+ Microphone 1 positive input Analog Input A5 MIC1– Microphone 1 negative input Analog Input B1 MODE0 Mic mode select pin Digital Input B2 MODE1 Mic mode select pin Digital Input B3 GA0 Pre-Amplifier Gain select pin Digital Input B4 GA1 Pre-Amplifier Gain select pin Digital Input B5 GND Ground Ground C1 MUTE2 Mute select pin Digital Input C2 GB0 Post-Amplifier Gain select pin Digital Input C3 NC No Connect C4 GA2 Pre-Amplifier Gain select pin Digital Input C5 REF Reference voltage de-coupling Analog Ref D1 MUTE1 Mute select pin Digital Input D2 GB1 Post-Amp Gain select pin Digital Input D3 GB2 Post-Amp Gain select pin Digital Input D4 GA3 Pre-Amp Gain select pin Digital Input D5 VDD Power Supply Supply E1 LPF+ Low pass Filter for positive output Analog Input E2 OUT+ Positive optimized audio output Analog Output E3 OUT- Negative optimized audio output Analog Output E4 LPF- Low pass Filter for negative output Analog Input E5 SD Chip enable Digital Input Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1091 3 LMV1091 SNAS481C – OCTOBER 2009 – REVISED MAY 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Supply Voltage 6.0V Storage Temperature -85°C to +150°C Power Dissipation (3) Internally Limited ESD Rating (4) 2000V ESD Rating (5) 200V CDM 500V Junction Temperature (TJMAX) 150°C Mounting Temperature Infrared or Convection (20 sec.) 235°C Thermal Resistance θJA (DSBGA) 70°C/W Soldering Information See SNVA009A “microSMD Wafer Level Chip Scale Package.” (1) (2) (3) (4) (5) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. The maximum power dissipation must be de-rated at elevated temperatures and is dictated by TJMAX, θJC, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX – TA) / θJA or the number given in the Absolute Maximum Ratings, whichever is lower. For the LMV1091, TJMAX = 150°C and the typical θJA for this DSBGA package is 70°C/W. Refer to the Thermal Considerations section for more information. Human body model, applicable std. JESD22-A114C. Machine model, applicable std. JESD22-A115-A. Operating Ratings (1) Supply Voltage 2.7V ≤ VDD ≤ 5.5V TMIN ≤ TA ≤ TMAX −40°C ≤ TA ≤ +85°C (1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified. Electrical Characteristics 3.3V (1) (2) Unless otherwise specified, all limits ensured for TA = 25°C, VDD = 3.3V, VIN = 18mVP-P, f = 1kHz, SD = VDD, Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF, f = 1kHz pass through mode. Symbol SNR eN (1) (2) (3) (4) 4 Parameter LMV1091 Conditions Typical (3) Limits (4) Units (Limits) VIN = 18mVP-P, A-weighted, Audio band 63 dB Signal-to-Noise Ratio VOUT = 18VP-P, voice band (300–3400Hz) 65 dB Input Referred Noise level A-Weighted 5 μVRMS “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified. The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured. Typical values represent most likely parametric norms at TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not ensured. Datasheet min/max specification limits are specified by test, or statistical analysis. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1091 LMV1091 www.ti.com SNAS481C – OCTOBER 2009 – REVISED MAY 2013 Electrical Characteristics 3.3V(1)(2) (continued) Unless otherwise specified, all limits ensured for TA = 25°C, VDD = 3.3V, VIN = 18mVP-P, f = 1kHz, SD = VDD, Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF, f = 1kHz pass through mode. VIN VOUT THD+N ZIN Maximum Input Signal THD+N < 1%, Pre Amp Gain = 6dB 880 820 mVP-P (min) Maximum AC Output Voltage Differential Out+, OutTHD+N < 1% 1.2 1.1 VRMS (min) DC Level at Outputs Out+, Out- 820 Total Harmonic Distortion + Noise Differential Out+ and Out- 0.1 0.2 % (max) mV Input Impedance 142 kΩ ZOUT Output Impedance 220 Ω ZLOAD Load Impedance (Out+, Out-) (5) RLOAD CLOAD AM Microphone Preamplifier Gain Range Minimum Maximum AMR Microphone Preamplifier Gain Adjustment Resolution AP Post Amplifier Gain Range APR Post Amplifier Gain Resolution 10 100 6 36 2 Minimum Maximum dB dB 1.7 2.3 6 18 3 kΩ (min) pF (max) dB (min) dB (max) dB dB 2.6 3.4 dB (min) dB (max) FFNSE Far Field Noise Suppression Electrical f = 1kHz (See Test Methods) f = 300Hz (See Test Methods) 34 42 26 SNRIE Signal-to-Noise Ratio Improvement Electrical f = 1kHz (See Test Methods) f = 300Hz (See Test Methods) 26 33 18 PSRR Power Supply Rejection Ratio fRIPPLE = 217Hz (VRIPPLE = 100mVP-P) 99 85 dB (min) fRIPPLE = 1kHz (VRIPPLE = 100mVP-P) 95 80 dB (min) Input referred 60 1.85 2.15 V (min) V (max) dB dB Input Referred, Input AC grounded CMRR (5) (6) Common Mode Rejection Ratio VBM Microphone Bias Supply Voltage IBIAS = 1.2mA eVBM Mic bias noise voltage on VREF pin A-Weighted, CB = 10nF IDDQ Supply Quiescent Current VIN = 0V 0.60 IDD Supply Current VIN = 25mVP-P both inputs Noise cancelling mode 0.60 SD pin = GND 0.1 ISD Shut Down Current TON Turn-On Time (6) TOFF Turn-Off Time (6) VIH Logic High Input Threshold GA0, GA1, GA2, GA3, GB0, GB1, GB2, Mute1, Mute2, Mode 0, Mode 1, SD VIL Logic Low Input Threshold GA0, GA1, GA2, GA3, GB0, GB1, GB2, Mute1, Mute2, Mode 0, Mode 1, SD 2.0 dB μVRMS 7 0.8 mA (max) mA 0.7 μA (max) 40 ms (max) 60 ms (max) 1.4 V (min) 0.4 V (max) Specified by design. Specified by design. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1091 5 LMV1091 SNAS481C – OCTOBER 2009 – REVISED MAY 2013 www.ti.com Electrical Characteristics 5.0V (1) Unless otherwise specified, all limits ensured for TA = 25°C, VDD = 5V, VIN = 18mVP-P, SD = VDD, Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF, f = 1kHz pass through mode. Symbol Parameter LMV1091 Conditions Typical (2) Limit (3) Units (Limits) VIN = 18mVP-P, A-weighted, Audio band 63 dB Signal-to-Noise Ratio VOUT = 18mVP-P, voice band (300–3400Hz) 65 dB eN Input Referred Noise level A-Weighted 5 μVRMS VIN Maximum Input Signal THD+N < 1% 880 820 mVP-P (min) Maximum AC Output Voltage f = 1kHz, THD+N < 1% between differential output 1.2 1.1 VRMS (min) 0.2 % (max) SNR VOUT DC Output Voltage THD+N ZIN ZOUT Total Harmonic Distortion + Noise 820 Differential Out+ and Out- 0.1 mV Input Impedance 142 kΩ Output Impedance 220 Ω 6 36 dB dB AM Microphone Preamplifier Gain Range AMR Microphone Preamplifier Gain Adjustment Resolution AP Post Amplifier Gain Range APR Post Amplifier Gain Adjustment Resolution Minimum Maximum 2 Minimum Maximum 1.7 2.3 6 18 3 dB (min) dB (max) dB dB 2.6 3.4 dB (min) dB (max) FFNSE Far Field Noise Suppression Electrical f = 1kHz (See Test Methods) f = 300Hz (See Test Methods) 34 42 26 SNRIE Signal-to-Noise Ratio Improvement Electrical f = 1kHz (See Test Methods) f = 300Hz (See Test Methods) 26 33 18 PSRR Power Supply Rejection Ratio fRIPPLE = 217Hz (VRIPPLE = 100mVP-P) 99 85 dB (min) fRIPPLE = 1kHz (VRIPPLE = 100mVP-P) 95 80 dB (min) CMRR Common Mode Rejection Ratio Input referred 60 1.85 2.15 V ( min) V (max) dB dB Input Referred, Input AC grounded (1) (2) (3) 6 2.0 dB VBM Microphone Bias Supply Voltage IBIAS = 1.2mA eVBM Microphone bias noise voltage on VREF pin A-Weighted, CB = 10nF IDDQ Supply Quiescent Current VIN = 0V 0.60 IDD Supply Current VIN = 25mVP-P both inputs Noise cancelling mode 0.60 mA ISD Shut Down Current SD pin = GND 0.1 μA TON Turn On Time 40 ms (max) TOFF Turn Off Time 60 ms (max) 1.4 V (min) 0.4 V (max) μVRMS 7 VIH Logic High Input Threshold GA0, GA1, GA2, GA3, GB0, GB1, GB2, Mute1, Mute2, Mode 0, Mode 1, SD VIL Logic Low Input Threshold GA0, GA1, GA2, GA3, GB0, GB1, GB2, Mute1, Mute2, Mode 0, Mode 1, SD 0.8 mA (max) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified. Typical values represent most likely parametric norms at TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not ensured. Datasheet min/max specification limits are specified by test, or statistical analysis. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1091 LMV1091 www.ti.com SNAS481C – OCTOBER 2009 – REVISED MAY 2013 Test Methods LMV1091 Mic2+ Osc2 LPF 470 nF Mic2- OUT+ AC Voltmeter 470 nF Mic1+ Osc1 470 nF Mic1- OUT- 470 nF Figure 3. FFNSE, NFSLE, SNRIE Test Circuit FAR FIELD NOISE SUPPRESSION (FFNSE) For optimum noise suppression the far field noise should be in a broadside array configuration from the two microphones (see Figure 20). Which means the far field sound source is equidistance from the two microphones. This configuration allows the amplitude of the far field signal to be equal at the two microphone inputs, however a slight phase difference may still exist. To simulate a real world application a slight phase delay was added to the FFNSE test. The block diagram from Figure 18 is used with the following procedure to measure the FFNSE. 1. A sine wave with equal frequency and amplitude (25mVP-P) is applied to Mic1 and Mic2. Using a signal generator, the phase of Mic 2 is delayed by 1.1° when compared with Mic1. 2. Measure the output level in dBV (X) 3. Mute the signal from Mic2 4. Measure the output level in dBV (Y) 5. FFNSE = Y - X dB NEAR FIELD SPEECH LOSS (NFSLE) For optimum near field speech preservation, the sound source should be in an endfire array configuration from the two microphones (see Figure 21). In this configuration the speech signal at the microphone closest to the sound source will have greater amplitude than the microphone further away. Additionally the signal at microphone further away will experience a phase lag when compared with the closer microphone. To simulate this, phase delay as well as amplitude shift was added to the NFSLE test. The schematic from Figure 18 is used with the following procedure to measure the NFSLE. 1. A 25mVP-P and 17.25mVP-P (0.69*25mVP-P) sine wave is applied to Mic1 and Mic2 respectively. Once again, a signal generator is used to delay the phase of Mic2 by 15.9° when compared with Mic1. 2. Measure the output level in dBV (X) 3. Mute the signal from Mic2 4. Measure the output level in dBV (Y) 5. NFSLE = Y - X dB SIGNAL TO NOISE RATIO IMPROVEMENT ELECTRICAL (SNRIE) The SNRIE is the ratio of FFNSE to NFSLE and is defined as: SNRIE = FFNSE - NFSLE Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1091 7 LMV1091 SNAS481C – OCTOBER 2009 – REVISED MAY 2013 www.ti.com Measuring Noise and SNR The overall noise of the LMV1091 is measured within the frequency band from 10Hz to 22kHz using an Aweighted filter. The Mic+ and Mic- inputs of the LMV1091 are AC shorted between the input capacitors, see Figure 4. LMV1090 Mic2+ short 470 nF Mic2- LPF OUT+ A-WEIGHTED FILTER AC Voltmeter 470 nF Mic1+ short 470 nF Mic1- OUT- 470 nF Figure 4. Noise Measurement Setup For the signal to noise ratio (SNR) the signal level at the output is measured with a 1kHz input signal of 18mVP-P using an A-weighted filter. This voltage represents the output voltage of a typical electret condenser microphone at a sound pressure level of 94dB SPL, which is the standard level for these measurements. The LMV1091 is programmed for 26dB of total gain (20dB preamplifier and 6dB postamplifier) with only Mic1 or Mic2 used. The input signal is applied differentially between the Mic+ and Mic-. Because the part is in Pass Through mode the low-pass filter at the output of the LMV1091 is disabled. 8 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1091 LMV1091 www.ti.com SNAS481C – OCTOBER 2009 – REVISED MAY 2013 Typical Performance Characteristics Unless otherwise specified, TJ = 25°C, VDD = 3.3V, Input Voltage = 18mVP-P, f = 1kHz, pass through mode, Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF. THD+N vs Frequency Mic2 = AC GND, Mic1 = 36mVP-P Noise Canceling Mode 10 10 1 1 THD+N (%) THD+N (%) THD+N vs Frequency Mic1 = AC GND, Mic2 = 36mVP-P Noise Canceling Mode 0.1 0.1 0.01 0.01 0.001 20 100 0.001 20 10k 20k 1k 100 10k 20k Figure 5. Figure 6. THD+N vs Frequency Mic1 = 36mVP-P Mic1 Pass Through Mode THD+N vs Frequency Mic2 = 36mVP-P Mic2 Pass Through Mode 10 10 1 1 0.1 0.1 0.01 0.01 0.001 20 100 1k FREQUENCY (Hz) 10k 20k 0.001 20 100 10k 20k 1k FREQUENCY (Hz) Figure 7. Figure 8. THD+N vs Input Voltage Mic1 = AC GND, f = 1kHz Mic2 Noise Canceling Mode THD+N vs Input Voltage Mic2 = AC GND, f = 1kHz Mic1 Noise Canceling Mode 100 100 10 10 THD+N (%) THD+N (%) 1k FREQUENCY (Hz) THD+N (%) THD+N (%) FREQUENCY (Hz) 1 0.1 0.01 0.001 1 0.1 0.01 0.1 0.01 0.001 1 0.01 0.1 INPUT VOLTAGE (VP-P) INPUT VOLTAGE (VP-P) Figure 9. Figure 10. 1 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1091 9 LMV1091 SNAS481C – OCTOBER 2009 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified, TJ = 25°C, VDD = 3.3V, Input Voltage = 18mVP-P, f = 1kHz, pass through mode, Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF. THD+N vs Input Voltage f = 1kHz Mic1 Pass Through Mode THD+N vs Input Voltage f = 1kHz Mic2 Pass Through Mode 10 10 THD+N (%) 100 THD+N (%) 100 1 1 0.1 0.1 0.01 0.001 0.01 0.1 0.01 0.001 1 0.01 0.1 1 INPUT VOLTAGE (VP-P) Figure 11. Figure 12. PSRR vs Frequency Pre Amp Gain = 20dB, Post Amp Gain = 6dB VRIPPLE = 100mVP-P, Mic1 = Mic2 = AC GND Mic1 Pass Through Mode PSRR vs Frequency Pre Amp Gain = 20dB, Post Amp Gain = 6dB VRIPPLE = 100mVP-P, Mic1 = Mic2 = AC GND Mic2 Pass Through Mode +0 +0 -10 -10 -20 -20 -30 -30 -40 -40 PSRR (dB) PSRR (dB) INPUT VOLTAGE (VP-P) -50 -60 -70 -80 -50 -60 -70 -80 -90 -90 -100 -100 -110 20 100 1k FREQUENCY (Hz) 10k 20k -110 20 100 1k FREQUENCY (Hz) 10k 20k Figure 13. Figure 14. PSRR vs Frequency Pre Amp Gain = 20dB, Post Amp Gain = 6dB VRIPPLE = 100mVP-P, Mic1 = Mic2 = AC GND Noise Canceling Mode Far Field Noise Suppression Electrical vs Frequency 60 +0 -10 50 -20 40 FFNSE (Hz) PSRR (dB) -30 -40 -50 -60 -70 30 20 -80 10 -90 -100 -110 20 100 1k FREQUENCY (Hz) 0 100 10k 20k Figure 15. 10 1k 10k FREQUENCY (Hz) Figure 16. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1091 LMV1091 www.ti.com SNAS481C – OCTOBER 2009 – REVISED MAY 2013 Typical Performance Characteristics (continued) Unless otherwise specified, TJ = 25°C, VDD = 3.3V, Input Voltage = 18mVP-P, f = 1kHz, pass through mode, Pre Amp gain = 20dB, Post Amp gain = 6dB, RL = 100kΩ, and CL = 4.7pF. Signal-to-Noise Ratio Electrical vs Frequency 35 30 SNRIE (Hz) 25 20 15 10 5 0 100 1k 10k FREQUENCY (Hz) Figure 17. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1091 11 LMV1091 SNAS481C – OCTOBER 2009 – REVISED MAY 2013 www.ti.com APPLICATION DATA INTRODUCTION The LMV1091 is a fully analog single chip solution to reduce the far field noise picked up by microphones in a communication system. A simplified block diagram is provided in Figure 18. Post Amp Gain (6 dB - 18 dB) Preamp Gain (6 dB - 36 dB) Mic1 Analog Noise Cancelling Block OUT+ Optimized Audio Ouput OUT- Mic2 Figure 18. Simplified Block Diagram of the LMV1091 The output signal of the microphones is amplified by a pre-amplifier with adjustable gain between 6dB and 36dB. After the signals are matched the analog noise cancelling suppresses the far field noise signal. The output of the analog noise cancelling processor is amplified in the post amplifier with adjustable gain between 6dB and 18dB. For optimum noise and EMI immunity, the microphones have a differential connection to the LMV1091 and the output of the LMV1091 is also differential. The adjustable gain functions can be controlled via GA0–GA3 and GB0–GB2 pins. Power Supply Circuits A low drop-out (LDO) voltage regulator in the LMV1091 allows the device to be independent of supply voltage variations. The Power On Reset (POR) circuitry in the LMV1091 requires the supply voltage to rise from 0V to VDD in less than 100ms. The Mic Bias output is provided as a low noise supply source for the electret microphones. The noise voltage on the Mic Bias microphone supply output pin depends on the noise voltage on the internal the reference node. The de-coupling capacitor on the VREF pin determines the noise voltage on this internal reference. This capacitor should be larger than 1nF; having a larger capacitor value will result in a lower noise voltage on the Mic Bias output. Gain Balance and Gain Budget In systems where input signals have a high dynamic range, critical noise levels or where the dynamic range of the output voltage is also limited, careful gain balancing is essential for the best performance. Too low of a gain setting in the preamplifier can result in higher noise levels while too high of a gain setting in the preamplifier will result in clipping and saturation in the noise cancelling processor and output stages. The gain ranges and maximum signal levels for the different functional blocks are shown in Figure 19. Two examples are given as a guideline on how to select proper gain settings. 12 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LMV1091 LMV1091 www.ti.com SNAS481C – OCTOBER 2009 – REVISED MAY 2013 Pre Amp Gain (6 dB - 36 dB) Gain (Max. 0 dB) Post Amp Gain (6 dB - 18 dB) OUT+ Analog Noise Cancelling Block Mic1 or Mic2 Maximum AC Input Voltage
LMV1091TMX/NOPB 价格&库存

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LMV1091TMX/NOPB
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