LMV1099
www.ti.com
SNAS490D – JULY 2010 – REVISED MAY 2013
LMV1099 Uplink Far Field Noise Suppression and Downlink SNR Enhancing Microphone
Amplifier with Earpiece Driver
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FEATURES
DESCRIPTION
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The LMV1099 is an uplink and downlink voice
intelligibility enhancing analog IC, ideally suited for
mobile handsets. Uplink voice intelligibility is
improved by rejecting far-field noise through a unique
two-microphone solution. Downlink voice intelligibility
is improved by enhancing the SNR (Signal-to-Noise
Ratio) between the downlink voice and the ambient
noise environment at the user’s earpiece.
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Noise Reduction Without DSP-Type Artifacts
Adapting AGC (Automatic Gain Control) on
Ambient Noise Level and Downlink Signal
Strength
Downlink Adjustable Noise-reducing High
Pass Filter
Separate Uplink and Downlink Enable
Functions
No Added Process Delays
Low Power Consumption
Shutdown Function
Maximum AGC Limiter
Differential Inputs and Outputs for Noise
Immunity
Earpiece Amplifier
Available in a 25-Bump DSBGA Package
APPLICATIONS
•
•
•
Mobile Handsets
Mobile and Handheld Two-Way Radios
Bluetooth and Other Power Headsets
KEY SPECIFICATIONS
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The LMV1099 preserves uplink near-field voice
signals within close range of the microphones while
rejecting far-field acoustic noise greater than 0.5m
from the microphones.
The LMV1099 also enhances downlink voice
intelligibility by improving near-field SNR based on
the user’s environment. The analog circuitry adapts
dynamically to both the user’s ambient noise
environment as well as the downlink signal amplitude
to ensure optimum SNRI (signal-to-noise ratio
improvement). The downlink path also provides uplink
noise attenuation through an adjustable high pass
filter before the SNR enhanced downlink voice
reaches the user’s earpiece.
Unlike digital-based noise reduction solutions, the allanalog low power consuming LMV1099 increases
both uplink and downlink voice intelligibility without
DSP-type artifacts, distortions or processing delays.
Uplink Far Field Noise Suppression (Electrical
FFNSE at f = 1kHz) 33dB (typ)
Near-Field SNR Enhancement 6 to 18dB (typ)
Downlink SNRIE 16dB (typ)
Supply Voltage Range 2.7V to 5.5V
Supply Current (VDD = 3.6V) 3.8mA (typ)
Shutdown Current 0.06μA (typ)
Uplink PSRR (f = 217Hz) 106dB (typ)
Downlink SNR (A-weighted) 102dB (typ)
Downlink THD+N 0.03% (typ)
Earpiece Output Power (RL = 32Ω) 83mW (typ)
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010–2013, Texas Instruments Incorporated
LMV1099
SNAS490D – JULY 2010 – REVISED MAY 2013
www.ti.com
Original Downlink
Voice Signal
Enhanced Downlink
Voice Signal (SNR
Enhancer Active)
Ambient Noise
Figure 1. Voice Enhanced Signal
Block Diagram
Near-Field
Voice
LMV1099
VDD
REF
Uplink Signal Path
GND
MIC BIAS
MIC 1+
MIC
Ambient
Noise
PREAMP
Uplink
Noise
Reduction
Circuit
MIC 1MIC 2+
MIC
LPF+
To
Uplink
Signal
Path
OUT+
OUTLPF-
PREAMP
MIC 2I2CVDD
SCL
SDA
I2C
Control
&
Shutdown
Downlink
Signal
Enhancing
Circuit
EN
2
CT2
CT3
DCAP
BYPASS
DV+
EP+
DV-
EPAGC
Amplifier
From
Clean Baseband
Downlink Voice
CT1
To
Cell Phone
Ear -Piece
Amplifier
Downlink Signal Path
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LMV1099
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SNAS490D – JULY 2010 – REVISED MAY 2013
Typical Application
VDD
CB
10 nF
C1
1 PF
REF
MIC BIAS
RIN3
1.1 k:
VDD
Bias
LPF+
RIN1
Uplink Signal Path
1.1 k:
CLP1
CIN1
470 nF
Post Amp
6 dB
12 dB
MIC1+
PREAMP
(12-36 dB)
MIC
CIN2
470 nF MIC2+
CLP2
PREAMP
(12-36 dB)
CIN4
To
Uplink
Signal
Path
LPF-
Uplink
Noise
Reduction
Circuit
MIC1-
470 nF
CIN3
MIC
OUT+
Post Amp
6 dB
12 dB
MIC2-
OUT-
470 nF
RIN4
1.1 k:
RIN2
CT1
1.1 k:
GND
CT2
Downlink
Signal
Enhancing
Circuit
CT3
DCAP
4.7 PF
4.7 PF
4.7 PF
4.7 PF
2.2 PF
BYPASS
68 nF
CDV+
EP+
EPI2C
Control
and
Shutdown
CDV-
EN
I2CVDD
From
Clean Baseband
Downlink Voice
To Cell Phone
Ear -Piece
Amplifier
SDA
Downlink Signal Path
SCL
68 nF
C2
100 nF
2
I CVDD
Figure 2. Typical Application Circuit Diagram
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LMV1099
SNAS490D – JULY 2010 – REVISED MAY 2013
www.ti.com
Connection Diagram
A
B
C
E
D
5
DV-
MIC2+
MIC2-
MIC1+
MIC1-
4
DV+
EP-
LPF-
OUT-
MIC
BIAS
3
GND
EP+
LPF+
OUT+
REF
2
CT1
CT2
EN
SCL
SDA
1
VDD
CT3
DCAP
BYPASS
I CVDD
2
Figure 3. 25-Bump DSBGA (Top View)
See YZR0025 Package
(1)
4
PIN NAME AND FUNCTION
(1)
PIN
NAME
TYPE
UPLINK PIN DESCRIPTIONS
D5
MIC1+
Analog Input
Uplink Voice Positive Microphone #1 Input
E5
MIC1-
Analog Input
Uplink Voice Negative Microphone #1 Input
B5
MIC2+
Analog Input
Uplink Voice Positive Microphone #2 Input
C5
MIC2-
Analog Input
Uplink Voice Negative Microphone #2 Input
E4
MIC BIAS
Analog Output
Microphone DC Bias Voltage Output
E3
REF
Analog Ref
Microphone Reference Bypass Pin
D3
OUT+
Analog Output
Uplink Positive Output (To Baseband Chipset)
C3
LPF+
Analog Input
Uplink-Output Low Pass Filter Positive Feedback Input
D4
OUT-
Analog Output
Uplink Negative Output (To Baseband Chipset)
C4
LPF-
Analog Input
Uplink-Output Low Pass Filter Negative Feedback Input
PIN
NAME
TYPE
DOWNLINK PIN DESCRIPTIONS
A4
DV+
Analog Input
Downlink Voice Positive Input
A5
DV-
Analog Input
Downlink Voice Negative Input
A2
CT1
Analog Ref
Control Signal Timing Capacitor
B2
CT2
Analog Ref
Control Signal Timing Capacitor
B1
CT3
Analog Ref
Control Signal Timing Capacitor
A3
GND
Ground
Power Supply Ground Pin
D1
Bypass
Analog Ref
Earpiece Reference Bypass Pin
B3
EP+
Analog Output
Ear Speaker Positive Output (To Ear Piece Speaker)
B4
EP-
Analog Output
Ear Speaker Negative Output (To Ear Piece Speaker)
PIN
NAME
TYPE
DIGITAL INTERFACE & SUPPLY PIN DESCRIPTIONS
D2
SCL
Digital Input
I2C Serial Clock Digital Input
C2
EN
Digital Input
I2C Chip Enable Digital Input
Note: Pin assignment subject to change.
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LMV1099
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SNAS490D – JULY 2010 – REVISED MAY 2013
PIN NAME AND FUNCTION (1) (continued)
PIN
NAME
TYPE
UPLINK PIN DESCRIPTIONS
E2
SDA
Digital I/O
I2C Serial Data Address Digital Input/Output Pin
E1
I2CVDD
Digital Supply
I2C Digital Supply Voltage Pin
A1
VDD
Supply
Power Supply Voltage Pin
C1
DCAP
Analog Ref
Voice Signal Detection Capacitor
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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LMV1099
SNAS490D – JULY 2010 – REVISED MAY 2013
www.ti.com
Absolute Maximum Ratings (1) (2)
Supply Voltage
6.0V
Storage Temperature
-85°C to +150°C
ESD Rating (HBM) (3)
2000V
ESD Rating (MM) (4)
200V
ESD Rating (CDM)
(5)
750V
Junction Temperature (TJMAX)
Mounting Temperature
150°C
Infrared or Convection (20 sec.)
θJA (DSBGA)
Thermal Resistance
(6)
70°C/W
Soldering Information
(1)
(2)
(3)
(4)
(5)
(6)
235°C
See AN-1112 “microSMD Wafers
Level Chip Scale Package.”
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All
voltages are measured with respect to the ground pin, unless otherwise specified.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
Human body model, applicable std. JESD22-A114C.
Machine model, applicable std. JESD22-A115-A.
Charge device model, applicable std. JESD22-C101D.
The maximum power dissipation must be de-rated at elevated temperatures and is dictated by TJMAX, θJC, and the ambient temperature
TA. The maximum allowable power dissipation is PDMAX = (TJMAX – TA) / θJA or the number given in the Absolute Maximum Ratings,
whichever is lower.
Operating Ratings (1)
2.7V ≤ VDD ≤ 5.5V
Supply Voltage
1.7V ≤ I2CVDD ≤ 5.5V
I2CVDD
I2CVDD ≤ VDD
TMIN ≤ TA ≤ TMAX
(1)
−40°C ≤ TA ≤ +85°C
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All
voltages are measured with respect to the ground pin, unless otherwise specified.
Electrical Characteristics VDD = 3.6V (1)
Unless otherwise specified, all limits specified for TA = 25°C, VDD = 3.6V, EN = VDD. For Uplink tests, unless otherwise
specified, preamplifier gain = 20dB, post amplifier gain = 6dB, VIN = 18mVP-P, f = 1kHz, RL = 100kΩ, CL = 4.7pF and in passthrough mode. For Downlink tests, unless otherwise specified, f = 1kHz, RL = 32Ω, AGCAV = 0dB.
Symbol
Parameter
Conditions
LMV1099
Typical (2)
Limit (3)
Units
(Limits)
mA (max)
GENERAL SPECIFICATIONS
IDDQ
Supply Quiescent Current
VIN = 0V
3.8
4.5
ISD
Shutdown Current
EN pin is Low
0.06
1
μA (max)
TON
IC Wake-up Time
27
40
ms (max)
VIH
Logic High Input Threshold
EN, SCL, SDA
0.7xI2CVDD
V (min)
EN, SCL, SDA
2
0.3xI CVDD
V (max)
27.5
dB (min)
dB (min)
VIL
Logic Low Input Threshold
UPLINK SPECIFICATIONS
FFNSE
(1)
(2)
(3)
6
Far Field Noise Suppression (Electrical)
f = 1kHz (See Test Methods)
f = 300Hz (See Test Methods)
33
42
The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
Typical values represent most likely parametric norms at TA = +25ºC, and at the Recommended Operation Conditions at the time of
product characterization and are not ensured.
Datasheet min/max specification limits are specified by test or statistical analysis.
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Product Folder Links: LMV1099
LMV1099
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SNAS490D – JULY 2010 – REVISED MAY 2013
Electrical Characteristics VDD = 3.6V(1) (continued)
Unless otherwise specified, all limits specified for TA = 25°C, VDD = 3.6V, EN = VDD. For Uplink tests, unless otherwise
specified, preamplifier gain = 20dB, post amplifier gain = 6dB, VIN = 18mVP-P, f = 1kHz, RL = 100kΩ, CL = 4.7pF and in passthrough mode. For Downlink tests, unless otherwise specified, f = 1kHz, RL = 32Ω, AGCAV = 0dB.
Symbol
Parameter
Conditions
LMV1099
Typical (2)
Limit (3)
Units
(Limits)
Signal-to-Noise Ratio Improvement
(Electrical)
f = 1khz (See Test Methods)
f = 300Hz (See Test Methods)
25
33
19.5
dB (min)
dB (min)
Maximum Input Signal
THD+N < 1%, Pre Amp Gain = 12dB
435
395
mVPP (min)
Maximum AC Output Voltage
Differential Output, f = 1kHz THD+N <
1%
1.25
1.10
VRMS (min)
DC Level at Outputs
VIN = GND
825
Output Offset Voltage
VIN(Mic1/Mic2) = 0V, Input Referred
0.7
5.0
mV (max)
Total Harmonic Distortion + Noise
Differential Output
0.1
0.3
% (max)
FR
Frequency Response
30Hz – 12kHz (without Filter)
±0.5
SNR
Signal-to-Noise Ratio
VIN = 18mVP-P, A-Weighted, audio band
65
dB
eN
Input Referred Noise level
A-Weighted
7
μVRMS
ZIN
Input Impedance
SNRIE
VIN
VOUT
VOS
THD+N
ZOUT
150
Output Impedance
Allowable Load Impedance
AM
Microphone Pre Amplifier Gain Range
Minimum setting
Maximum setting
AMR
Microphone Pre Amplifier Gain
Resolution
AP
Post Amplifier Gain Range
APR
Post Amplifier Gain Resolution
PSRR
Power Supply Rejection Ratio
CMRR
Common Mode Rejection Ratio
dB
127
173
kΩ (min)
kΩ max)
10
100
kΩ (min)
pF (max)
Ω
235
RLOAD
CLOAD
ZLOAD
mV
12
36
2
Minimum setting
Maximum setting
dB
1.7
2.3
6
12
dB (min)
dB (max)
dB
6.0
5.8
6.2
dB (min)
dB (max)
f = 217Hz, VRIPPLE = 200mVPP
106
92
dB (min)
f = 1kHz, VRIPPLE = 200mVPP
102
91
dB (min)
Input referred
60
1.85
2.15
V (max)
V (min)
Input Referred, Input AC Grounded (470nF)
VBM
Microphone Bias Supply Voltage
IBM = 1mA
2.0
eVBM
Microphone Bias Supply Noise
A-Weighted, CB = 10nF
5.5
IBMAX
Maximum Microphone Reference Output
Current
dB
μVRMS
1.2
mA (max)
DOWNLINK SPECIFICATIONS
Maximum Input Signal (Differential)
THD+N < 1%, AGCAV = 0dB
4.7
4.1
VPP(DIFF)
(min)
Output Offset Voltage
VIN(DV) = 0V, RL = 32Ω, Input Referred
0.7
5.0
mV (max)
Output Noise level
A-Weighted, VIN(DV) = 0V, AGCAV = 0dB
8.9
SNR
Downlink Signal-to-Noise Ratio
PO = 35mW, A-Weighted
102
POUT
Output Power
THD+N
