LMV221EVAL

User's Guide SNWA006A – December 2007 – Revised April 2013 AN-1766 Evaluation Board for the LMV221 Logarithmic Power Detector 1 General Description This evaluation board, Figure 1, is designed to aid in the characterization of the Texas Instruments LMV221 Logarithmic Power Detector. This board simplifies the measurement of the DC output voltage that the LMV221 produces in response to the power level of the RF signal applied to the RF input. Use the evaluation board as a guide for high frequency layout and as a tool to aid in device testing and characterization. Figure 1. LMV221 Evaluation Board 2 Basic Operation The LMV221 is a 40 dB RF Logarithmic power detector intended for use in CDMA and WCDMA applications. The device has an RF frequency range from 50 MHz to 3.5 GHz. It provides an accurate temperature and supply compensated output voltage that relates linearly to the RF input power in dBm. The circuit operates with a single supply from 2.7V to 3.3V and has an RF power detection range from −45 dBm to −5 dBm. The board consist of a single LMV221 along with external components soldered on a printed circuit board. Figure 2 shows the schematic of the LMV221 evaluation board. All trademarks are the property of their respective owners. SNWA006A – December 2007 – Revised April 2013 Submit Documentation Feedback AN-1766 Evaluation Board for the LMV221 Logarithmic Power Detector Copyright © 2007–2013, Texas Instruments Incorporated 1 Basic Operation www.ti.com External supply voltages and input signals can be applied to the onboard connectors. The supply voltage is applied with connectors P2.2 (VDD) and P2.1 (GND). The RF input signal is applied by SMA connector P1. This RF signal is applied through an RF generator and is connected with a 50Ω coax cable. The detector output can be measured via BNC connector P3. The device can be activated by forcing a “high” voltage to the enable input. This can be done by jumper J4, see Table 1. The REF input (P4) is directly connected to the inverting input of the transimpedance amplifier in the LMV221 and can be used to compensate for the temperature drift of the internal reference voltage. Capacitors C3, C4, C5, and C6 are decoupling capacitors and will act as RF shorts to prevent RF interference. Additional low-pass filtering of the output signal can be realized by means of an external resistor (R3) and capacitor (C7). For more details about filtering, check the application notes information in LMV221 50 MHz to 3.5 GHz 40 dB Logarithmic Power Detector for CDMA and WCDMA (SNWS018). P2.2 V DD P2.1 GND C3 C4 VDD P1 RFIN RF 2 EN 6 R1 J4 R2 C1 P3 OUT LMV221 VDD P5 1 OUT R3 C7 P4 EN 4 C6 3 5 REF GND REF C5 Figure 2. LMV221 Evaluation Board Schematic Table 1. Jumper J4 Connections Jumper J4 Device VDD EN Active VEN = high Active VEN = low Shutdown GND 2 Shutdown AN-1766 Evaluation Board for the LMV221 Logarithmic Power Detector SNWA006A – December 2007 – Revised April 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Layout Considerations www.ti.com 3 Layout Considerations As with any other RF device, careful attention must be paid to the board layout. If the board layout is not properly designed, unwanted signals will be detected or interference will be picked up. Electrical signals (voltage/currents) need a finite time to travel through a trace or transmission line. RF voltage levels at the generator side and at the detector side can therefore be different. Signals at different locations or traces on the PCB will be in different phase of the RF frequency cycle. Phase differences in, for example the voltage across neighboring lines, may result in crosstalk between lines, due to parasitic capacitance or inductive coupling. The crosstalk is further enhanced by the fact that all traces on the PCB are susceptible to resonance. The resonance frequency depends on the trace geometry. Traces are particularly sensitive to interference when the length of the trace corresponds to a quarter of the wavelength of the interfering signal or a multiple. 3.1 Supply Lines Since the PSRR of the LMV221 is finite, variations of the supply can result in some variation at the output. This can be caused by RF injection from other parts of the circuitry or on/off switching of the PA or other various issues. 3.2 Positive Supply (VDD) In order to minimize injection of the RF interference into the LMV221 through the supply lines, the PCB traces connecting to VDD and GND should be shorted for RF. This can be done by placing a small decoupling capacitor between the VDD and GND. It should be placed as close as possible to the VDD and GND pins of the LMV221. Due to the presence of the RF input, the best possible position would be to extend the GND plane connection to the DAP slightly beyond the short edge of the package, such that the capacitor can be placed directly to the VDD Pin (Figure 3). Be aware that the resonance frequency of the capacitor itself should be above the highest RF frequency used in the application, since the capacitance acts as an inductor used above its resonance frequency. Low frequency supply voltage variations due to PA switching might result in a ripple at the output voltage. The LMV221 has a Power Supply Rejection Ratio of 60 dB for low frequencies. CROSSTALK FILTER CAPACITOR DECOUPLING CAPACITOR LMV221 GND VDD TRANSMISSION LINE RFIN GND OUT DAP REF REF FILTER CAPACITOR EN GND VIA Figure 3. Recommended Board Layout SNWA006A – December 2007 – Revised April 2013 Submit Documentation Feedback AN-1766 Evaluation Board for the LMV221 Logarithmic Power Detector Copyright © 2007–2013, Texas Instruments Incorporated 3 Layout Considerations 3.3 www.ti.com Ground (GND) The LMV221 needs a ground plane free of noise and other disturbing signals. It is important to separate the RF ground return path from the other grounds. This is due to the fact that the RF input handles large voltage swings. A power level of 0 dBm will cause a voltage swing larger than 0.6 VPP, over the internal 50Ω input resistor. This will result in a significant RF return current towards the source. It is therefore recommended that the RF ground return path is not used for other circuits in the design. The RF path should be routed directly back to the source without loops. 3.4 RF Input Interface (RFIN) The LMV221 is designed to be used in RF applications that have a characteristic impedance of 50Ω. To achieve this impedance, the input of the LMV221 needs to be connected via a 50Ω transmission line. Transmission lines can be easily created on PCBs using microstrip or (grounded) coplanar waveguide configurations. Both configurations are discussed in more detail in the application information of the LMV221 datasheet or in microwave designer handbooks. 3.5 Reference (REF) The reference pin can be used to compensate for temperature drift of the internal reference voltage of the LMV221. The REF pin is directly connected to the inverting input of the transimpedance amplifier. Thus, RF signals and other spurious signals couple directly through to the output. Introduction of RF signals into the REF pin can be prevented by connecting a small capacitor (C5) between the REF pin and ground. The capacitor should be placed as close to the REF pin as possible. 3.6 Output (OUT) The OUT pin is sensitive to crosstalk from the RF input, especially at high power levels. The ESD diode between the output and VDD may rectify the RF signal, but may not add an unwanted inaccurate DC component to the output voltage. The board layout should minimize crosstalk between the detectors input RFIN and the detector”s output. Using an additional capacitor (C4) connected between the output and the positive supply voltage VDD pin or GND can prevent this. For optimal performance this capacitor should be placed as close as possible to the OUT pin of the LMV221; e.g. extend the DAP GND plane and place the capacitor next to the OUT pin. 3.7 Board Layout Figure 4. LMV221 Evaluation Board Layout 4 AN-1766 Evaluation Board for the LMV221 Logarithmic Power Detector SNWA006A – December 2007 – Revised April 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Measurement Procedure www.ti.com 3.8 Bill of Materials The Bill of Material (BOM) of the evaluation board is listed in Table 2. Table 2. LMV221 Evaluation Board Bill of Materials 4 Designator Description Comment R1 0603 Resistor 100 kΩ R2 0603 Resistor 100 kΩ R3 0603 Resistor NU C1 0603 Capacitor 10n C3 0201 Capacitor 10p C4 0201 Capacitor 10p C5 0201 Capacitor 1p C6 0603 Capacitor 10p C7 0603 Capacitor NU J4 Jumper Header 2 × 3 P1 Connector SMA P2.1 Connector banana socket P2.2 Connector banana socket P3 Connector BNC-RA P4 Connector BNC-RA P5 Connector BNC-RA U1 6–pin WSON LMV221 Measurement Procedure The performance of the LMV221 can be measured with the circuit shown in Figure 5. An external power supply provides a voltage of 2.7V to 3.3V to the evaluation board. An accurate and stable RF Signal Generator is used to produce a test signal. Be sure to use low loss coax cables to ensure reliable measurement data. The detected output voltage can be measured with a Digital Voltage Meter (DVM). To make continuous measurements, place a jumper from VDD to enable (EN). VDD Power Supply GND VDD OUT RFIN RF Signal Generator LMV221 Eval Board Digital Volt Meter GND Figure 5. Measurement Setup SNWA006A – December 2007 – Revised April 2013 Submit Documentation Feedback AN-1766 Evaluation Board for the LMV221 Logarithmic Power Detector Copyright © 2007–2013, Texas Instruments Incorporated 5 Measurement Results 5 www.ti.com Measurement Results Figure 6 shows the frequency response of the LMV221 at various RF input power levels. Figure 7 shows the detector response for an RF input power sweep at various frequencies. 2.0 2.0 RFIN = - 5 dBm 1.6 RFIN = -15 dBm 1.6 1.2 RFIN = -25 dBm 1.2 1855 MHz 0.8 0.4 0.0 10M VOUT (V) VOUT (V) 900 MHz RFIN = -35 dBm 1G 0.8 3000 MHz 3500 MHz RFIN = -45 dBm 100M 2500 MHz 0.4 10G 0.0 -60 -50 6 AN-1766 Evaluation Board for the LMV221 Logarithmic Power Detector -30 -20 -10 0 10 RF INPUT POWER (dBm) FREQUENCY (Hz) Figure 6. VOUT vs. RF Input Frequency -40 Figure 7. VOUT vs. RF Input Power Level SNWA006A – December 2007 – Revised April 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING LIMITED WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. 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