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LMV321IDCKTG4

LMV321IDCKTG4

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SC-70-5

  • 描述:

    IC OPAMP GP 1 CIRCUIT SC70-5

  • 数据手册
  • 价格&库存
LMV321IDCKTG4 数据手册
Product Folder Order Now Support & Community Tools & Software Technical Documents LMV321, LMV324, LMV358 SLOS263X – AUGUST 1999 – REVISED MAY 2020 LMV3xx Low-Voltage Rail-to-Rail Output Operational Amplifier 1 Features 3 Description • For an upgraded version with enhanced performance, please refer to LMV321A, LMV324A, and LMV358A. • • • • • • For an upgraded version - refer to LMV321A, LMV324A, and LMV358A 2.7-V and 5-V performance –40°C to +125°C operation No crossover distortion Low supply current – LMV321: 130 μA (typical) – LMV358: 210 μA (typical) – LMV324: 410 μA (typical) Rail-to-rail output swing ESD protection exceeds JESD 22 – 2000-V human-body model – 1000-V charged-device model 2 Applications • • • • • • • • • Desktop PCs HVAC: heating, ventilating, and air conditioning Motor control: AC induction Netbooks Portable media players Power: telecom DC/DC module: digital Professional audio mixers Refrigerators Washing machines: high-end and low-end The LMV321, LMV358, and LMV324 devices are single, dual, and quad low-voltage (2.7 V to 5.5 V) operational amplifiers with rail-to-rail output swing. These devices are the most cost-effective solutions for applications where low-voltage operation, space saving, and low cost are needed. These amplifiers are designed specifically for low-voltage (2.7 V to 5 V) operation, with performance specifications meeting or exceeding the LM358 and LM324 devices that operate from 5 V to 30 V. With package sizes down to one-half the size of the DBV (SOT-23) package, these devices can be used for a variety of applications. Device Information(1) PART NUMBER LMV321 LMV358 LMV324 PACKAGE (PIN) BODY SIZE SOT-23 (5) 2.90 mm × 1.60 mm SC-70 (5) 2.00 mm × 1.25 mm SOIC (8) 4.90 mm × 3.90 mm VSSOP (8) 2.30 mm × 2.00 mm VSSOP (8) 3.00 mm × 4.40 mm TSSOP (8) 3.00 mm × 3.00 mm SOIC (14) 8.65 mm × 3.91 mm TSSOP (14) 5.00 mm × 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. IN– – 1 OUT + IN+ 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LMV321, LMV324, LMV358 SLOS263X – AUGUST 1999 – REVISED MAY 2020 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 5 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 5 5 5 5 5 6 7 8 9 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions ...................... Thermal Information: LMV321 .................................. Thermal Information: LMV324 .................................. Thermal Information: LMV358 .................................. Electrical Characteristics: VCC+ = 2.7 V.................... Electrical Characteristics: VCC+ = 5 V....................... Typical Characteristics .............................................. Detailed Description ............................................ 16 7.1 Overview ................................................................. 16 7.2 Functional Block Diagram ....................................... 16 7.3 Feature Description................................................. 17 7.4 Device Functional Modes........................................ 17 8 Application and Implementation ........................ 18 8.1 Typical Application ................................................. 18 9 Power Supply Recommendations...................... 21 10 Layout................................................................... 22 10.1 Layout Guidelines ................................................. 22 10.2 Layout Example .................................................... 22 11 Device and Documentation Support ................. 23 11.1 11.2 11.3 11.4 11.5 11.6 Related Links ........................................................ Receiving Notification of Documentation Updates Support Resources ............................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 23 23 23 23 23 23 12 Mechanical, Packaging, and Orderable Information ........................................................... 24 4 Revision History Changes from Revision W (October 2014) to Revision X Page • Deleted LMV324S mentions on the front page of the data sheet .......................................................................................... 1 • Added end equipment links in Application section ................................................................................................................. 1 • Added recommended device notice for LMV321A, LMV358A, and LMV324A ...................................................................... 1 • Changed Device Information table to sort devices by channel count in ascending order...................................................... 1 • Changed Pin Configuration and Functions section by dividing the Pin Functions table into separate tables per device...... 3 • Deleted LMV324S pinout information .................................................................................................................................... 4 • Changed HBM ESD voltage from 2500 V to 2000 V.............................................................................................................. 5 • Changed CDM ESD voltage from 1500 V to 1000 V ............................................................................................................. 5 • Deleted Shutdown voltage threshold for LMV324S................................................................................................................ 5 • Changed Thermal Information section by dividing the Thermal Information table into separate tables per device............... 5 • Changed Thermal Information for LMV321 ........................................................................................................................... 5 • Deleted LMV324S Thermal Information ................................................................................................................................ 5 • Changed Thermal Information for LMV324 ........................................................................................................................... 5 • Changed Thermal Information for LMV358 ........................................................................................................................... 6 • Deleted LMV324S test condition for supply current .............................................................................................................. 7 • Changed output short-circuit current for sourcing from 60 mA to 40 mA .............................................................................. 8 • Changed output short-circuit current for sinking from 160 mA to 40 mA .............................................................................. 8 • Deleted LMV324S test condition for supply current .............................................................................................................. 8 • Added assured by characterization table notes to output short-circuit current, output swing, and input bias current specifications ......................................................................................................................................................................... 8 • Changed Source Current Vs Output Voltage VCC=2.7V plot with Output Voltage vs Output Current (Claw) plot in Typical Characteristics section ............................................................................................................................................. 10 • Deleted plots Source Current Vs Output Voltage VCC= 5V, Sinking Current vs Output Voltage VCC=2.7V, Sinking Current vs Output Voltage VCC=5V, Short-Circuit Current vs Temperature in Typical Characteristics section ................... 10 • Changed Open-Loop Output Impedance Vs Frequency plot in Typical Characteristics section ......................................... 12 • Added Receiving Notification and Support Resources sections to the Device and Documentation Support section.......... 23 2 Submit Documentation Feedback Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 LMV321, LMV324, LMV358 www.ti.com SLOS263X – AUGUST 1999 – REVISED MAY 2020 5 Pin Configuration and Functions D, DDU, DGK, and PW Packages 8-Pin SOIC, VSSOP and TSSOP Top View OUT 1 8 VCC+ 1IN± 2 7 2OUT 1IN+ 3 6 2IN± GND 4 5 2IN+ Not to scale Pin Functions: LMV358 PIN NAME NO. I/O DESCRIPTION 1IN+ 3 I Noninverting input 1IN– 2 I Inverting input 2IN+ 5 I Noninverting input 2IN– 6 I Inverting input 2OUT 7 O Output GND 4 — Negative supply OUT 1 O Output VCC+ 8 — Positive supply DBV and DCK Packages 5-Pin SOT-23 and SC-70 Top View 1IN+ 1 GND 2 1IN± 3 5 VCC+ 4 OUT Not to scale Pin Functions: LMV321 PIN NAME NO. I/O DESCRIPTION 1IN+ 1 I Noninverting input 1IN– 3 I Inverting input GND 2 — Negative supply OUT 4 O Output VCC+ 5 — Positive supply Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 Submit Documentation Feedback 3 LMV321, LMV324, LMV358 SLOS263X – AUGUST 1999 – REVISED MAY 2020 www.ti.com D and PW Packages 14-Pin SOIC and TSSOP Top View OUT 1 14 4OUT 1IN± 2 13 4IN± 1IN+ 3 12 4IN+ VCC+ 4 11 GND 2IN+ 5 10 3IN+ 2IN± 6 9 3IN± 2OUT 7 8 3OUT Not to scale Pin Functions: LMV324 PIN NAME NO. I/O DESCRIPTION 3/4 SHDN — I Shutdown (logic low ) / enable (logic high) 1/2 SHDN — I Shutdown (logic low) / enable (logic high) 1IN+ 3 I Noninverting input 1IN– 2 I Inverting input 2IN+ 5 I Noninverting input 2IN– 6 I Inverting input 2OUT 7 O Output 3IN+ 10 I Noninverting input 3IN– 9 I Inverting input 3OUT 8 O Output 4IN+ 12 I Noninverting input 4IN– 13 I Inverting input 4OUT 14 O Output GND 11 — Negative supply OUT 1 O OUT VCC+ 4 — Positive supply 4 Submit Documentation Feedback Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 LMV321, LMV324, LMV358 www.ti.com SLOS263X – AUGUST 1999 – REVISED MAY 2020 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX Supply voltage (2) VCC UNIT 5.5 V VID Differential input voltage (3) –5.5 5.5 V VI Input voltage (either input) –0.2 5.7 V Duration of output short circuit (one amplifier) to ground (4) TJ Operating virtual junction temperature Tstg Storage temperature (1) (2) (3) (4) At or below TA = 25°C, VCC ≤ 5.5 V Unlimited –65 150 °C 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values (except differential voltages and VCC specified for the measurement of IOS) are with respect to the network GND. Differential voltages are at IN+ with respect to IN–. Short circuits from outputs to VCC can cause excessive heating and eventual destruction. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) ±2000 Charged-device model (CDM), per JEDEC specification JESD22-C101, all pins (2) ±1000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions (1) VCC TA (1) MIN MAX 2.7 5.5 I temperature (LMV321, LMV358, LMV324, LMV321IDCK) –40 125 Q temperature –40 125 Supply voltage (single-supply operation) Operating free-air temperature UNIT V °C All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. See Implications of Slow or Floating CMOS Inputs. 6.4 Thermal Information: LMV321 LMV321 THERMAL METRIC (1) RθJA (1) Junction-to-ambient thermal resistance DBV (SOT-23) DCK (SC-70) 5 PINS 5 PINS 232.9 239.6 UNIT °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.5 Thermal Information: LMV324 LMV324 THERMAL METRIC (1) RθJA (1) Junction-to-ambient thermal resistance D (SOIC) PW (TSSOP) 14 PINS 14 PINS 102.1 148.3 UNIT °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 Submit Documentation Feedback 5 LMV321, LMV324, LMV358 SLOS263X – AUGUST 1999 – REVISED MAY 2020 www.ti.com 6.6 Thermal Information: LMV358 LMV358 THERMAL METRIC (1) RθJA (1) 6 Junction-to-ambient thermal resistance D (SOIC) DGK (VSSOP) DDU (VSSOP) PW (TSSOP) 8 PINS 8 PINS 8 PINS 8 PINS 207.9 201.2 210 200.7 UNIT °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Documentation Feedback Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 LMV321, LMV324, LMV358 www.ti.com SLOS263X – AUGUST 1999 – REVISED MAY 2020 6.7 Electrical Characteristics: VCC+ = 2.7 V VCC+ = 2.7 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX 1.7 7 UNIT VIO Input offset voltage αVIO Average temperature coefficient of input offset voltage IIB Input bias current IIO Input offset current CMRR Common-mode rejection ratio VCM = 0 to 1.7 V 50 63 dB kSVR Supply-voltage rejection ratio VCC = 2.7 V to 5 V, VO = 1 V 50 60 dB VICR Common-mode input voltage range CMRR ≥ 50 dB 0 –0.2 VO Output swing RL = 10 kΩ to 1.35 V ICC Supply current 5 VCC – 100 Low level LMV321I μV/°C 11 250 nA 5 50 nA 1.9 High level V 1.7 VCC – 10 60 180 80 170 LMV358I (both amplifiers) 140 340 LMV324I (all four amplifiers) 260 680 mV μA B1 Unity-gain bandwidth Φm Phase margin 60 ° Gm Gain margin 10 dB Vn Equivalent input noise voltage f = 1 kHz 46 nV/√Hz In Equivalent input noise current f = 1 kHz 0.17 pA/√Hz (1) CL = 200 pF mV 1 MHz Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the application and configuration and may vary over time. Typical values are not ensured on production material. Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 Submit Documentation Feedback 7 LMV321, LMV324, LMV358 SLOS263X – AUGUST 1999 – REVISED MAY 2020 www.ti.com 6.8 Electrical Characteristics: VCC+ = 5 V VCC+ = 5 V, at specified free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TA = 25°C TYP (1) MAX 1.7 7 UNIT VIO Input offset voltage αVIO Average temperature coefficient of input offset voltage IIB Input bias current IIO Input offset current CMRR Common-mode rejection VCM = 0 to 4 V ratio TA = 25°C 50 65 dB kSVR Supply-voltage rejection ratio VCC = 2.7 V to 5 V, VO = 1 V, VCM = 1 V TA = 25°C 50 60 dB VICR Common-mode input voltage range CMRR ≥ 50 dB, TA = 25°C 0 –0.2 TA = –40°C to +125°C 9 TA = 25°C 5 TA = 25°C 15 TA = 25°C 5 RL = 2 kΩ to 2.5 V, high level, TA = –40°C to +125°C 4.2 VCC – 300 Output swing VCC – 400 RL = 10 kΩ to 2.5 V, high level, TA = –40°C to +125°C 120 VCC – 100 VCC – 10 RL = 2 kΩ, TA = 25°C IOS Output short-circuit current Sourcing, VO = 0 V, TA = 25°C 65 15 100 V/mV 10 (2) RL = 2 kΩ, TA = –40°C to +125°C Sinking, VO = 5 V, TA = 25°C 5 (2) 40 (2) 40 10 130 LMV321I, TA = –40°C to +125°C mA 250 350 LMV358I (both amplifiers), TA = 25°C Supply current 180 280 (2) LMV321I, TA = 25°C ICC mV VCC – 200 (2) TA = –40°C to +125°C, low level Large-signal differential voltage gain V 300 400 (2) TA = 25°C, low level AVD 4 nA VCC – 40 TA = –40°C to +125°C, low level RL = 10 kΩ to 2.5 V, high level, TA = 25°C 50 (2) nA (2) TA = 25°C, low level VO 250 (2) 150 (2) TA = –40°C to +125°C RL = 2 kΩ to 2.5 V, high level, TA = 25°C μV/°C 500 (2) TA = –40°C to +125°C mV 210 LMV358I (both amplifiers), TA = –40°C to +125°C 440 615 LMV324I (all four amplifiers), TA = 25°C 410 LMV324I (all four amplifiers), TA = –40°C to +125°C μA 830 1160 B1 Unity-gain bandwidth CL = 200 pF, TA = 25°C Φm Phase margin TA = 25°C 60 ° Gm Gain margin TA = 25°C 10 dB Vn Equivalent input noise voltage f = 1 kHz, TA = 25°C 39 nV/√Hz In Equivalent input noise current f = 1 kHz, TA = 25°C 0.21 pA/√Hz SR Slew rate TA = 25°C (1) (2) 8 1 1 MHz V/μs Typical values represent the likely parametric nominal values determined at the time of characterization. Typical values depend on the application and configuration and may vary over time. Typical values are not ensured on production material. Assured by characterization. Not production tested. Submit Documentation Feedback Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 LMV321, LMV324, LMV358 www.ti.com SLOS263X – AUGUST 1999 – REVISED MAY 2020 6.9 Typical Characteristics Vs = 2.7 V RL = 100 kΩ, 2 kΩ, 600 Ω 70 Phase 60 Gain − dB 40 100 kΩ Gain 70 90 60 75 60 2 kΩ 30 105 45 20 30 600 Ω 10 100 kΩ −10 1k 10 k 600 Ω Phase 75 2 kΩ 40 100 k Frequency − Hz 30 45 Gain 20 15 1M 0 0 −15 10 M −10 1k 70 10 k 70 100 Phase 0 pF 80 −20 Vs = 5.0 V RL = 600 Ω CL = 0 pF 100 pF 500 pF 1000 pF −30 10 k −40 100 pF 500 pF 0 pF −60 1000 pF −80 −100 10 M 100 k 1M Frequency − Hz Figure 3. LMV321 Frequency Response vs Capacitive Load Vs = 5.0 V RL = 2 kΩ 70 60 Gain − dB 75 60 40 −40°C 45 Gain 20 85°C 25°C 0 10 −20 Vs = 5.0 V 0 pF RL = 100 kΩ 100 pF −10 CL = 0 pF 100 pF 500 pF −20 500 pF 1000 pF 1000 pF −30 10 k 100 k 1M Frequency − Hz 30 0 10 k 100 k 1M Frequency − Hz −60 −80 −100 10 M 2.5 V LMV324S (25% Overshoot) _ −15 10 M Figure 5. LMV321 Frequency Response vs Temperature VO + VI RL CL −2.5 V 1000 LMV3xx (25% Overshoot) 100 VCC = ±2.5 V AV = +1 RL = 2 kΩ VO = 100 mVPP 0 −40°C −40 Figure 4. LMV321 Frequency Response vs Capacitive Load 15 10 −10 1k 20 90 25°C 20 10000 Phase Margin − Deg Phase 500 pF Gain 105 85°C 50 30 0 120 80 30 Gain − dB −20 Capacitive Load − pF Gain − dB Gain 40 40 Phase Margin − Deg 0 20 −10 20 Phase Margin − Deg 500 pF 60 100 pF 1000 pF 40 1000 pF 0 pF 50 100 pF 40 80 60 60 50 0 −15 10 M 100 k 1M Frequency − Hz Phase 60 0 600 Ω Figure 2. LMV321 Frequency Response vs Resistive Load 100 10 30 100 kΩ 10 Figure 1. LMV321 Frequency Response vs Resistive Load 30 60 100 kΩ 2 kΩ 2 kΩ 0 105 90 50 15 120 Vs = 5.0 V RL = 100 kΩ, 2 kΩ, 600 Ω Phase Margin − Deg 600 Ω 80 Phase Margin − Deg 50 120 Gain − dB 80 10 −2 −1.5 −1 −0.5 0 0.5 1 1.5 Output Voltage − V Figure 6. Stability vs Capacitive Load Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 Submit Documentation Feedback 9 LMV321, LMV324, LMV358 SLOS263X – AUGUST 1999 – REVISED MAY 2020 www.ti.com Typical Characteristics (continued) 10000 10000 VCC = ±2.5 V RL = 2 kΩ AV = 10 VO = 100 mVPP 2.5 V _ 1000 RL CL Capacitive Load − nF Capacitive Load − pF VO + VI 2.5 V LMV324S (25% Overshoot) 100 10 −2.0 −1.5 1000 LMV3xx (25% Overshoot) 100 −1 −0.5 0 Output Voltage − V 0.5 1 +2.5 V _ 10 −2.0 1.5 CL −1.5 −1 −0.5 0 Output Voltage − V 0.5 1 1.5 Figure 8. Stability vs Capacitive Load RL = 100 kΩ 1.400 LMV3xx (25% Overshoot) 1.300 Slew Rate − V/ms Capacitive Load − nF VO RL 1.500 VCC = ±2.5 V RL = 1 MΩ AV = 10 VO = 100 mVPP 1000 LMV324S (25% Overshoot) 134 kΩ 1.21 MΩ VI CL RL −1 1.100 LMV3xx 1.000 PSLEW 0.900 −0.5 0 NSLEW LMV324S 0.600 −2.5 V −1.5 NSLEW 0.700 VO + Gain 1.200 0.800 +2.5 V _ 0.5 1 PSLEW 0.500 2.5 1.5 3.0 3.5 4.0 4.5 5.0 V CC − Supply Voltage − V Output Voltage − V Figure 10. Slew Rate vs Supply Voltage Figure 9. Stability vs Capacitive Load −10 700 VCC = 5 V VI = VCC/2 LMV3xx 600 LMV324S −20 TA = 85°C 500 Input Current − nA Supply Current − µA + −2.5 V Figure 7. Stability vs Capacitive Load 10 −2.0 1.21 MΩ VI 10000 100 134 kΩ VCC = ±2.5 V AV = +1 RL = 1 MΩ VO = 100 mVPP LMV3xx (25% Overshoot) LMV324S (25% Overshoot) TA = 25°C 400 300 TA = −40°C −30 LMV3xx −40 200 −50 LMV324S 100 0 0 1 2 3 4 5 6 −60 −40 −30 −20 −10 0 10 20 30 40 50 60 70 80 TA − °C VCC − Supply Voltage − V Figure 11. Supply Current vs Supply Voltage: Quad Amplifier 10 Submit Documentation Feedback Figure 12. Input Current vs Temperature Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 LMV321, LMV324, LMV358 www.ti.com SLOS263X – AUGUST 1999 – REVISED MAY 2020 Typical Characteristics (continued) 3 80 LMV324S 2.5 2 1.5 125°C 85°C 1 25°C 60 -40°C 0.5 −k SVR − dB Output Voltage (V) VCC = −5 V RL = 10 kΩ 70 0 -0.5 -1 85°C -1.5 25°C -40°C 125°C -2 LMV3xx 50 40 30 20 -2.5 -3 10 0 5 10 15 20 25 30 35 Output Current (mA) 40 45 50 0 100 D012 1k 10k 100k 1M Frequency − Hz Figure 13. Output Voltage vs Output Current (Claw) 90 Figure 14. –kSVR vs Frequency 80 LMV324S VCC = 5 V RL = 10 kΩ 80 70 60 LMV3xx −kSVR − dB 60 +k SVR − dB VCC = −2.7 V RL = 10 kΩ LMV324S 70 50 40 LMV3xx 50 40 30 30 20 20 10 10 0 0 100 1k 10k 100k 1M 100 1k 10k Frequency − Hz Figure 15. +kSVR vs Frequency 80 LMV324S Figure 16. –kSVR vs Frequency RL = 10 kΩ VCC = 2.7 V RL = 10 kΩ 60 +k SVR − dB 60 50 LMV3xx 40 30 20 50 LMV3xx LMV324S Negative Swing 40 30 20 Positive Swing 10 10 0 100 1M 70 Output Voltage Swing − mV 70 100k Frequency − Hz 0 1k 10k 100k 1M 2.5 3.0 Figure 17. +kSVR vs Frequency 3.5 4.0 4.5 5.0 VCC − Supply Voltage − V Frequency − Hz Figure 18. Output Voltage Swing From Rails vs Supply Voltage Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 Submit Documentation Feedback 11 LMV321, LMV324, LMV358 SLOS263X – AUGUST 1999 – REVISED MAY 2020 www.ti.com Typical Characteristics (continued) 6 Open-Loop Output Impedance (:) 5 Peak Output Voltage − V OPP 2000 RL = 10 kΩ THD > 5% AV = 3 LMV3xx VCC = 5 V 4 LMV324S VCC = 5 V 3 LMV3xx VCC = 2.7 V 2 LMV324S VCC = 2.7 V 1800 1600 1400 1200 1000 800 600 400 200 1 0 1k 10k 100k Frequency (Hz) 0 1k 10k 100k 1M 1M 10M D023 10M Frequency − Hz Figure 20. Open-Loop Output Impedance vs Frequency Figure 19. Output Voltage vs Frequency 150 VCC = 5 V RL = 5 kΩ AV = 1 VO = 3 VPP Crosstalk Rejection − dB 140 Input 130 1 V/Div LMV3xx 120 LMV324S 110 100 90 100 1k 10k Frequency − Hz VCC = ±2.5 V RL = 2 kΩ TA = 25°C 100k 1 µs/Div Figure 22. Noninverting Large-Signal Pulse Response Figure 21. Cross-Talk Rejection vs Frequency Input Input LMV3xx 1 V/Div 1 V/Div LMV3xx LMV324S VCC = ±2.5 V RL = 2 kΩ TA = −40°C VCC = ±2.5 V RL = 2 kΩ TA = 85°C 1 µs/Div Figure 23. Noninverting Large-Signal Pulse Response 12 Submit Documentation Feedback LMV324S 1 µs/Div Figure 24. Noninverting Large-Signal Pulse Response Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 LMV321, LMV324, LMV358 www.ti.com SLOS263X – AUGUST 1999 – REVISED MAY 2020 Typical Characteristics (continued) Input Input LMV3xx 50 mV/Div 50 mV/Div LMV3xx LMV324S VCC = ±2.5 V RL = 2 kΩ TA = 25°C VCC = ±2.5 V RL = 2 kΩ TA = 85°C 1 µs/Div Figure 25. Noninverting Small-Signal Pulse Response 1 µs/Div Figure 26. Noninverting Small-Signal Pulse Response Input Input LMV3xx LMV3xx 1 V/Div 50 mV/Div LMV324S LMV324S LMV324S VCC = ±2.5 V RL = 2 kΩ TA = 25°C VCC = ±2.5 V RL = 2 kΩ TA = −40°C 1 µs/Div Figure 28. Inverting Large-Signal Pulse Response 1 µs/Div Figure 27. Noninverting Small-Signal Pulse Response Input Input LMV3xx 1 V/Div 1 V/Div LMV3xx LMV324S LMV324S VCC = ±2.5 V RL = 2 kΩ TA = −40°C VCC = ±2.5 V RL = 2 kΩ TA = 85°C 1 µs/Div Figure 29. Inverting Large-Signal Pulse Response 1 µs/Div Figure 30. Inverting Large-Signal Pulse Response Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 Submit Documentation Feedback 13 LMV321, LMV324, LMV358 SLOS263X – AUGUST 1999 – REVISED MAY 2020 www.ti.com Typical Characteristics (continued) Input Input LMV3xx 50 mV/Div 50 mV/Div LMV3xx LMV324S LMV324S VCC = ±2.5 V RL = 2 kΩ TA = 25°C VCC = ±2.5 V RL = 2 kΩ TA = 85°C 1 µs/Div Figure 31. Inverting Small-Signal Pulse Response 1 µs/Div Figure 32. Inverting Small-Signal Pulse Response 0.80 VCC = 2.7 V Input Current Noise − pA/ Hz Input 50 mV/Div LMV3xx LMV324S VCC = ±2.5 V RL = 2 kΩ TA = −40°C 0.60 0.40 0.20 0.00 10 10k Figure 34. Input Current Noise vs Frequency 200 0.50 VCC = 5 V 180 Input Voltage Noise − nV/ Hz 0.45 Input Current Noise − pA/ Hz 1k Frequency − Hz 1 µs/Div Figure 33. Inverting Small-Signal Pulse Response 0.40 0.35 0.30 0.25 0.20 0.15 0.10 160 140 120 100 80 VCC = 2.7 V 60 0.05 40 0.00 20 VCC = 5 V 10 100 1k 10k 10 Frequency − Hz Figure 35. Input Current Noise vs Frequency 14 100 Submit Documentation Feedback 100 1k 10k Frequency − Hz Figure 36. Input Voltage Noise vs Frequency Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 LMV321, LMV324, LMV358 www.ti.com SLOS263X – AUGUST 1999 – REVISED MAY 2020 Typical Characteristics (continued) 10.000 1.000 10.000 VCC = 2.7 V RL = 10 kΩ AV = 1 VO = 1 VPP VCC = 2.7 V RL = 10 kΩ AV = 10 VO = 1 VPP 1.000 THD − % THD − % LMV324S LMV3xx 0.100 0.100 LMV3xx 0.010 0.010 LMV324S 0.001 0.001 10 100 1000 10000 100000 10 100 Frequency − Hz Figure 37. THD + N vs Frequency 10.000 1.000 1000 10000 100000 Frequency − Hz Figure 38. THD + N vs Frequency 10.000 VCC = 5 V RL = 10 kΩ AV = 1 VO = 1 VPP VCC = 5 V RL = 10 kΩ AV = 10 VO = 2.5 VPP 1.000 0.100 THD − % THD − % LMV324S LMV324S 0.010 0.100 0.010 LMV3xx LMV3xx 0.001 0.001 10 100 1000 10000 100000 10 100 Frequency − Hz Figure 39. THD + N vs Frequency 1000 10000 100000 Frequency − Hz Figure 40. THD + N vs Frequency Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 Submit Documentation Feedback 15 LMV321, LMV324, LMV358 SLOS263X – AUGUST 1999 – REVISED MAY 2020 www.ti.com 7 Detailed Description 7.1 Overview The LMV321, LMV358, and LMV324 devices are single, dual, and quad low-voltage (2.7 V to 5.5 V) operational amplifiers with rail-to-rail output swing. The LMV321, LMV358, and LMV324 devices are the most cost-effective solutions for applications where lowvoltage operation, space saving, and low cost are needed. These amplifiers are designed specifically for lowvoltage (2.7 V to 5 V) operation, with performance specifications meeting or exceeding the LM358 and LM324 devices that operate from 5 V to 30 V. Additional features of the LMV3xx devices are a common-mode input voltage range that includes ground, 1-MHz unity-gain bandwidth, and 1-V/μs slew rate. The LMV321 device is available in the ultra-small package, which is approximately one-half the size of the DBV (SOT-23) package. This package saves space on printed circuit boards and enables the design of small portable electronic devices. It also allows the designer to place the device closer to the signal source to reduce noise pickup and increase signal integrity. 7.2 Functional Block Diagram VCC VBIAS1 VCC + – VBIAS2 + Output – VCC VCC VBIAS3 + IN- VBIAS4– IN+ + – 16 Submit Documentation Feedback Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 LMV321, LMV324, LMV358 www.ti.com SLOS263X – AUGUST 1999 – REVISED MAY 2020 7.3 Feature Description 7.3.1 Operating Voltage The LMV321, LMV358, LMV324 devices are fully specified and ensured for operation from 2.7 V to 5 V. In addition, many specifications apply from –40°C to 125°C. Parameters that vary significantly with operating voltages or temperature are shown in the Typical Characteristics graphs. 7.3.2 Unity-Gain Bandwidth The unity-gain bandwidth is the frequency up to which an amplifier with a unity gain may be operated without greatly distorting the signal. The LMV321, LMV358, LMV324 devices have a 1-MHz unity-gain bandwidth. 7.3.3 Slew Rate The slew rate is the rate at which an operational amplifier can change its output when there is a change on the input. The LMV321, LMV358, LMV324 devices have a 1-V/μs slew rate. 7.4 Device Functional Modes The LMV321, LMV358, LMV324 devices are powered on when the supply is connected. Each of these devices can be operated as a single supply operational amplifier or dual supply amplifier depending on the application. Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 Submit Documentation Feedback 17 LMV321, LMV324, LMV358 SLOS263X – AUGUST 1999 – REVISED MAY 2020 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Typical Application Some applications require differential signals. Figure 41 shows a simple circuit to convert a single-ended input of 0.5 to 2 V into differential output of ±1.5 V on a single 2.7-V supply. The output range is intentionally limited to maximize linearity. The circuit is composed of two amplifiers. One amplifier acts as a buffer and creates a voltage, VOUT+. The second amplifier inverts the input and adds a reference voltage to generate VOUT–. Both VOUT+ and VOUT– range from 0.5 to 2 V. The difference, VDIFF, is the difference between VOUT+ and VOUT–. The LMV358 was used to build this circuit. R2 2.7 V R1 VOUT+ + R3 VREF 2.5 V R4 VDIFF ± VOUT+ + VIN Figure 41. Schematic for Single-Ended Input to Differential Output Conversion 18 Submit Documentation Feedback Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 LMV321, LMV324, LMV358 www.ti.com SLOS263X – AUGUST 1999 – REVISED MAY 2020 Typical Application (continued) 8.1.1 Design Requirements The design requirements are as follows: • Supply voltage: 2.7 V • Reference voltage: 2.5 V • Input: 0.5 to 2 V • Output differential: ±1.5 V 8.1.2 Detailed Design Procedure The circuit in Figure 41 takes a single-ended input signal, VIN, and generates two output signals, VOUT+ and VOUT– using two amplifiers and a reference voltage, VREF. VOUT+ is the output of the first amplifier and is a buffered version of the input signal, VIN (see Equation 1). VOUT– is the output of the second amplifier which uses VREF to add an offset voltage to VIN and feedback to add inverting gain. The transfer function for VOUT– is Equation 2. VOUT+ = VIN (1) æ R 44 ö æ R22 ö R2 VOUT - VINin ´ 2 out - = VREF ref ´ ç ÷ ´ ç1 + ÷ + R 44 ø è R11 ø R11 è R33+ (2) The differential output signal, VDIFF, is the difference between the two single-ended output signals, VOUT+ and VOUT–. Equation 3 shows the transfer function for VDIFF. By applying the conditions that R1 = R2 and R3 = R4, the transfer function is simplified into Equation 6. Using this configuration, the maximum input signal is equal to the reference voltage and the maximum output of each amplifier is equal to the VREF. The differential output range is 2×VREF. Furthermore, the common mode voltage will be one half of VREF (see Equation 7). æ öæ æ R ö R4 R2 ö VD IF F = V O U T + - V O U T - = VIN ´ ç 1 + 2 ÷ - VR E F ´ ç ÷ ç1 + ÷ R1 ø R1 ø è è R3 + R4 ø è VOUT+ = VIN VOUT– = VREF – VIN VDIFF = 2×VIN – VREF (3) (4) (5) (6) + VOUT - ö 1 æV Vcm = ç OUT + ÷ = VREF 2 è ø 2 (7) 8.1.2.1 Amplifier Selection Linearity over the input range is key for good dc accuracy. The common mode input range and the output swing limitations determine the linearity. In general, an amplifier with rail-to-rail input and output swing is required. Bandwidth is a key concern for this design. Because LMV358 has a bandwidth of 1 MHz, this circuit will only be able to process signals with frequencies of less than 1 MHz. 8.1.2.2 Passive Component Selection Because the transfer function of VOUT– is heavily reliant on resistors (R1, R2, R3, and R4), use resistors with low tolerances to maximize performance and minimize error. This design used resistors with resistance values of 36 kΩ with tolerances measured to be within 2%. If the noise of the system is a key parameter, the user can select smaller resistance values (6 kΩ or lower) to keep the overall system noise low. This ensures that the noise from the resistors is lower than the amplifier noise. Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 Submit Documentation Feedback 19 LMV321, LMV324, LMV358 SLOS263X – AUGUST 1999 – REVISED MAY 2020 www.ti.com Typical Application (continued) 8.1.3 Application Curves The measured transfer functions in Figure 42, Figure 43, and Figure 44 were generated by sweeping the input voltage from 0 V to 2.5 V. However, this design should only be used between 0.5 V and 2 V for optimum linearity. 2.5 2.5 2.0 1.5 2.0 VOUT+ (V) VDIFF (V) 1.0 0.5 0.0 ±0.5 1.5 1.0 ±1.0 0.5 ±1.5 ±2.0 0.0 ±2.5 0.0 0.5 1.0 1.5 2.0 0.0 2.5 VIN (V) 0.5 1.0 1.5 VIN (V) C003 Figure 42. Differential Output Voltage vs Input Voltage 2.0 2.5 C001 Figure 43. Positive Output Voltage Node vs Input Voltage 3.0 2.5 VOUTt (V) 2.0 1.5 1.0 0.5 0.0 0.0 0.5 1.0 1.5 2.0 VIN (V) 2.5 C002 Figure 44. Positive Output Voltage Node vs Input Voltage 20 Submit Documentation Feedback Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 LMV321, LMV324, LMV358 www.ti.com SLOS263X – AUGUST 1999 – REVISED MAY 2020 9 Power Supply Recommendations The LMV321, LMV358, LMV324 devices are specified for operation from 2.7 to 5 V; many specifications apply from –40°C to 125°C. The Typical Characteristics section presents parameters that can exhibit significant variance with regard to operating voltage or temperature. CAUTION Supply voltages larger than 5.5 V can permanently damage the device (see the Absolute Maximum Ratings). Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high impedance power supplies. For more detailed information on bypass capacitor placement, refer to the Layout. Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 Submit Documentation Feedback 21 LMV321, LMV324, LMV358 SLOS263X – AUGUST 1999 – REVISED MAY 2020 www.ti.com 10 Layout 10.1 Layout Guidelines For best operational performance of the device, use good PCB layout practices, including: • Noise can propagate into analog circuitry through the power pins of the circuit as a whole, as well as the operational amplifier. Bypass capacitors are used to reduce the coupled noise by providing low impedance power sources local to the analog circuitry. – Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single supply applications. • Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital and analog grounds, paying attention to the flow of the ground current. • To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as opposed to in parallel with the noisy trace. • Place the external components as close to the device as possible. Keeping RF and RG close to the inverting input minimizes parasitic capacitance, as shown in Layout Example. • Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitive part of the circuit. • Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce leakage currents from nearby traces that are at different potentials. 10.2 Layout Example RIN VIN + VOUT RG RF Figure 45. Operational Amplifier Schematic for Noninverting Configuration Place components close to device and to each other to reduce parasitic errors Run the input traces as far away from the supply lines as possible VS+ RF OUT1 V+ GND IN1í OUT2 VIN IN1+ IN2í Ví IN2+ RG GND R IN Only needed for dual-supply operation GND Use low-ESR, ceramic bypass capacitor VSí (or GND for single supply) Ground (GND) plane on another layer Figure 46. Operational Amplifier Board Layout for Noninverting Configuration 22 Submit Documentation Feedback Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 LMV321, LMV324, LMV358 www.ti.com SLOS263X – AUGUST 1999 – REVISED MAY 2020 11 Device and Documentation Support 11.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 1. Related Links PARTS PRODUCT FOLDER ORDER NOW TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY LMV321 Click here Click here Click here Click here Click here LMV358 Click here Click here Click here Click here Click here LMV324 Click here Click here Click here Click here Click here 11.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 11.3 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 11.4 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 11.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 11.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 Submit Documentation Feedback 23 LMV321, LMV324, LMV358 SLOS263X – AUGUST 1999 – REVISED MAY 2020 www.ti.com 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser based versions of this data sheet, refer to the left hand navigation. 24 Submit Documentation Feedback Copyright © 1999–2020, Texas Instruments Incorporated Product Folder Links: LMV321 LMV324 LMV358 PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) LMV321IDBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 (RC1F, RC1K) Samples LMV321IDBVRE4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 (RC1F, RC1K) Samples LMV321IDBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 (RC1F, RC1K) Samples LMV321IDBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 (RC1F, RC1K) Samples LMV321IDCKR ACTIVE SC70 DCK 5 3000 RoHS & Green NIPDAU | SN | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 (R3F, R3K, R3O, R3 R, R3Z) Samples LMV321IDCKRG4 ACTIVE SC70 DCK 5 3000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 (R3F, R3K, R3O, R3 R, R3Z) Samples LMV321IDCKT ACTIVE SC70 DCK 5 250 RoHS & Green NIPDAU | SN | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 (R3C, R3F, R3R) Samples LMV324ID ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LMV324I Samples LMV324IDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 LMV324I Samples LMV324IDRE4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LMV324I Samples LMV324IDRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LMV324I Samples LMV324IPWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 MV324I Samples LMV324IPWRE4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 MV324I Samples LMV324IPWRG4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 MV324I Samples LMV324QD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LMV324Q Samples LMV324QDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LMV324Q Samples LMV324QDRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LMV324Q Samples LMV324QPW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 MV324Q Samples LMV324QPWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 MV324Q Samples Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2022 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) LMV324QPWRE4 ACTIVE TSSOP PW 14 2000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 MV324Q Samples LMV358ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 MV358I Samples LMV358IDDUR ACTIVE VSSOP DDU 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 RA5R Samples LMV358IDDURG4 ACTIVE VSSOP DDU 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 RA5R Samples LMV358IDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 MV358I Samples LMV358IDGKR ACTIVE VSSOP DGK 8 2500 RoHS & Green NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 (R5B, R5Q, R5R) Samples LMV358IDGKRG4 ACTIVE VSSOP DGK 8 2500 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR -40 to 125 (R5B, R5Q, R5R) Samples LMV358IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 MV358I Samples LMV358IDRE4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 MV358I Samples LMV358IDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 MV358I Samples LMV358IPW ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 MV358I Samples LMV358IPWG4 ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 MV358I Samples LMV358IPWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 MV358I Samples LMV358IPWRG4 ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 MV358I Samples LMV358QD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 MV358Q Samples LMV358QDDUR ACTIVE VSSOP DDU 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 RAHR Samples LMV358QDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 MV358Q Samples LMV358QDGKR ACTIVE VSSOP DGK 8 2500 RoHS & Green NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 (RHO, RHR) Samples LMV358QDGKRG4 ACTIVE VSSOP DGK 8 2500 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR -40 to 125 (RHO, RHR) Samples LMV358QDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 MV358Q Samples LMV358QPWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 MV358Q Samples Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2022 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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