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LMV431, LMV431A, LMV431B
SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
LMV431x Low-Voltage (1.24-V) Adjustable Precision Shunt Regulators
1 Features
3 Description
•
The LMV431, LMV431A and LMV431B are precision
1.24 V shunt regulators capable of adjustment to 30
V. Negative feedback from the cathode to the adjust
pin controls the cathode voltage, much like a noninverting op amp configuration (Refer to Symbol and
Functional Diagrams). A two-resistor voltage divider
terminated at the adjust pin controls the gain of a
1.24 V band-gap reference. Shorting the cathode to
the adjust pin (voltage follower) provides a cathode
voltage of a 1.24 V.
1
•
•
•
•
•
•
Low-Voltage Operation/Wide Adjust Range
(1.24 V/30 V)
0.5% Initial Tolerance (LMV431B)
Temperature Compensated for Industrial
Temperature Range (39 PPM/°C for the
LMV431AI)
Low Operation Current (55 µA)
Low Output Impedance (0.25 Ω)
Fast Turn-On Response
Low Cost
2 Applications
•
•
•
•
•
•
•
Shunt Regulator
Series Regulator
Current Source or Sink
Voltage Monitor
Error Amplifier
3-V Off-Line Switching Regulator
Low Dropout N-Channel Series Regulator
The LMV431, LMV431A and LMV431B have
respective initial tolerances of 1.5%, 1%, and 0.5%,
and functionally lend themselves to several
applications that require zener diode type
performance at low voltages. Applications include a 3
V to 2.7 V low drop-out regulator, an error amplifier in
a 3 V off-line switching regulator and even as a
voltage detector. These parts are typically stable with
capacitive loads greater than 10 nF and less than 50
pF.
The LMV431, LMV431A and LMV431B provide
performance at a competitive price.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
LMV431
SOT-23 (5)
2.90 mm x 1.60 mm
LMV431
TO-92 (3)
4.30 mm x 4.30 mm
LMV431
SOT-23 (3)
2.92 mm x 1.30 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
4 Symbol and Functional Diagrams
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LMV431, LMV431A, LMV431B
SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Symbol and Functional Diagrams........................
Revision History.....................................................
Pin Configurations and Functions .......................
Specifications.........................................................
1
1
1
1
2
3
4
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
4
4
4
4
5
6
7
8
Absolute Maximum Ratings ......................................
Handling Ratings ......................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
LMV431C Electrical Characteristics..........................
LMV431I Electrical Characteristics ...........................
LMV431AC Electrical Characteristics .....................
LMV431AI Electrical Characteristics.........................
7.9 LMV431BC Electrical Characteristics ....................... 9
7.10 LMV431BI Electrical Characteristics ..................... 10
7.11 Typical Performance Characteristics .................... 11
8
Detailed Description ............................................ 15
8.1 Functional Block Diagram ....................................... 15
9
Application and Implementation ........................ 16
9.1 Typical Application ................................................. 16
9.2 DC/AC Test Circuit.................................................. 18
10 Device and Documentation Support ................. 18
10.1
10.2
10.3
10.4
Documentation Support .......................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
18
18
18
19
11 Mechanical, Packaging, and Orderable
Information ........................................................... 19
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision F (May 2005) to Revision G
Page
•
Changed formatting to match new TI datasheet guidelines; added Device Information and Handling Ratings tables,
Layout, and Device and Documentation Support sections; reformatted Detailed Description and Application and
Implementation sections. ....................................................................................................................................................... 1
•
Added spec............................................................................................................................................................................. 4
2
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SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
6 Pin Configurations and Functions
TO-92: Plastic Package
Top View
SOT-23
Top View
ANODE
REF
CATHODE
SOT-23
Top View
*Pin 1 is not internally connected.
*Pin 2 is internally connected to Anode pin. Pin 2 should be either floating or connected to Anode pin.
Copyright © 2004–2014, Texas Instruments Incorporated
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LMV431, LMV431A, LMV431B
SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
Industrial (LMV431AI, LMV431I)
Operating temperature
Commercial (LMV431AC, LMV431C, LMV431BC)
MIN
MAX
−40
85
0
70
UNIT
°C
Lead temperature
TO-92 Package/SOT-23 -5,-3 Package
(Soldering, 10 sec.)
265
Internal power dissipation (2)
TO-92
0.78
W
SOT-23-5, -3 Package
0.28
W
35
V
Cathode voltage
Continuous cathode current
−30
30
Reference input current
−.05
3
(1)
(2)
mA
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Ratings apply to ambient temperature at 25°C. Above this temperature, derate the TO-92 at 6.2 mW/°C, and the SOT-23-5 at 2.2
mW/°C. See derating curve in Operating Condition section.
7.2 Handling Ratings
Tstg
Storage temperature range
V(ESD)
Electrostatic discharge
(1)
MIN
MAX
UNIT
−65
150
°C
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
pins (1)
2000
V
The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. The machine model is a 200 pF
capacitor discharged directly into each pin. MIL-STD-883 3015.7.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
Cathode voltage
MAX
UNIT
30
V
0.1
15
mA
−40
85
°C
Cathode current
Temperature
NOM
VREF
LMV431AI
Derating Curve (Slope = −1/RθJA)
7.4 Thermal Information
THERMAL METRIC (1)
RθJA
(1)
(2)
4
Junction-to-ambient thermal resistance
(2)
LMV431
LMV431
LMV431
SOT-23
SOT-23
TO-92
3 PINS
5 PINS
3 PINS
455
455
161
UNIT
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
TJ Max = 150°C, TJ = TA+ (RθJA PD), where PD is the operating power of the device.
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SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
7.5 LMV431C Electrical Characteristics
TA = 25°C unless otherwise specified
SYMBOL
PARAMETER
TEST CONDITIONS
TA = 25°C
VREF
Reference Voltage
VZ = VREF, IZ = 10 mA
(See Figure 32 )
VDEV
Deviation of Reference Input Voltage
Over Temperature (1)
VZ = VREF, IZ = 10 mA,
TA = Full Range (See Figure 32)
Ratio of the Change in Reference
Voltage to the Change in Cathode
Voltage
IREF
TA = Full Range
MIN
TYP
MAX
1.222
1.24
1.258
1.21
1.27
UNIT
V
4
12
IZ = 10 mA (see Figure 33 )
VZ from VREF to 6 V
R1 = 10 kΩ, R2 = ∞ and 2.6 kΩ
−1.5
−2.7
Reference Input Current
R1 = 10 kΩ, R2 = ∞
II = 10 mA (see Figure 33)
0.15
0.5
μA
∝IREF
Deviation of Reference Input Current
over Temperature
R1 = 10 kΩ, R2 = ∞,
II = 10 mA, TA = Full Range (see Figure 33)
0.05
0.3
μA
IZ(MIN)
Minimum Cathode Current for
Regulation
VZ = VREF(see Figure 32)
55
80
µA
IZ(OFF)
Off-State Current
VZ= 6 V, VREF = 0 V (see Figure 34 )
0.001
0.1
μA
rZ
Dynamic Output Impedance (2)
VZ = VREF, IZ = 0.1 mA to 15 mA
Frequency = 0 Hz (see Figure 32)
0.25
0.4
Ω
'VREF
'VZ
(1)
mV
mV/V
Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature
range. See the following:
The average temperature coefficient of the reference input voltage, ∝VREF, is defined as:
v VREF
ppm
qC
§ V
VMin · 6
r ¨ Max
¸ 10
V
(at
25qC) ¹
© REF
T2 T1
§
· 6
VDEV
r¨
¸ 10
q
V
(at
25
C)
© REF
¹
T2 T1
Where: T2 − T1 = full temperature change. ∝VREF can be positive or negative depending on whether the slope is positive or negative.
Example: VDEV = 6 mV, VREF = 1240 mV, T2 − T1 = 125°C.
v VREF
(2)
§ 6.0 mV · 6
¨
¸ 10
© 1240 mV ¹
125qC
39 ppm / qC
The dynamic output impedance, rZ, is defined as:
rZ
'VZ
'IZ
When the device is programmed with two external resistors, R1 and R2, (see Figure 33 ), the dynamic output impedance of the overall
circuit, rZ, is defined as:
rZ
'VZ ª §
R1 · º
# «rZ ¨ 1
¸»
'IZ
¬ © R2 ¹ ¼
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SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
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7.6 LMV431I Electrical Characteristics
TA = 25°C unless otherwise specified
SYMBOL
VREF
PARAMETER
TEST CONDITIONS
Reference Voltage
VDEV
VZ = VREF, IZ = 10 mA
(See Figure 32 )
Deviation of Reference Input Voltage
Over Temperature (1)
VZ = VREF, IZ = 10 mA,
TA = Full Range (See Figure 32)
Ratio of the Change in Reference
Voltage to the Change in Cathode
Voltage
IREF
MIN
TYP
MAX
TA = 25°C
1.222
1.24
1.258
TA = Full
Range
1.202
1.278
UNIT
V
6
20
IZ = 10mA (see Figure 33 )
VZ from VREF to 6V
R1 = 10 kΩ, R2 = ∞ and 2.6kΩ
−1.5
−2.7
Reference Input Current
R1 = 10 kΩ, R2 = ∞
II = 10 mA (see Figure 33)
0.15
0.5
μA
∝IREF
Deviation of Reference Input Current
over Temperature
R1 = 10 kΩ, R2 = ∞,
II = 10 mA, TA = Full Range (see Figure 33)
0.1
0.4
μA
IZ(MIN)
Minimum Cathode Current for
Regulation
VZ = VREF(see Figure 32)
55
80
µA
IZ(OFF)
Off-State Current
VZ = 6 V, VREF = 0V (see Figure 34 )
0.001
0.1
μA
rZ
Dynamic Output Impedance (2)
VZ = VREF, IZ = 0.1 mA to 15 mA
Frequency = 0 Hz (see Figure 32)
0.25
0.4
Ω
'VREF
'VZ
(1)
mV
mV/V
Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature
range. See the following:
The average temperature coefficient of the reference input voltage, ∝VREF, is defined as:
v VREF
ppm
qC
§ V
VMin · 6
r ¨ Max
¸ 10
© VREF (at 25qC) ¹
T2 T1
§
· 6
VDEV
r¨
¸ 10
© VREF (at 25q C) ¹
T2 T1
Where: T2 − T1 = full temperature change. ∝VREF can be positive or negative depending on whether the slope is positive or negative.
Example: VDEV = 6 mV, VREF = 1240 mV, T2 − T1 = 125°C.
v VREF
(2)
§ 6.0 mV · 6
¨
¸ 10
© 1240 mV ¹
125qC
39 ppm / qC
The dynamic output impedance, rZ, is defined as:
rZ
'VZ
'IZ
When the device is programmed with two external resistors, R1 and R2, (see Figure 33 ), the dynamic output impedance of the overall
circuit, rZ, is defined as:
rZ
6
'VZ ª §
R1 · º
# «rZ ¨ 1
¸»
'IZ
¬ © R2 ¹ ¼
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7.7
SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
LMV431AC Electrical Characteristics
TA = 25°C unless otherwise specified
SYMBOL
VREF
PARAMETER
TEST CONDITIONS
Reference Voltage
VZ = VREF, IZ = 10 mA
(See Figure 32 )
MIN
TYP
MAX
TA = 25°C
1.228
1.24
1.252
TA = Full Range
1.221
Deviation of Reference Input Voltage Over
Temperature (1)
VZ = VREF, IZ = 10 mA,
TA = Full Range (See Figure 32)
Ratio of the Change in Reference Voltage
to the Change in Cathode Voltage
IREF
VDEV
1.259
UNIT
V
4
12
IZ = 10 mA (see Figure 33 )
VZ from VREF to 6 V
R1 = 10 kΩ, R2 = ∞ and 2.6 kΩ
−1.5
−2.7
mV/V
Reference Input Current
R1 = 1 kΩ, R2 = ∞
II = 10 mA (see Figure 33)
0.15
0.50
μA
∝IREF
Deviation of Reference Input Current over
Temperature
R1 = 10 kΩ, R2 = ∞,
II = 10 mA, TA = Full Range (see Figure 33)
0.05
0.3
μA
IZ(MIN)
Minimum Cathode Current for Regulation
VZ = VREF(see Figure 32)
IZ(OFF)
Off-State Current
VZ = 6 V, VREF = 0V (see Figure 34 )
Dynamic Output Impedance (2)
VZ = VREF, IZ = 0.1mA to 15mA
Frequency = 0 Hz (see Figure 32)
'VREF
'VZ
rZ
(1)
mV
55
80
µA
0.001
0.1
μA
0.25
0.4
Ω
Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature
range. See the following:
The average temperature coefficient of the reference input voltage, ∝VREF, is defined as:
v VREF
ppm
qC
§ V
VMin · 6
r ¨ Max
¸ 10
© VREF (at 25qC) ¹
T2 T1
§
· 6
VDEV
r¨
¸ 10
© VREF (at 25q C) ¹
T2 T1
Where: T2 − T1 = full temperature change. ∝VREF can be positive or negative depending on whether the slope is positive or negative.
Example: VDEV = 6 mV, VREF = 1240 mV, T2 − T1 = 125°C.
v VREF
(2)
§ 6.0 mV · 6
¨
¸ 10
© 1240 mV ¹
125qC
39 ppm / qC
The dynamic output impedance, rZ, is defined as:
rZ
'VZ
'IZ
When the device is programmed with two external resistors, R1 and R2, (see Figure 33 ), the dynamic output impedance of the overall
circuit, rZ, is defined as:
rZ
'VZ ª §
R1 · º
# «rZ ¨ 1
¸»
'IZ
R2
¹¼
¬ ©
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LMV431, LMV431A, LMV431B
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7.8 LMV431AI Electrical Characteristics
TA = 25°C unless otherwise specified
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TA = 25°C
1.228
1.24
1.252
V
TA = Full Range
1.215
1.265
V
VREF
Reference Voltage
VZ = VREF, IZ = 10mA
(See Figure 32 )
VDEV
Deviation of Reference Input Voltage Over
Temperature (1)
VZ = VREF, IZ = 10mA,
TA = Full Range (See Figure 32)
Ratio of the Change in Reference Voltage
to the Change in Cathode Voltage
IREF
6
20
IZ = 10mA (see Figure 33 )
VZ from VREF to 6 V
R1 = 10 kΩ, R2 = ∞ and 2.6 kΩ
−1.5
−2.7
Reference Input Current
R1 = 10 kΩ, R2 = ∞
II = 10 mA (see Figure 33)
0.15
0.5
μA
∝IREF
Deviation of Reference Input Current over
Temperature
R1 = 10 kΩ, R2 = ∞,
II = 10 mA, TA = Full Range (see Figure 33)
0.1
0.4
μA
IZ(MIN)
Minimum Cathode Current for Regulation
VZ = VREF(see Figure 32)
IZ(OFF)
Off-State Current
VZ = 6 V, VREF = 0 V (see Figure 34 )
Dynamic Output Impedance (2)
VZ = VREF, IZ = 0.1 mA to 15 mA
Frequency = 0 Hz (see Figure 32)
'VREF
'VZ
rZ
(1)
mV
mV/V
55
80
µA
0.001
0.1
μA
0.25
0.4
Ω
Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature
range. See the following:
The average temperature coefficient of the reference input voltage, ∝VREF, is defined as:
v VREF
ppm
qC
§ V
VMin · 6
r ¨ Max
¸ 10
© VREF (at 25qC) ¹
T2 T1
§
· 6
VDEV
r¨
¸ 10
© VREF (at 25q C) ¹
T2 T1
Where: T2 − T1 = full temperature change. ∝VREF can be positive or negative depending on whether the slope is positive or negative.
Example: VDEV = 6 mV, VREF = 1240 mV, T2 − T1 = 125°C.
v VREF
(2)
§ 6.0 mV · 6
¨
¸ 10
© 1240 mV ¹
125qC
39 ppm / qC
The dynamic output impedance, rZ, is defined as:
rZ
'VZ
'IZ
When the device is programmed with two external resistors, R1 and R2, (see Figure 33 ), the dynamic output impedance of the overall
circuit, rZ, is defined as:
rZ
8
'VZ ª §
R1 · º
# «rZ ¨ 1
¸»
'IZ
R2
¹¼
¬ ©
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SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
7.9 LMV431BC Electrical Characteristics
TA = 25°C unless otherwise specified
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TA = 25°C
1.234
1.24
1.246
V
TA = Full Range
1.227
1.253
V
VREF
Reference Voltage
VZ = VREF, IZ = 10 mA
(See Figure 32 )
VDEV
Deviation of Reference Input Voltage Over
Temperature (1)
VZ = VREF, IZ = 10 mA,
TA = Full Range (See Figure 32)
Ratio of the Change in Reference Voltage
to the Change in Cathode Voltage
IREF
4
12
IZ = 10 mA (see Figure 33 )
VZ from VREF to 6 V
R1 = 10 kΩ, R2 = ∞ and 2.6 kΩ
−1.5
−2.7
mV/V
Reference Input Current
R1 = 10 kΩ, R2 = ∞
II = 10 mA (see Figure 33)
0.15
0.50
μA
∝IREF
Deviation of Reference Input Current over
Temperature
R1 = 10 kΩ, R2 = ∞,
II = 10 mA, TA = Full Range (see Figure 33)
0.05
0.3
μA
IZ(MIN)
Minimum Cathode Current for Regulation
VZ = VREF(see Figure 32)
IZ(OFF)
Off-State Current
VZ = 6 V, VREF = 0V (see Figure 34 )
Dynamic Output Impedance (2)
VZ = VREF, IZ = 0.1mA to 15mA
Frequency = 0 Hz (see Figure 32)
'VREF
'VZ
rZ
(1)
mV
55
80
µA
0.001
0.1
μA
0.25
0.4
Ω
Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature
range. See the following:
The average temperature coefficient of the reference input voltage, ∝VREF, is defined as:
v VREF
ppm
qC
§ V
VMin · 6
r ¨ Max
¸ 10
© VREF (at 25qC) ¹
T2 T1
§
· 6
VDEV
r¨
¸ 10
© VREF (at 25q C) ¹
T2 T1
Where: T2 − T1 = full temperature change. ∝VREF can be positive or negative depending on whether the slope is positive or negative.
Example: VDEV = 6 mV, VREF = 1240 mV, T2 − T1 = 125°C.
v VREF
(2)
§ 6.0 mV · 6
¨
¸ 10
© 1240 mV ¹
125qC
39 ppm / qC
The dynamic output impedance, rZ, is defined as:
rZ
'VZ
'IZ
When the device is programmed with two external resistors, R1 and R2, (see Figure 33 ), the dynamic output impedance of the overall
circuit, rZ, is defined as:
rZ
'VZ ª §
R1 · º
# «rZ ¨ 1
¸»
'IZ
R2
¹¼
¬ ©
Copyright © 2004–2014, Texas Instruments Incorporated
Product Folder Links: LMV431 LMV431A LMV431B
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LMV431, LMV431A, LMV431B
SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
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7.10 LMV431BI Electrical Characteristics
TA = 25°C unless otherwise specified
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TA = 25°C
1.234
1.24
1.246
V
TA = Full Range
1.224
1.259
V
VREF
Reference Voltage
VZ = VREF, IZ = 10 mA
(See Figure 32 )
VDEV
Deviation of Reference Input Voltage Over
Temperature (1)
VZ = VREF, IZ = 10 mA,
TA = Full Range (See Figure 32)
Ratio of the Change in Reference Voltage
to the Change in Cathode Voltage
IREF
6
20
IZ = 10 mA (see Figure 33 )
VZ from VREF to 6V
R1 = 10 kΩ, R2 = ∞ and 2.6 kΩ
−1.5
−2.7
mV/V
Reference Input Current
R1 = 10 kΩ, R2 = ∞
II = 10 mA (see Figure 33)
0.15
0.50
μA
∝IREF
Deviation of Reference Input Current over
Temperature
R1 = 10 kΩ, R2 = ∞,
II = 10 mA, TA = Full Range (see Figure 33)
0.1
0.4
μA
IZ(MIN)
Minimum Cathode Current for Regulation
VZ = VREF(see Figure 32)
IZ(OFF)
Off-State Current
VZ = 6 V, VREF = 0 V (see Figure 34 )
Dynamic Output Impedance (2)
VZ = VREF, IZ = 0.1 mA to 15 mA
Frequency = 0 Hz (see Figure 32)
'VREF
'VZ
rZ
(1)
mV
55
80
µA
0.001
0.1
μA
0.25
0.4
Ω
Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature
range. See the following:
The average temperature coefficient of the reference input voltage, ∝VREF, is defined as:
v VREF
ppm
qC
§ V
VMin · 6
r ¨ Max
¸ 10
© VREF (at 25qC) ¹
T2 T1
§
· 6
VDEV
r¨
¸ 10
© VREF (at 25q C) ¹
T2 T1
Where: T2 − T1 = full temperature change. ∝VREF can be positive or negative depending on whether the slope is positive or negative.
Example: VDEV = 6 mV, VREF = 1240 mV, T2 − T1 = 125°C.
v VREF
(2)
§ 6.0 mV · 6
¨
¸ 10
© 1240 mV ¹
125qC
39 ppm / qC
The dynamic output impedance, rZ, is defined as:
rZ
'VZ
'IZ
When the device is programmed with two external resistors, R1 and R2, (see Figure 33 ), the dynamic output impedance of the overall
circuit, rZ, is defined as:
rZ
10
'VZ ª §
R1 · º
# «rZ ¨ 1
¸»
'IZ
R2
¹¼
¬ ©
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Product Folder Links: LMV431 LMV431A LMV431B
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SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
7.11 Typical Performance Characteristics
Figure 1. Reference Voltage vs. Junction Temperature
Figure 2. Reference Input Current vs. Junction Temperature
Figure 3. Cathode Current vs. Cathode Voltage 1
Figure 4. Cathode Current vs. Cathode Voltage 2
Figure 5. Off-State Cathode Current vs. Junction
Temperature
Figure 6. Delta Reference Voltage Per Delta Cathode Voltage
vs. Junction Temperature
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Typical Performance Characteristics (continued)
Figure 7. Input Voltage Noise vs. Frequency
Figure 8. Test Circuit For Input Voltage Noise vs. Frequency
BW = 0.1 Hz To 10 Hz
12
Figure 9. Low Frequency Peak To Peak Noise
Figure 10. Test Circuit For Peak To Peak Noise
Figure 11. Small Signal Voltage Gain And Phase Shift vs.
Frequency
Figure 12. Test Circuit For Voltage Gain And Phase Shift vs.
Frequency
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SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
Typical Performance Characteristics (continued)
Figure 13. Reference Impedance vs. Frequency
Figure 14. Test Circuit For Reference Impedance vs.
Frequency
Figure 15. Pulse Response 1
Figure 16. Test Circuit For Pulse Response 1
Figure 18. Test Circuit For Pulse Response 2
Figure 17. Pulse Response 2
Copyright © 2004–2014, Texas Instruments Incorporated
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LMV431, LMV431A, LMV431B
SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
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Typical Performance Characteristics (continued)
15
150:
VZ
CATHODE CURRENT IZ (mA)
TA = 25°C
IZ = 15mA
12
IZ
STABLE
STABLE
VZ=2V
UNSTABLE
REGION
9
+
CL
-
6
VSUPPLY
VZ=3V
3
FOR VZ = VREF, STABLE FOR CL = 1pF
TO 10k nF
0
0.001 0.01
0.1
1
10
100
1k
10k
LOAD CAPACITANCE CL (nF)
Figure 19. LMV431 Stability Boundary Condition
R1
10k:
Figure 20. Test Circuit For VZ = VREF
150:
VZ
IZ
+
CL
-
VSUPPLY
R2
Extrapolated from life-test data taken at 125°C; the activation
energy assumed is 0.7eV.
Figure 21. Test Circuit For VZ = 2V, 3V
14
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Figure 22. Percentage Change In VREF vs.
Operating Life At 55°C
Copyright © 2004–2014, Texas Instruments Incorporated
Product Folder Links: LMV431 LMV431A LMV431B
LMV431, LMV431A, LMV431B
www.ti.com
SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
8 Detailed Description
8.1 Functional Block Diagram
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LMV431, LMV431A, LMV431B
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Typical Application
R1 ·
§
VO | ¨ 1
¸ VREF
© R2 ¹
R1 ·
§
¨ 1 R2 ¸ VREF
©
¹
VO MIN VREF 5 V
VO
Figure 23. Series Regulator
Figure 24. Output Control of a Three-Terminal
Fixed Regulator
R1 ·
§
VO | ¨ 1
¸ VREF
R2
©
¹
R1 ·
§
VLIMIT | ¨ 1
¸ VREF
© R2 ¹
Figure 26. Crow Bar
Figure 25. Higher Current Shunt Regulator
16
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LMV431, LMV431A, LMV431B
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SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
Typical Application (continued)
R1B ·
§
LOW LIMIT | VREF ¨ 1
¸ VBE
© R2B ¹
R1A ·
§
HIGH LIMIT | VREF ¨ 1
¸
R2A
©
¹
R1B · LED ON WHEN
§
LOW LIMIT | VREF ¨ 1
¸
© R2B ¹ LOW LIMIT V HIGH LIMIT
R1A ·
§
HIGH LIMIT | VREF ¨ 1
¸
© R2A ¹
Figure 28. Voltage Monitor
Figure 27. Overvoltage/Undervoltage Protection Circuit
IO
DELAY
RCÜn
VREF
RCL
V
(V ) VREF
Figure 29. Delay Timer
Figure 30. Current Limiter or Current Source
Figure 31. Constant Current Sink
Copyright © 2004–2014, Texas Instruments Incorporated
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LMV431, LMV431A, LMV431B
SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
www.ti.com
9.2 DC/AC Test Circuit
Figure 33. Test Circuit For VZ > VREF
Figure 32. Test Circuit For VZ = VREF
Figure 34. Test Circuit For Off-State Current
10 Device and Documentation Support
10.1 Documentation Support
10.1.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 1. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
LMV431
Click here
Click here
Click here
Click here
Click here
LMV431A
Click here
Click here
Click here
Click here
Click here
LMV431B
Click here
Click here
Click here
Click here
Click here
10.2 Trademarks
All trademarks are the property of their respective owners.
10.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
18
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Product Folder Links: LMV431 LMV431A LMV431B
LMV431, LMV431A, LMV431B
www.ti.com
SNVS041G – MAY 2004 – REVISED SEPTEMBER 2014
10.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
11 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2004–2014, Texas Instruments Incorporated
Product Folder Links: LMV431 LMV431A LMV431B
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19
PACKAGE OPTION ADDENDUM
www.ti.com
6-Feb-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LMV431ACM5
NRND
SOT-23
DBV
5
1000
TBD
Call TI
Call TI
0 to 70
N09A
LMV431ACM5/NOPB
ACTIVE
SOT-23
DBV
5
1000
Green (RoHS
& no Sb/Br)
SN
Level-1-260C-UNLIM
0 to 70
N09A
LMV431ACM5X/NOPB
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
SN
Level-1-260C-UNLIM
0 to 70
N09A
LMV431AIM5
NRND
SOT-23
DBV
5
1000
TBD
Call TI
Call TI
-40 to 85
N08A
LMV431AIM5/NOPB
ACTIVE
SOT-23
DBV
5
1000
Green (RoHS
& no Sb/Br)
SN
Level-1-260C-UNLIM
-40 to 85
N08A
LMV431AIM5X
NRND
SOT-23
DBV
5
3000
TBD
Call TI
Call TI
-40 to 85
N08A
LMV431AIM5X/NOPB
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
SN
Level-1-260C-UNLIM
-40 to 85
N08A
LMV431AIMF
NRND
SOT-23
DBZ
3
1000
TBD
Call TI
Call TI
-40 to 85
RLA
LMV431AIMF/NOPB
ACTIVE
SOT-23
DBZ
3
1000
Green (RoHS
& no Sb/Br)
SN
Level-1-260C-UNLIM
-40 to 85
RLA
LMV431AIMFX
NRND
SOT-23
DBZ
3
3000
TBD
Call TI
Call TI
-40 to 85
RLA
LMV431AIMFX/NOPB
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
SN
Level-1-260C-UNLIM
-40 to 85
RLA
LMV431AIZ/LFT3
ACTIVE
TO-92
LP
3
2000
Green (RoHS
& no Sb/Br)
SN
N / A for Pkg Type
LMV431AIZ/NOPB
ACTIVE
TO-92
LP
3
1800
Green (RoHS
& no Sb/Br)
SN
N / A for Pkg Type
LMV431BCM5/NOPB
ACTIVE
SOT-23
DBV
5
1000
Green (RoHS
& no Sb/Br)
SN
Level-1-260C-UNLIM
N09C
LMV431BCM5X/NOPB
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
SN
Level-1-260C-UNLIM
N09C
LMV431
AIZ
-40 to 85
LMV431
AIZ
LMV431BIMF
NRND
SOT-23
DBZ
3
1000
TBD
Call TI
Call TI
-40 to 85
RLB
LMV431BIMF/NOPB
ACTIVE
SOT-23
DBZ
3
1000
Green (RoHS
& no Sb/Br)
SN
Level-1-260C-UNLIM
-40 to 85
RLB
LMV431BIMFX/NOPB
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
SN
Level-1-260C-UNLIM
-40 to 85
RLB
LMV431CM5
NRND
SOT-23
DBV
5
1000
TBD
Call TI
Call TI
0 to 70
N09B
LMV431CM5/NOPB
ACTIVE
SOT-23
DBV
5
1000
Green (RoHS
& no Sb/Br)
SN
Level-1-260C-UNLIM
0 to 70
N09B
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
6-Feb-2020
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LMV431CM5X/NOPB
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
SN
Level-1-260C-UNLIM
0 to 70
N09B
LMV431CZ/NOPB
ACTIVE
TO-92
LP
3
1800
Green (RoHS
& no Sb/Br)
SN
N / A for Pkg Type
0 to 70
LMV431
CZ
LMV431IM5
NRND
SOT-23
DBV
5
1000
TBD
Call TI
Call TI
-40 to 85
N08B
LMV431IM5/NOPB
ACTIVE
SOT-23
DBV
5
1000
Green (RoHS
& no Sb/Br)
SN
Level-1-260C-UNLIM
-40 to 85
N08B
LMV431IM5X/NOPB
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
SN
Level-1-260C-UNLIM
-40 to 85
N08B
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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