User's Guide
SNOA429A – May 2004 – Revised May 2013
AN-1268 LP2996 Evaluation Board
1
Introduction
The LP2996 evaluation board is designed to provide the design engineer with a fully functional prototype
system in which to evaluate the LP2996 in both a static environment and with a complete memory system.
There are two versions of the board, and while identical in functionality they differ in the package
implemented; either a SO PowerPAD™-8 or WQFN-16 is used. This application note contains information
regarding the board. For more information regarding the LP2996 please refer to the datasheet.
2
Schematic
The following schematic was used to create the layout.
Table 1. Bill of Materials
Name
Value
U1
3
Manufacturer
Model Number
LP2996 DDR Linear Regulator
Description
Texas Instruments
LP2996
CAVIN
0.1µF
1206 Ceramic Capacitor X7R 25V
Vishay Vitrammon
VJ1206Y104KXXAT
COUT1
330µF
6.3V Electrolytic Radial FC Series
Panasonic
EEU-FC0J331S
COUT2
330µF
6.3V Electrolytic Radial FC Series
Panasonic
EEU-FC0J331S
CREF
0.01µF
1206 Ceramic Capacitor X7R 25V
Vishay Vitrammon
VJ1206Y103KXXAT
CPVIN
68µF
6.3V Electrolytic Radial FC series
Panasonic
EEU-FC0J680
Application
The LP2996 evaluation board can be used immediately in either a static test environment to check
functionality, or in a memory termination scheme on a motherboard. In either implementation, the following
steps should be taken to ensure correct operation.
1. Connect leads from the evaluation board. The board layout has been designed to allow banana jack
sockets to be directly soldered.
2. Connect AVIN and PVIN to a 2.5V power supply.
PowerPAD is a trademark of Texas Instruments.
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1
Performance
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3. The VDDQ input provides the internal divide by two reference voltage. Both VREF and VTT will track
this internal voltage, nominally a 2.5V will be applied.
4. The VREF pad is the output for the VREF from the LP2996 after being bypassed by a ceramic
capacitor. This can be connected either to a multimeter for confirmation or directly to the memory
controller and DIMMS.
5. The SD pin can be initially left floating as it has an internal pull-up
6. The remaining two pads are for the force and sense leads of the VTT output. These should be
connected directly to the termination plane or a multimeter if interested in verification. The output will
be regulated where the VSENSE leads connect to the VTT leads permitting the connection to a
motherboard without suffering from large resistance drops.
4
Performance
The LP2996 has been designed to accommodate several different capacitor options to allow the designer
to optimize the solution for the specific application. For most desktop systems, large aluminum electrolytic
capacitors will be used for their low cost. However, in height limited situations such as laptops fewer high
performance capacitors might be implemented such as specialty polymers. Table 2 lists some of the
capacitors that can be used and a vendor that offers that product line.
Table 2. Capacitors and Available Vendors
Capacitor Series
Oscon
SP
MLCC
Aluminum
2
Vendor
Vendor Phone Number
Vishay
(207)-324-4140
Panasonic
(714)-373-7857
Taiyo Yuden
(800)-348-2496
Panasonic
(714)-373-7857
AN-1268 LP2996 Evaluation Board
SNOA429A – May 2004 – Revised May 2013
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Performance
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Figure 1. SO PowerPAD Top Layer
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Figure 2. SO PowerPAD Bottom Layer
4
AN-1268 LP2996 Evaluation Board
SNOA429A – May 2004 – Revised May 2013
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Figure 3. WQFN Top Layer
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Figure 4. WQFN Bottom Layer
Information
Board Material
Size
Board Thickness
Layers
Copper Thickness
Plating
Thermal Vias
Thermal Vias Size
Board Thickness
6
SO PowerPAD-8 Board
WQFN-16 Board
FR4
FR4
1.0 x 1.5 inches
1.0 x 1.5 inches
0.062 inch
0.062 inch
2
2
1oz.
1oz.
HASL
HASL
6
4
10 mil
13 mil
0.062 inch
0.062 inch
AN-1268 LP2996 Evaluation Board
SNOA429A – May 2004 – Revised May 2013
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Copyright © 2004–2013, Texas Instruments Incorporated
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