LP38855SX-0.8

LP38855 www.ti.com SNVS461D – OCTOBER 2006 – REVISED APRIL 2013 1.5A Fast-Response High-Accuracy LDO Linear Regulator with Enable Check for Samples: LP38855 FEATURES DESCRIPTION • • The LP38855 is a high-current, fast-response regulator which can maintain output voltage regulation with an extremely low input to output voltage drop. Fabricated on a CMOS process, the device operates from two input voltages: VBIAS provides power for the internal bias and control circuits, as well as drive for the gate of the N-MOS power transistor, while VIN supplies power to the load. The use of an external bias rail allows the part to operate from ultra low VIN voltages. Unlike bipolar regulators, the CMOS architecture consumes extremely low quiescent current at any output load current. The use of an N-MOS power transistor results in wide bandwidth, yet minimum external capacitance is required to maintain loop stability. 1 2 • • • • • • • Standard VOUT Values of 0.8V and 1.2V Wide VBIAS Supply Operating Range of 3.0V to 5.5V Stable with 10 µF Ceramic Capacitors Dropout Voltage of 130 mV (Typical) at 1.5A Load Current Precision Output Voltage Across All Line and Load Conditions: – ±1.0% for TJ = 25°C – ±2.0% for 0°C ≤ TJ ≤ +125°C – ±3.0% for -40°C ≤ TJ ≤ +125°C Over-Temperature and Over-Current Protection Available in 5 Lead TO-220 and DDPAK/TO-263 Packages Custom VOUT Values between 0.8V and 1.2V are Available -40°C to +125°C Operating Temperature Range The fast transient response of this device makes it suitable for use in powering DSP, Microcontroller Core voltages and Switch Mode Power Supply post regulators. The LP38855 is available in TO-220 and DDPAK/TO-263 5-Lead packages. Dropout Voltage: 130 mV (typical) at 1.5A load current. APPLICATIONS • • • • Low Ground Pin Current: 10 mA (typical) at 1.5A load current. ASIC Power Supplies In: – Desktops, Notebooks, and Graphics Cards, Servers – Gaming Set Top Boxes, Printers and Copiers Server Core and I/O Supplies DSP and FPGA Power Supplies SMPS Post-Regulator Shutdown Current: 1 µA (typical) IIN(GND) when EN pin is low. Precision Output Voltage: ±1.0% for TJ = 25°C and ±2.0% for 0°C ≤ TJ ≤ +125°C, across all line and load conditions Typical Application Circuit LP38855-x.x VIN VBIAS IN VOUT OUT CIN 10 PF Ceramic VEN BIAS CBIAS 1 PF COUT 10 PF Ceramic EN GND GND GND 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2013, Texas Instruments Incorporated LP38855 SNVS461D – OCTOBER 2006 – REVISED APRIL 2013 www.ti.com Connection Diagrams Top View TAB IS GND EN 1 OUT 4 EN 1 LP38855T-x.x GND 3 LP38855S-x.x IN 2 Top View IN 2 GND 3 OUT 4 BIAS 5 TAB IS GND BIAS 5 Figure 1. DDPAK/TO-263 Package See Package Number KTT0005B Figure 2. TO-220 Package See Package Number NDH0005D PIN DESCRIPTIONS TO-220–5 and DDPAK/TO-263–5 Packages Pin # Pin Symbol Pin Description 1 EN The device Enable pin. 2 IN The unregulated input voltage pin 3 GND Ground 4 OUT The regulated output voltage pin 5 BIAS The supply for the internal control and reference circuitry TAB TAB The TAB is a thermal connection that is physically attached to the backside of the die, and is used as a thermal heat-sink connection. See the Application Information section for details These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) −65°C to +150°C Storage Temperature Range Lead Temperature Soldering, 5 seconds ESD Rating Human Body Model (3) Power Dissipation (4) 260°C ±2 kV Internally Limited VIN Supply Voltage (Survival) −0.3V to +6.0V VBIAS Supply Voltage (Survival) −0.3V to +6.0V VEN Voltage (Survival) −0.3V to +6.0V VOUT Voltage (Survival) −0.3V to +6.0V IOUT Current (Survival) Internally Limited Junction Temperature −40°C to +150°C (1) (2) (3) (4) 2 Absolute maximum ratings indicate limits beyond which damage to the component may occur. Operating ratings indicate conditions for which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications, see Electrical Characteristics. Specifications do not apply when operating the device outside of its rated operating conditions. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. The Human Body Model (HBM) is a 100 pF capacitor discharged through a 1.5k resistor into each pin. Test method is per JESD22A114. The HBM rating for device pin 1 (EN) is ±1.5 kV. Device power dissipation must be de-rated based on device power dissipation (TD), ambient temperature (TA), and package junction to ambient thermal resistance (θJA). Additional heat-sinking may be required to ensure that the device junction temperature (TJ) does not exceed the maximum operating rating. See the Application Information section for details. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LP38855 LP38855 www.ti.com SNVS461D – OCTOBER 2006 – REVISED APRIL 2013 Operating Ratings (1) VIN Supply Voltage (VOUT + VDO) to VBIAS VBIAS Supply Voltage 3.0V to 5.5V VEN Enable Input Voltage 0.0V to VBIAS IOUT 0 mA to 1.5A Junction Temperature Range (1) (2) −40°C to +125°C Absolute maximum ratings indicate limits beyond which damage to the component may occur. Operating ratings indicate conditions for which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications, see Electrical Characteristics. Specifications do not apply when operating the device outside of its rated operating conditions. Device power dissipation must be de-rated based on device power dissipation (TD), ambient temperature (TA), and package junction to ambient thermal resistance (θJA). Additional heat-sinking may be required to ensure that the device junction temperature (TJ) does not exceed the maximum operating rating. See the Application Information section for details. (2) Electrical Characteristics Unless otherwise specified: VIN = VOUT(NOM) + 1V, VBIAS = 3.0V, IOUT = 10 mA, CIN = COUT = 10 µF, CBIAS = 1µF, VEN = VBIAS. Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Symbol Parameter Conditions VOUT(NOM) + 1V ≤ VIN ≤ VBIAS, 3.0V ≤ VBIAS ≤ 5.5V, 10 mA ≤ IOUT ≤ 1.5A VOUT ΔVOUT/ΔVIN Output Voltage Tolerance Line Regulation, VIN (1) (1) ΔVOUT/ΔVBIAS Line Regulation, VBIAS ΔVOUT/ΔIOUT Output Voltage Load Regulation (2) IGND(IN) IGND(BIAS) -1.0 -3.0 0 +1.0 +3.0 Units % -2.0 0 +2.0 VOUT(NOM) + 1V ≤ VIN ≤ VBIAS - 0.04 - %/V 3.0V ≤ VBIAS ≤ 5.5V - 0.10 - %/V 10 mA ≤ IOUT ≤ 1.5A - 0.2 - %/A mV IOUT = 1.5A - 130 LP38855-0.8 10 mA ≤ IOUT ≤ 1.5A - 7.0 8.5 9.0 Ground Pin Current Drawn from VIN LP38855-1.2 Supply 10 mA ≤ IOUT ≤ 1.5A - 11 12 15 VEN ≤ 0.5V - 1.0 10 300 µA 10 mA ≤ IOUT ≤ 1.5A - 3.0 3.8 4.5 mA VEN ≤ 0.5V - 100 170 200 µA 2.20 2.00 2.45 2.70 2.90 V 60 50 150 300 350 mV - 4.5 - A (3) Ground Pin Current Drawn from VBIAS Supply Under-Voltage Lock-Out Threshold VBIAS rising until device is functional UVLO(HYS) Under-Voltage Lock-Out Hysteresis VBIAS falling from UVLO threshold until device is non-functional ISC Output Short-Circuit Current VIN = VOUT(NOM) + 1V, VBIAS = 3.0V, VOUT = 0.0V (3) Max VOUT(NOM) + 1V ≤ VIN ≤ VBIAS, 3.0V ≤ VBIAS ≤ 5.5V, 10 mA ≤ IOUT ≤ 1.5A, 0°C ≤ TJ ≤ 125°C UVLO (1) (2) Typ 165 180 Dropout Voltage, VIN − VOUT VDO Min mA Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage. Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from no load to full load. Dropout voltage is defined the as input to output voltage differential (VIN - VOUT) where the input voltage is low enough to cause the output voltage to drop 2% from the nominal value. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: LP38855 3 LP38855 SNVS461D – OCTOBER 2006 – REVISED APRIL 2013 www.ti.com Electrical Characteristics (continued) Unless otherwise specified: VIN = VOUT(NOM) + 1V, VBIAS = 3.0V, IOUT = 10 mA, CIN = COUT = 10 µF, CBIAS = 1µF, VEN = VBIAS. Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Symbol Parameter Conditions Min Typ - Max Units ENABLE Pin VEN = VBIAS 0.01 - VEN = 0.0V, VBIAS = 5.5V -19 -13 -30 -40 -51 Enable Voltage Threshold VEN rising until Output = ON 1.00 0.90 1.25 1.50 1.55 V VEN(HYS) Enable Voltage Hysteresis VEN falling from VEN(ON) until Output = OFF 50 30 100 150 200 mV tOFF Turn-OFF Delay Time RLOAD × COUT