LP3984
LP3984 Micropower, 150mA Ultra Low-Dropout CMOS Voltage Regulator in
Subminiature 4-I/O micro SMD Package
Literature Number: SNVS160D
LP3984
Micropower, 150mA Ultra Low-Dropout CMOS Voltage
Regulator in Subminiature 4-I/O micro SMD Package
General Description
The LP3984 is designed for portable and wireless applications with demanding performance and space requirements.
The LP3984’s performance is optimized for battery powered
systems to deliver extremely low dropout voltage and low
quiescent current. Regulator ground current increases only
slightly in dropout, further prolonging the battery life.
Power supply rejection is better than 60 dB at low frequencies and starts to roll off at 10 kHz. High power supply
rejection is maintained down to low input voltage levels
common to battery operated circuits.
The device is ideal for mobile phone and similar battery
powered wireless applications. It provides up to 150 mA from
a 2.5V to 6V input. The LP3984 consumes less than 1.2µA in
disable mode and has fast turn-on time less than 20µs.
The LP3984 is available in a 4 bump micro SMD and 5 pin
SOT-23 package. Performance is specified for −40˚C to
+125˚C temperature range and is available in 1.5V, 1.8V,
2.0V, 2.9V and 3.1V output voltages. For other output voltage options from 1.5V to 3.5V, please contact National Semiconductor sales office.
n
n
n
n
n
n
60dB PSRR at 1kHz, 40dB at 10kHz @ 3.1VIN
≤1.2µA quiescent current when shut down
Fast Turn-On time: 20 µs (typ.)
75mV typ dropout with 150mA load
−40 to +125˚C junction temperature range for operation
1.5V, 1.8V, 2.0V, 2.9V and 3.1V
Features
n
n
n
n
n
n
Miniature 4-I/O micro SMD and SOT-23-5 package
Logic controlled enable
Stable with tantalum capacitors
1 µF Tantalum output capacitor
Fast turn-on
Thermal shutdown and short-circuit current limit
Applications
n
n
n
n
CDMA cellular handsets
Wideband CDMA cellular handsets
GSM cellular handsets
Portable information appliances
Key Specifications
n 2.5 to 6.0V input range
n 150mA guaranteed output
Typical Application Circuit
20020402
Note: Pin Numbers in parenthesis indicate micro SMD package.
© 2004 National Semiconductor Corporation
DS200204
www.national.com
LP3984 Micropower, 150mA Ultra Low-Dropout CMOS Voltage Regulator in Subminiature 4-I/O
micro SMD Package
May 2004
LP3984
Block Diagram
20020401
Pin Descriptions
Name
* micro SMD
SOT
VEN
A2
3
Enable Input Logic, Enable High
GND
A1
2
Common Ground
VOUT
B1
5
Output Voltage of the LDO
VIN
B2
1
Input Voltage of the LDO
4
No Connection
N.C.
Function
* Note: The pin numbering scheme for the micro SMD package was revised in April, 2002 to conform to JEDEC standard. Only the pin numbers
were revised. No hcanges to the physical locations of the inputs/outputs wre made. For reference purposes, the obsolete numbering scheme had
GND as pin 1, VOUT as pin 2, VIN as pin 3 and VEN as pin 4.
Connection Diagrams
micro SMD, 4 Bump Package
SOT-23-5 Package
20020407
Top View
See NS Package Number MF05A
20020470
Top View
See NS Package Number BPA04
www.national.com
2
LP3984
Ordering Information
For thin micro SMD Package (0.500mm height)
Output
Voltage (V)
Grade
LP3984 Supplied as 250
Units, Tape and Reel
LP3984 Supplied as 3000
Units, Tape and Reel
1.8
STD
LP3984ITP-1.8
LP3984ITPX-1.8
2.9
STD
LP3984ITP-2.9
LP3984ITPX-2.9
For micro SMD Package (0.995mm height)
Output
Voltage (V)
Grade
LP3984 Supplied as 250
Units, Tape and Reel
LP3984 Supplied as 3000
Units, Tape and Reel
1.5
STD
LP3984IBP-1.5
LP3984IBPX-1.5
1.8
STD
LP3984IBP-1.8
LP3984IBPX-1.8
2.0
STD
LP3984IBP-2.0
LP3984IBPX-2.0
3.1
STD
LP3984IBP-3.1
LP3984IBPX-3.1
For SOT Package
Output
Voltage (V)
Grade
LP3984 Supplied as 1000
Units, Tape and Reel
1.5
STD
LP3984IMF-1.5
LP3984IMFX-1.5
LEAB
1.8
STD
LP3984IMF-1.8
LP3984IMFX-1.8
LEBB
2.0
STD
LP3984IMF-2.0
LP3984IMFX-2.0
LECB
3.1
STD
LP3984IMF-3.1
LP3984IMFX-3.1
LEDB
3
LP3984 Supplied as 3000
Units, Tape and Reel
Package Marking
www.national.com
LP3984
Absolute Maximum Ratings (Notes 1, 2)
Operating Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VIN
VIN, VEN
−0.3 to 6.5V
-0.3 to (VIN+0.3) ≤ 6.5V
VOUT
Junction Temperature
150˚C
Storage Temperature
−65˚C to +150˚C
Lead Temp.
235˚C
Pad Temp. (Note 3)
235˚C
Maximum Power Dissipation(Note 4)
SOT23-5
Micro SMD
2.5 to 6V
0 to (VIN+0.3V) ≤ 6V
VEN
Junction Temperature
−40˚C to +125˚C
Thermal Resistance
θJA (SOT23-5)
θJA (micro SMD)
220˚C/W
340˚C/W
Maximum Power Dissipation (Note
6)
SOT23-5
micro SMD
250mW
160mW
364mW
235mW
ESD Rating(Note 5)
Human Body Model
Machine Model
2kV
200V
Electrical Characteristics
Unless otherwise specified: VIN = 2.5V for 1.5, 1.8, & 2.0V options, VIN = VOUT + 0.5 for output options higher than 2.5V, CIN =
1 µF, IOUT = 1mA, COUT = 1 µF, tantalum. Typical values and limits appearing in standard typeface are for TJ = 25˚C. Limits
appearing in boldface type apply over the entire junction temperature range for operation, −40˚C to +125˚C. (Note 7) (Note 8)
Symbol
Parameter
Conditions
Typ
Output Voltage
Tolerance
Line Regulation Error
∆VOUT
Load Regulation Error
(Note 9)
VIN = 2.5V to 4.5V for 1.5, 1.8, 2.0V
options
VIN = (VOUT + 0.5V) to 4.5V for
Voltage options higher than 2.5V
0.05
IOUT = 1 mA to 150 mA
LP3984IM5 (SOT23-5)
0.002
LP3984IBP (micro SMD)
PSRR
Power Supply Rejection Ratio
IQ
Quiescent Current
Max
−1.2
−2.0
1.2
2.0
−0.15
0.15
Units
% of
VOUT(nom)
%/V
0.005
%/mA
0.0009
0.002
VIN = VOUT(nom) + 0.2V,
f = 1 kHz,
IOUT = 50 mA (Figure 2)
60
VIN = VOUT(nom) + 0.2V,
f = 10 kHz,
IOUT = 50 mA (Figure 2)
40
VEN = 1.4V, IOUT = 0 mA
80
125
VEN = 1.4V, IOUT = 0 to 150 mA
Dropout Voltage (Note 10)
Limit
Min
dB
110
150
VEN = 0.4V
0.005
1.2
IOUT = 1 mA
0.6
2.5
IOUT = 50 mA
25
40
IOUT = 100 mA
50
80
120
µA
mV
IOUT = 150 mA
75
ISC
Short Circuit Current Limit
Output Grounded
(Steady State)
600
IOUT(PK)
Peak Output Current
VOUT ≥ VOUT(nom) - 5%
600
TON
Turn-On Time
(Note 11)
en
Output Noise Voltage
BW = 10 Hz to 100 kHz,
COUT = 1µF tant.
90
µVrms
IEN
Maximum Input Current at EN
VEN = 0.4 and VIN = 6.0
±1
nA
www.national.com
20
4
mA
300
mA
µs
(Continued)
Unless otherwise specified: VIN = 2.5V for 1.5, 1.8, & 2.0V options, VIN = VOUT + 0.5 for output options higher than 2.5V, CIN =
1 µF, IOUT = 1mA, COUT = 1 µF, tantalum. Typical values and limits appearing in standard typeface are for TJ = 25˚C. Limits
appearing in boldface type apply over the entire junction temperature range for operation, −40˚C to +125˚C. (Note 7) (Note 8)
Symbol
Parameter
Conditions
Typ
Limit
Min
Units
Max
VIL
Maximum Low Level Input
Voltage at EN
VIN = 2.5 to 6.0V
VIH
Minimum High Level Input
Voltage at EN
VIN = 2.5 to 6.0V
COUT
Output Capacitor
Capacitance
1
22
µF
ESR
2
10
Ω
TSD
0.4
V
1.4
V
Thermal Shutdown Temperature
160
˚C
Thermal Shutdown Hysteresis
20
˚C
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device
is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical
Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: Additional information on pad temperature can be found in National Semiconductor Application Note (AN-1112).
Note 4: The Absolute Maximum power dissipation depends on the ambient temperature and can be calculated using the formula: PD = (TJ - TA)/θJA,
where TJ is the junction temperature, TA is the ambient temperature, and θ JA is the junction-to-ambient thermal resistance. The 364mW rating for SOT23-5
appearing under Absolute Maximum Ratings results from substituting the Absolute Maximum junction temperature, 150˚C, for TJ, 70˚C for TA, and 220˚C/W for θJA.
More power can be dissipated safely at ambient temperatures below 70˚C . Less power can be dissipated safely at ambient temperatures above 70˚C. The Absolute
Maximum power dissipation for SOT23-5 can be increased by 4.5mW for each degree below 70˚C, and it must be derated by 4.5mW for each degree above 70˚C.
Note 5: The human body model is 100pF discharged through 1.5kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each
pin.
Note 6: Like the Absolute Maximum power dissipation, the maximum power dissipation for operation depends on the ambient temperature. The 250mW rating for
SOT23-5 appearing under Operating Ratings results from substituting the maximum junction temperature for operation, 125˚C, for TJ, 70˚C for TA, and 220˚C/W for
θJA into (Note 4) above. More power can be dissipated at ambient temperatures below 70˚C . Less power can be dissipated at ambient temperatures above 70˚C.
The maximum power dissipation for operation can be increased by 4.5mW for each degree below 70˚C, and it must be derated by 4.5mW for each degree above
70˚C.
Note 7: All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production with TJ = 25˚C or correlated using
Statistical Quality Control (SQC) methods. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations
and applying statistical process control.
Note 8: The target output voltage, which is labeled VOUT(nom), is the desired voltage option.
Note 9: An increase in the load current results in a slight decrease in the output voltage and vice versa.
Note 10: Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value. This specification does not apply
for input voltages below 2.5V.
Note 11: Turn-on time is time measured between the enable input just exceeding VIH and the output voltage just reaching 95% of its nominal value.
20020408
FIGURE 1. Line Transient Input Test Signal
5
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LP3984
Electrical Characteristics
LP3984
20020409
FIGURE 2. PSRR Input Test Signal
Typical Performance Characteristics
Unless otherwise specified, CIN = COUT = 1 µF Tantalum, VIN
= 2.5 for 1.5, 1.8, and 2.0V options, VIN = VOUT + 0.2V for output options higher than 2.5V, TA = 25˚C, Enable pin is tied to
VIN.
Power Supply Rejection Ratio (VIN = 3.5V)
Power Supply Rejection Ratio (VIN = 3.5V)
20020403
20020404
Power Supply Rejection Ratio (VIN = 3.5V)
Power Supply Rejection Ratio (LP3984-1.5, VIN = 2.5V)
20020420
www.national.com
20020419
6
= 2.5 for 1.5, 1.8, and 2.0V options, VIN = VOUT + 0.2V for output options higher than 2.5V, TA = 25˚C, Enable pin is tied to
VIN. (Continued)
Line Transient Response (LP3984-3.1)
Line Transient Response (LP3984-3.1)
20020418
20020417
Line Transient Response (LP3984-3.1)
Line Transient Response (LP3984-3.1)
20020416
20020415
Line Transient Response (LP3984-3.1)
Line Transient Response (LP3984-3.1)
20020414
20020413
7
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LP3984
Typical Performance Characteristics Unless otherwise specified, CIN = COUT = 1 µF Tantalum, VIN
LP3984
Typical Performance Characteristics Unless otherwise specified, CIN = COUT = 1 µF Tantalum, VIN
= 2.5 for 1.5, 1.8, and 2.0V options, VIN = VOUT + 0.2V for output options higher than 2.5V, TA = 25˚C, Enable pin is tied to
VIN. (Continued)
Start Up Response
Start Up Response
20020412
20020411
Enable Response
Load Transient Response (LP3984-3.1
20020410
20020408
Load Transient Response (LP3984-3.1)
Load Transient Response (VIN = 4.2V)
20020406
www.national.com
20020405
8
EXTERNAL CAPACITORS
Like any low-dropout regulator, the LP3984 requires external
capacitors for regulator stability. The LP3984 is specifically
designed for portable applications requiring minimum board
space and smallest components. These capacitors must be
correctly selected for good performance.
FAST ON-TIME
INPUT CAPACITOR
An input capacitance of ) 1µF is required between the
LP3984 input pin and ground (the amount of the capacitance
may be increased without limit).
This capacitor must be located a distance of not more than
1cm from the input pin and returned to a clean analog
ground. Any good quality ceramic, tantalum, or film capacitor
may be used at the input.
The LP3984 output is turned on after Vref voltage reaches its
final value (1.23V nominal). To speed up this process, the
noise reduction capacitor at the bypass pin is charged with
an internal 70µA current source. The curernt source is turned
off when the bandgap voltage reaches approximately 95% of
its final value. The turn on time is determined by the time
constant of the bypass cpacitor. The smaller the capacitor
value, the shorter the turn on time, but less noise gets
reduced. As a result, turn on time and noise reduction need
to be taken into design consideration when choosing the
value of the byupass capacitor.
Important: Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a lowimpedance source of power (like a battery or a very large
capacitor). If a tantalum capacitor is used at the input, it must
be guaranteed by the manufacturer to have a surge current
rating sufficient for the application.
MICRO SMD MOUNTING
The micro SMD package requires specific mounting techniques which are detailed in National Semiconductor Application Note (AN-1112). Referring to the section Surface
Mount Technology (SMT) Assembly Considerations, it
should be noted that the pad style which must be used with
the 5 pin package is NSMD (non-solder mask defined) type.
For best results during assembly, alignment ordinals on the
PC board may be used to facilitate placement of the micro
SMD device.
There are no requirements for the ESR on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will be ) 1µF over the entire operating temperature
range.
OUTPUT CAPACITOR
The LP3984 is designed specifically to work with tantalum
output capacitors. A tantalum capacitor in 1 to 22 µF range
with 2Ω to 10Ω ESR range is suitable in the LP3984 application circuit.
It may also be possible to use film capacitors at the output,
but these are not as attractive for reasons of size and cost.
The output capacitor must meet the requirement for minimum amount of capacitance and also have an ESR (Equivalent Series Resistance) value which is within a stable range
(2Ω to 10Ω).
MICRO SMD LIGHT SENSITIVITY
Exposing the micro SMD device to direct sunlight will cause
misoperation of the device. Light sources such as halogen
lamps can effect electrical performance if brought near to the
device.
The wavelengths which have most detrimental effect are
reds and infra-reds, which means that the fluorescent lighting used inside most buildings has very little effect on performance. A micro SMD test board was brought to within
1cm of a fluorescent desk lamp and the effect on the regulated output voltage was negligible, showing a deviation of
less than 0.1% from nominal.
NO-LOAD STABILITY
The LP3984 will remain stable and in regulation with no
external load. This is specially important in CMOS RAM
keep-alive applications.
9
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LP3984
ON/OFF INPUT OPERATION
The LP3984 is turned off by pulling the VEN pin low, and
turned on by pulling it high. If this feature is not used, the VEN
pin should be tied to VIN to keep the regulator output on at all
times. To assure proper operation, the signal source used to
drive the VEN input must be able to swing above and below
the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section under VIL and VIH.
Application Hints
LP3984
Physical Dimensions
inches (millimeters)
unless otherwise noted
Micro SMD, 4 Bump Package (TPA04)
NS Package Number TPA04EJA
X1 = 0.879 ± 0.03mm
X2 = 0.980 ± 0.03mm
X3 = 0.500 ± 0.075mm
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10
LP3984
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
Micro SMD, 4 Bump Package (BPA04)
NS Package Number BPA04EJC
X1 = 0.879 ± 0.03mm
X2 = 0.980 ± 0.03mm
X3 = 0.900 ± 0.1mm
5-Lead Small Outline Package (MF)
NS Package Number MF05A
11
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LP3984 Micropower, 150mA Ultra Low-Dropout CMOS Voltage Regulator in Subminiature 4-I/O
micro SMD Package
Notes
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labeling, can be reasonably expected to result in a
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