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LP3987ITL-2.8/NOPB

LP3987ITL-2.8/NOPB

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    WFBGA5

  • 描述:

    IC REG LINEAR 2.8V 150MA 5DSBGA

  • 数据手册
  • 价格&库存
LP3987ITL-2.8/NOPB 数据手册
LP3987 Micropower micro SMD 150 mA Ultra Low-Dropout CMOS Voltage Regulators with Sleep MODE General Description Features The LP3987 is a 150mA fixed output voltage regulator with very low dropout voltage designed specially to meet requirements of battery-powered applications. The additional sleep MODE feature will reduce current consumption during standby operation to prolong the usage of battery. Dropout Voltage: 100mV maximum dropout with 150mA load. Shutdown: Less than 1µA quiescent current. Sleep Mode: Typically 14µA quiescent current during sleep MODE to reduce battery consumption. Enhanced Stability: The LP3987 is stable with minimum 1µF ±20% low ESR ceramic output capacitor as low as 5mΩ and high quality tantalum capacitors. The LP3987 is available in a thin 5 Bump micro SMD package. Performance is specified for −40°C to 125°C. This device is available with output voltage options of 2.5V, 2.6V, 2.8V, 2.85V & 3.0V. For other voltage options, please contact National Semiconductor Corporation. ■ Miniature 5-I/O micro SMD package ■ Stable with ceramic and high quality tantalum output capacitors ■ Logic controlled enable ■ Thermal Shutdown and short-circuit current limit Key Specifications ■ ■ ■ ■ ■ ■ ■ ■ 2.7 to 6.0V input range Guaranteed 150 mA output current 1µA quiescent current on shutdown 100 mV maximum dropout with 150 mA load 50dB PSRR at 10KHz Sleep MODE features Over temperature & over current protection −40°C to +125°C junction temperature range for operation Applications ■ ■ ■ ■ ■ ■ ■ CDMA cellular handsets Wideband CDMA cellular handsets GSM cellular handsets Portable information appliances µP/DSP Power Supplies Digital Cameras SRAM Backup Typical Application Circuit 20022201 © 2007 National Semiconductor Corporation 200222 www.national.com LP3987 Micropower micro SMD 150 mA Ultra Low-Dropout CMOS Voltage Regulators with sleep MODE February 2007 LP3987 Block Diagram LP3987 20022202 Connection Diagram 20022271 Top View 5 I/O micro SMD Package See NS Package Number TLA05 www.national.com 2 LP3987 Pin Descriptions Name micro SMD* VEN A1 Enable Input Logic, Enable High Function GND B2 Common Ground VOUT C1 Output voltage of the LDO VIN C3 Input voltage of the LDO MODE A3 Power Mode Control, Active = 1, Sleep Mode =0 * The pin numbering scheme for the micro SMD package was revised in April, 2002 to conform to JEDEC standard. Only the pin numbers were revised. No changes to the physical location of the inputs/outputs were made. For reference purposes, the obsolete numbering scheme had VEN as pin 1, GND as pin 2, VOUT as pin 3, VIN as pin 4, and MODE as pin 5. Ordering Information LP3987 Supplied as 250 Units, Tape and Reel LP3987 Supplied as 3000 Units, Tape and Reel Output Voltage (V) Grade 2.5 STD LP3987ITL-2.5 LP3987ITLX-2.5 2.6 STD LP3987ITL-2.6 LP3987ITLX-2.6 2.8 STD LP3987ITL-2.8 LP3987ITLX-2.8 2.85 STD LP3987ITL-2.85 LP3987ITLX-2.85 3.0 STD LP3987ITL-3.0 LP3987ITLX-3.0 3 www.national.com LP3987 ESD (Note 4) Human Body Model Machine Model Maximum Power Dissipation (Note 3) Absolute Maximum Ratings (Notes 1, 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN VEN, VMODE VOUT  θJA (micro SMD small bump) −0.3 to 6.5V −0.3 to 6.5V −0.3V to(V IN+ 0.3V) ≤ 6.5 −65°C to +150°C Storage Temperature 2KV 200V Operating Ratings 255°C/W (Notes 1, 2) VIN VOUT+ 200mV to 6V VEN, VMODE 0 to 6.0V Junction Temperature −40°C to +125°C Maximum Power Dissipation (Note 3) 392mW at 25°C Electrical Characteristics Unless otherwise specified: VEN = 1.8V, MODE = 1.8V, VIN = VOUT(nom) + 0.5V, CIN = 1 µF, IOUT = 1mA, COUT = 1 µF. Typical values and limits appearing in standard typeface are for TJ = 25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, −40°C to +125°C. (Notes 10, 11) Symbol Parameter Conditions Typ Limit Units Min Max -2 2 % of VOUT Output Voltage Tolerance IOUT = 1mA, 25°C Line Regulation Error VIN = (VOUT(nom) + 0.5V) to 6.0V, IOUT = 1 mA Load Regulation Error IOUT = 1mA to 150 mA Dropout Voltage (Note 6) IOUT = 1mA 0.4 2 IOUT = 150mA 60 100 ΔVOUT(SLEEP) Output Voltage difference at MODE = 0V MODE = 0V, (Note 7) Transient Response Line Transient Response (Note 5) MODE = 1.8V, ILOAD = 100mA, TRISE = TFALL = 10µS, VIN = 600mV P-P AC Square wave, (Note 8) 21 mVpp Load Transient Response (Note 5) MODE = 1.8V, COUT = 4.7µF, TRISE = TFALL = 100nS, VIN = 3.1V, 3.6V, 4.2V, (Notes 9, 12) 100 mVpk VIN = VOUT(nom) + 1V, MODE = 1.8V, f =
LP3987ITL-2.8/NOPB 价格&库存

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