LP8728EVM

Using the LP8728EVM Evaluation Module User's Guide Literature Number: SNVU231 August 2013 Chapter 1 SNVU231 – August 2013 Introduction The Texas Instruments' LP8728EVM evaluation module (EVM) helps designers evaluate the operation and performance of this device. The LP8728EVM uses the LP8728’s four buck converters to provide 3.3 V, 2.65 V, 1.8 V, and 1.25 V output voltages. Information about output voltage and current ratings of the LP8728 can also be found in the LP8728 datasheet. In order to facilitate ease of testing and evaluation of this circuit, the LP8728EVM contains screw-in terminals for the VIN and all four VOUT connections. Dual connectors are provided for easy four-wire connection. For evaluation purposes, the LP8728EVM has been tested over a 4.5 V to 5.5 V input range. Users are cautioned to evaluate their specific operating conditions and choose components with the appropriate voltage ratings before designing in LP8728 into a final product. Figure 1-1. LP8728EVM 2 Introduction SNVU231 – August 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Chapter 2 SNVU231 – August 2013 Description of LP8728 The LP8728 is a quad output Power Management Unit, optimized for low power FPGAs, microprocessors, and DSPs. This device integrates four highly efficient step-down DC/DC converters into one package. All the converters run at fixed 3.3 MHz switching frequency. Buck converters switching is phase shifted to minimize the input current spiking. 2.1 Features • • • • • • • 2.2 Four High-Efficiency Step-Down DC/DC Converters – Max output current 1.0 A – Forced PWM operation – Soft-start control – VOUT1 = 3.3 V – VOUT2 - 1.25 V – VOUT3 = 1.8 V or 2.65 V (pin selectable) – VOUT4 = 1.8 V Separate Enable Inputs for each Converter Control Separate Power Good Outputs for each Converter Output Over-Current and Input Over-Voltage Protection Over-Temperature Protection Under-Voltage Lockout (UVLO) 28-pin 0.5 mm Pitch QFN Package Applications • Automotive Systems VIN VIN VIN_B1 AVDD 1µF 10µF 1.5µH VOUT1 SW_B1 BYP 10µF FB_B1 1µF VIN VIN_B2 VDDIO 10µF 1.5µH VOUT2 10µF SW_B2 FB_B2 LP8728 PG_B1 10µF PG_B3 Micro Controller VIN VIN_B3 PG_B2 1.5µH PG_B4 FB_B3 EN_B1 SW_B3 VOUT3 10µF EN_B2 VIN VIN_B4 EN_B3 10µF GND_B3 GND_B4 GND_B2 AGND DEFSEL GND_B1 EN_B4 FB_B4 1.5µH SW_B4 VOUT4 10µF Figure 2-1. Typical Application SNVU231 – August 2013 Submit Documentation Feedback Description of LP8728 Copyright © 2013, Texas Instruments Incorporated 3 Chapter 3 SNVU231 – August 2013 LP8728EVM Setup Figure 3-1 shows the LP8728EVM with input and output connectors and main components on the board. Input power supply is connected to VIN connectors. Two connectors are provided for easy 4-wire connection. A force line should be connected to connector X1 terminals VIN and GND. Sense wires should be connected to connector X2 terminals VINS and GNDS. If a two-wire connection is used, wires should be connected to connector X1 VIN and GND only. Input voltage needs to be set between 4.5 V to 5.5 V. Two connectors are also provided for each buck output. This is useful, for example, when connecting the source meter in 4-wire mode for accurate IOUT vs VOUT measurement. Two output terminals are connected in parallel so either one can be used for sense or force lines. Connector X3 terminals VDDIOX and GND can be used to connect separated pull-up voltage for the EN_Bx and DEFSEL pins. If separated pull-up voltage is not desired, input pins can be pulled up to VIN voltage. Pull-up voltage is selected by changing the shunt position on the J2 terminal. Connecting shunt between VDDIO and VDDIOX selects VDDIOX as the pull-up voltage. Connecting a shunt between VDDIO and AVDD selects VIN as the pull-up voltage. Extra test points are placed close to the buck output capacitors for convenient probe points for an oscilloscope. Similar test points are also placed close to each input voltage pin (VIN_Bx and AVDD). Figure 3-1. Evaluation Board Connectors and Setup 4 LP8728EVM Setup SNVU231 – August 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Chapter 4 SNVU231 – August 2013 Board Layout Figure 4-1. Layer 1 Top (Signal) Figure 4-2. Layer 2 (GND) (Picture in reverse colors) SNVU231 – August 2013 Submit Documentation Feedback Board Layout Copyright © 2013, Texas Instruments Incorporated 5 www.ti.com Figure 4-3. Layer 2 (GND / VIN) Figure 4-4. Layer 4 Bottom (Signal) 6 Board Layout SNVU231 – August 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated www.ti.com Figure 4-5. Close-up of the LP8728 and Main External Components SNVU231 – August 2013 Submit Documentation Feedback Board Layout Copyright © 2013, Texas Instruments Incorporated 7 Chapter 5 SNVU231 – August 2013 Board Stackup Figure 5-1. Evaluation Board Stackup Details: • 4-layer board FR4 • Top layer 1 - copper, 35µm • Prepreg 0.1 mm • Internal Layer 2, 35 µm • Core 0.7 mm • Ground plane Layer 3, 35 µm • Prepreg 0.1 mm • Bottom Layer 4 - copper, 35 µm • Surface finish immersion gold 8 Board Stackup SNVU231 – August 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Chapter 6 SNVU231 – August 2013 Controls The LP8728 has four enable pins (EN_Bx). When any of the enable pins are pulled high, the device activates and starts up corresponding the buck converter (EN_B1 controls buck1, EN_B2 controls buck2, etc). When all EN_Bx pins are low, the device goes to shutdown mode. DEFSEL is used to select buck 3 output voltage. If the DEFSEL pin is pulled high, buck 3 output voltage is set to 2.65 V. If DEFSEL pin is set low, buck 3 output voltage is set to 1.8 V EN_Bx pins and the DEFSEL pin have internal pull-down resistors (500 kΩ) which will set the state to low when the EN input is floating. Power good outputs indicate the status of each buck converter. Once buck output voltage reaches 96% (typ) of the desired output voltage, the power good pin is pulled high. If output voltage drops below 93% (typ) of desired output voltage due to, for example, an overload condition, the corresponding power good pin is set low. 6.1 LP8728EVM Control Interface Figure 6-1. LP8728EVM Control Pins All LP8728 digital input and out signals are routed to 20-pin connector (J3) pins. Pins closer to PCB edge go straight to the LP8728 digital pins. These pins can be used to connect LP8728 pins to any external source (signal generators, external controllers, etc). For simple enable / disable operation pull-up resistors are connected to adjacent pins of the digital inputs. This allows enabling the bucks by setting shunts between the J3 pins. Indicator LEDs are provided for power good signals PG_Bx. LEDs are connected between VIN and PG_Bx pin so the LED illuminates when power good signal is low (buck is disabled or output voltage out of regulation). Indicator LEDs can be disconnected from the PG_Bx pins by removing the shunts form connector J3. SNVU231 – August 2013 Submit Documentation Feedback Controls Copyright © 2013, Texas Instruments Incorporated 9 Chapter 7 SNVU231 – August 2013 Evaluation Board Schematic Figure 7-1. Evaluation Board Schematic 10 Evaluation Board Schematic SNVU231 – August 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Chapter 8 SNVU231 – August 2013 Bill of Materials Designator QTY Value Description Package Part Number Manufacturer 0603 C1608X7R1C105K TDK C001, C003 2 1uF CAP, CERM, 1uF, 16V, +/10%, X7R C1, C2 2 22uF CAP, CERM, 22uF, 16V, +/-20%, X7R 1812 CGA8N3X7R1C226 M TDK C002, C27, C102, C111, C202, C211, C302, C311, C402, C411 10 0.1uF CAP, CERM, 0.1uF, 16V, +/-10%, X7R 0603 C1608X7R1C104K TDK C101, C110, C201, C210, C301, C310, C401, C410 8 10uF CAP, CERM, 10uF, 10V, +/-10%, X7R 0805 GRM21BR71A106K E51L MuRata D1, D2, D3, D4 4 Orange LED, Orange, SMD 1.6x0.8x0.8mm LTST-C190KFKT Lite-On J1 1 Header, 100mil, 2x1, Gold plated TSW-102-07-G-S TSW-102-07-G-S Samtec, Inc. J2 1 Header, 100mil, 3x1, Gold plated TSW-103-07-G-S TSW-103-07-G-S Samtec, Inc. J3 1 Header, 100mil, 10x2, Gold plated TSW-110-07-G-D TSW-110-07-G-D Samtec, Inc. L1, L2, L3, L4 4 1.5uH 1.1uH 2.0x2.5x1.2 MDT2520-CN1R5M Toko R1 1 0.01 RES, 0.01 ohm, 1%, 3W, High Power Current Sense Chip Resistor 2512 CRA2512-FZR010ELF Bourns R2, R3, R4, R5, R6, R7, R8, R9, R10 9 1.8k RES, 1.8k ohm, 5%, 0.1W, 0603 0603 CRCW06031K80JN EA Vishay-Dale U1 1 LP8728 QFN-28 LP8728 Texas Instruments X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11 11 Conn Term Block, 2POS, 5.08mm, TH PhoenixContact_171 5721 1715721 Phoenix Contact 2x1 SNVU231 – August 2013 Submit Documentation Feedback Bill of Materials Copyright © 2013, Texas Instruments Incorporated 11 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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