LP8765RLE/NOPB

LP8765RLE/NOPB

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    49-WFBGA,DSBGA

  • 描述:

    IC PMU CHRGR 1.2A OVP 49SMDXT

  • 数据手册
  • 价格&库存
LP8765RLE/NOPB 数据手册
LP8765 High Performance Power Management Unit for Handset Applications General Description Features The LP8765 is a complete Power Management Unit (PMU) designed for handset applications. The LP8765 PMU contains a 28V Over-Voltage Protection (OVP) single-input linear Li-Ion battery charger, backup battery charger, 10 lowdropout voltage regulators including 4 A-type LDOs, 4 D-type LDOs, one LILO LDO and one 28V OVP LDO, 2 high-efficiency buck regulators, 2 comparators, 3 current sinks, 12-bit ADC, real-time clock, 32 KHz OSC and one 2.5V reference output voltage. Programming is handled via a high-speed serial interface to program on/off conditions and output voltages of individual regulators, and to read status information of the PMU. The LP8765 can safely charge and maintain a single cell LiIon battery operating from an AC adapter or USB power source. The Li-Ion charger requires few external components and integrates the power FET. Charging is thermally regulated to obtain the most efficient charging rate for a given ambient temperature. A built-in OVP circuit at the charger inputs protects the PMU from input voltages up to +28V, eliminating the need for any external protection circuitry. Buck regulators have an automatic switch to PFM mode at low-load conditions providing very good efficiency at low-output currents. A-type LDO regulators provide excellent PSRR and very low noise, 10 µV typ., ideally suited for supplying voltage to RF section. The real-time clock/calendar provides time interval information as well as two programmable alarms. The current sink provides 4-bit current resolution with 6-bit PWM dimming, up to 120 mA maximum load current. Two general-purpose comparators can be used for detecting external accessories like ear plugs, etc. ■ Linear Li-Ion Battery Charger with Single Input © 2011 National Semiconductor Corporation 301620 ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 50 mA to 1200 mA Charging Current 4.05V to 4.75V Termination Voltage 28V OVP on the VIN_CHG Input Charging from either AC Adaptor or USB Two Synchronous Magnetic Buck Regulators IOUT 600 mA and 500 mA High-efficiency PFM mode @ low IOUT Auto-Mode PFM/PWM Switch Programmable Peak Switching Current Limit Low-Inductance 2.2 µH @2 MHz Switching Frequency 3% Accurate Buck Regulators up to 90% Efficiency LDOs 4 x A-type LDOs (3 x 200 mA, 1 x 100 mA) 4 x D-type LDOs (2 x 200 mA, 1 x 300 mA, 1 x 400 mA) 1 x LILO LDO (1 x 300 mA) 1 x 28V OVP LDO for USB Transceiver (1 x 10 mA) 10 µV noise on A-type LDOs 2% typ. Output Voltage Accuracy on LDOs 12-bit A/D Converter Three Controllable Current Sinks Two Comparators Interrupt Request to Reduce S/W Polling 32.786 KHz OSC Real-Time Clock with Two Programmable Alarms Thermal Shutdown with Early Warning Alarm 49-bump micro SMD package 3.7 x 3.7 mm, 0.5 mm pitch Applications ■ GSM, GPRS, EDGE, CDMA & 3G Handsets www.national.com LP8765 High Performance Power Management Unit for Handset Applications September 7, 2011 LP8765 Table of Contents General Description .............................................................................................................................. 1 Features .............................................................................................................................................. 1 Applications ......................................................................................................................................... 1 General Typical Application Diagram ....................................................................................................... 3 Device Pin Diagram .............................................................................................................................. 4 Package Marking Information ................................................................................................................. 4 Ordering Information ............................................................................................................................. 4 LP8765 Pin Descriptions ........................................................................................................................ 5 Device Operation Description ................................................................................................................. 6 OPERATION MODES .................................................................................................................... 6 POWER-ON AND POWER-OFF SEQUENCES ................................................................................. 8 Support Functions ............................................................................................................................... 10 REFERENCE ............................................................................................................................. 10 OSCILLATOR ............................................................................................................................. 10 REFERENCE VOLTAGE (2.5V) .................................................................................................... 10 OPERATING VOLTAGE MONITOR ............................................................................................... 10 THERMAL SHUTDOWN .............................................................................................................. 10 Absolute Maximum Ratings .................................................................................................................. 11 Operating Ratings (Note 1, Note 2) ......................................................................................................... 11 Thermal Properties ............................................................................................................................. 11 General Electrical Characteristics ......................................................................................................... 11 Linear Li-Ion Battery Charger with Single Input ....................................................................................... 13 CHARGER FUNCTION ................................................................................................................ 13 END-OF-CHARGE (EOC) FUNCTION ........................................................................................... 13 EOC & BATTERY DEFAULT SETTING .......................................................................................... 13 HIGH-CURRENT MODE .............................................................................................................. 13 Buck Converters ................................................................................................................................. 15 CIRCUIT OPERATION ................................................................................................................. 15 PWM OPERATION ...................................................................................................................... 15 PFM OPERATION ....................................................................................................................... 15 INTERNAL SYNCHRONOUS RECTIFICATION .............................................................................. 16 CURRENT LIMITING ................................................................................................................... 16 SOFT-START ............................................................................................................................. 16 LOW-DROPOUT OPERATION ..................................................................................................... 16 LDO's ............................................................................................................................................... 18 A/D Converter .................................................................................................................................... 21 A/D CONVERTER DATA AND CONTROL REGISTERS ................................................................... 21 MEASUREMENT RESULT CALCULATION .................................................................................... 21 WORKING RANGE AND ACCURACY ........................................................................................... 21 S&H .......................................................................................................................................... 21 Real-Time Clock ................................................................................................................................. 22 RTC UNLOCK FUNCTION ........................................................................................................... 22 Backup Battery Charger ...................................................................................................................... 23 32.768 kHz Crystal Oscillator ............................................................................................................... 23 Comparators ...................................................................................................................................... 23 3 Current Sinks .................................................................................................................................. 25 SINK DRIVERS ........................................................................................................................... 25 I2C-Compatible Serial Bus Interface ...................................................................................................... 26 INTERFACE BUS OVERVIEW ...................................................................................................... 26 DATA TRANSACTIONS ............................................................................................................... 26 START AND STOP ...................................................................................................................... 26 ACKNOWLEDGE CYCLE ............................................................................................................. 26 Physical Dimensions ........................................................................................................................... 27 www.national.com 2 LP8765 General Typical Application Diagram 30162001 3 www.national.com LP8765 Device Pin Diagram 30162002 TOP VIEW 49-Bump (0.5 mm pitch) micro SMDxt Package Package Marking Information 30162003 Ordering Information Order Number LP8765RLE LP8765RLX www.national.com Package Type Product ID micro SMD xT 8765 4 Supplied As 250 Units on Tape & Reel 1000 Units onTape & Reel LP8765 LP8765 Pin Descriptions Pin # Name Type Description F5 ADC1 A ADC input for Battery thermal NTC thermal monitor, also used for battery detection. E5 ADC2 A Reserved Pin for external ADC usage G6 BATT P Main Battery connection F3 FB_B1 A Buck1 feedback E1 FB_B2 A Buck2 feedback G3 GND_B1 G Buck1 GND F1 GND_B2 G Buck1 GND D4 GND_LDO G LDOs GND B2 GND_SINK G SINKs GND F2 GPIO1 DI Used for Enable1 E2 GPIO2 DI Used for Enable2 E3 GPIO3 DI Used for Enable3 B4 INP1 DI Comparator Input1 C4 INP2 DI Comparator Input1 E4 IRQ_N DO Interrupt output, active low (Open Drain) E6 LDO1 A LDO1 output C7 LDO2 A LDO2 output E7 LDO3 A LDO3 output D6 LDO4 A LDO4 output A7 LDO5 A LDO5 output C6 LDO6 A LDO6 output B6 LDO7 A LDO7 output A6 LDO8 A LDO8 output C1 LDO9 A LDO9 output C5 OSC_32KHz A 32 KHz clock buffer output to BB B5 PS_HOLD DI Control input from BB C2 PWR_ON DI Power switch on input D5 REF_OUT A 2.5V reference output for ADC (load current should be less than 1mA) D2 RSTIN_N DI Reset input, active low F4 RSTOUT_N DO Reset output, active low (Open Drain) D3 SCL DI Serial interface clock input, external pull up 1.5K to LDO5 C3 SDA DI/O B1 SINK1 A Current Sink1 Input A1 SINK2 A Current Sink2 Input A2 SINK3 A Current Sink3 Input Serial interface bi-directional data, external pull up 1.5K to LDO5 B3 SLEEP_N DI Sleep Mode input, active low G4 SW_B1 A Buck1 switch note G1 SW_B2 A Buck2 switch note A3 VCOIN A Backup battery connection G5 VIN_B1 A Buck1 input G2 VIN_B2 A Buck2 input G7 VIN_CHG P DC power input to charger block (AC adaptor or USB) F6 VIN_CHG SENSE DO D7 VIN1 A VIN_CHG pin testing point (test purpose only) and leave this pin floating. LDOs Input1 B7 VIN2 A LDOs Input2 D1 VIN3 A LILO LDO input F7 VTRM A 3.3V LDO output for USB transceiver 5 www.national.com LP8765 Pin # Name Type A5 XIN A External crystal oscillator IN A4 XOUT A External crystal oscillator OUT A: DI/O: G: Description Analog Pin Digital Input/Output Pin Ground D: O: Digital Pin Output Pin I: P: Input Pin Power Pin Device Operation Description OPERATION MODES POWER-ON-RESET: In POWER-ON RESET mode all internal registers are reset to the default values. STANDBY: In STANDBY mode all PMU functions are disabled except BB charger, 32 KHz OSC & RTC. START UP: Startup sequence is triggered by setting Power-on-Switch (PWR_ON) high for 100 ms or connecting a suitable voltage to charger input (VIN_CHG). For RTC ALARM events the startup sequence begins after 2ms delay from the RTC events. During the startup sequence, the 2.5V reference voltage will be powered by either charger block or battery first in order to detect battery existing. If there is a battery and the battery voltage is over OPVM, then the default on regulators (Buck1, Buck2 & LDO5) will be enabled according to a pre-programmed timing pattern. If the regulators are enabled, RSTOUT_N is released, allowing the processor to start up. PS_HOLD must be set high within a programmed timer* (8s max) from the start of STARTUP state; this is true for all startup events except PWR_ON. For PWR_ON startup, PMU stays in POWER ON state when PWR_ON is held high, and the PS_HOLD must be set high before the PWR_ON goes low or Power-on-Switch is released. Otherwise, PMU will go to SHUTDOWN state. If there is no main battery detected (voltage at ADC1 pin is about 2.4V), PMU will not start the startup sequence. In other modes, the PMU will not enable the charger. If the main battery is removed when PMU is running, then Charger will be disabled immediately to force UVLO shutdown. If two-pin battery is used then ADC1 pin should be connect to GND through a resistor or floating in order to start up the PMU normally. However, there will be no battery exiting detection. IDLE: PMU will enter into IDLE mode (normal operating mode) after PS_HOLD signal is asserted by the host processor. IDLE mode will enable all PMU functions that can be controlled by the Serial Interface or direct control inputs. PS_HOLD going low for 10 ms, VDD voltage below UVLO, Chip temperature over TSDH, or a flag failure in a monitored regulator (LDO5) for 10 ms will initiate a SHUTDOWN Sequence. SLEEP: When BB pulls SLEEP_N pin LOW, the PMU will not do anything except setting BUCKs and LDOs to lowpower mode in order to minimize quiescent current if LDOs_LOW_PWR_IN_SLEEP and BUCKs_LOW_PWR_IN_SLEEP bits are set to 1, otherwise both BUCKs and LDOs will stay in normally mode. However, in low-power mode, the summary of total load current of BUCKs or LDOs should stay below 5mA. Buck1 has two preset voltages (BUCK1 NORMAL & BUCK1 SLEEP); BUCK1 output equals BUCK1 SLEEP when SLEEP_N pin is low, and goes back to BUCK1 NORMAL when SLEEP_N is high. By default, BUCK1 SLEEP & NORMAL are same 1.2V. In this mode, only LDO1, LDO2, LDO3, LDO4 and LDO9 can be enabled/disabled through GPIO pins (EN1,2&3). If I2C communication is disabled during sleep, then for other power regulators, BB need to turn them off through I2C before SLEEP_N goes to 0. Otherwise, these power regulators will stay on during BB sleep. The condition of going to SHUTDOWN state is the same as in IDLE state. Please see Register Maps for detail. SHUTDOWN: In this state, RSTOUT_N is pulled low, and all regulators are disabled according to pre-programmed timing pattern (opposite of STARTUP sequence). After this, all registers are reset to default values except address xxxx, then PMU will go to STANDBY state. SYSTEM RESET: PMU goes to SYSTEM RESET mode if RSTIN_N input has been pulled low for xxms**. There are two different reset methods: 1. Cold reset (EN_RSTIN_SHUTDOWN = high); PMU will go to SHUTDOWN state first and then initiate STARTUP event automatically. PS_HOLD must be high within programmed PS_HOLD timer, otherwise PMU will go to SHUTDOWN state. a. Enable shutdown and enter EPROM READ + PREPARE mode, active the pulldown (Total time = 33 ms); b. Disable the pulldown and enter STARTUP mode; c. Wait 100 ms; and d. Enter Normal working mode. 2. Hot reset (EN_RSTIN_SHUTDOWN = low); PMU will pull low RSTOUT_N and disable all the power regulators except BUCK1, BUCK2, LDO5(DLDO1), REF_OUT. A STARTUP event then initiates automatically, and PS_HOLD must be high within programmed PS_HOLD timer, otherwise PMU will go to SHUTDOWN state. www.national.com 6 LP8765 30162004 * Note 1: PS_HOLD timer is programmable 1.5s, 2s, 4s, and 8s. ** Note 2: RSTIN_N timer is programmable 0.5 ms, 1.0 ms, 2.0 ms 33 ms. 7 www.national.com LP8765 POWER-ON AND POWER-OFF SEQUENCES 30162005 Default on power rail startup sequence: 2.5V reference voltage→LDO5 → Buck2 → Buck1. Power-Off sequence is in reverse order of startup sequences. www.national.com 8 LP8765 LP8765 POWER REGULATOR SPEC TABLE Loads Voltage Range (V) Default Voltage (V) Current Rating [mA] Default ON (Y/N) Turn-on Sequence Voltage Steps (mV) ON/OFF Control BUCK1 Core1 0.8 - 1.45 1.2 600 Y T0+128µs 50 S/I(always on) BUCK2 IO&Memory 0.8 - 2.1 1.8 500 Y T0+64µs 50 S/I(always on) LDO1 (ALDO1) 26M, VCTCXO 1.5 - 3.0 2.85 100 N - 50 S/I AND GPIO1 (EN1) LDO2 (ALDO2) RF IC 1.5 - 3.0 2.85 200 N - 50 S/I AND GPIO1 (EN1) LDO3 (ALDO3) RF IC 1.5 - 3.0 2.85 200 N - 50 S/I OR GPIO1 (EN1) LDO4 (ALDO4) RF IC 1.85 - 3.4 2.85 200 N - 50 S/I AND GPIO2 (EN2) LDO5 (DLDO1) IO&Cam&LCD 1.5 - 3.3 3 400 Y T0 100 S/I(always on) LDO6 (DLDO2) USIM1 1.8 or 3.0 1.8 200 N - - S/I LDO7 (DLDO3) USIM2&IO 1.5 - 3.3 1.8 200 N - 100 S/I - S/I Outputs VTRM (DLDO4) USB Xcvr 3.3 fixed 3.3 10 Y Always as long as the USB/Adaptor plugged LDO8 (DLDO5) SDIO 1.5 - 3.3 3 300 N - 100 S/I LDO9 (DLDO6) Core2 0.8 - 1.5 1.2 300 - - 50 S/I AND GPIO3 (EN3) REF_OUT ADC Ref_Voltage 2.5 2.5 1 Y Always - S/I(always on) 9 www.national.com LP8765 THERMAL SHUTDOWN The Thermal Shutdown (TSD) function monitors the chip temperature to protect the chip from temperature damage caused, e.g. by excessive power dissipation. The temperature monitoring function has two threshold values that result in protective actions. When a lower threshold of +125°C is exceeded, the TSDL bit in the Register 0x08 will be set and an “early warning” interrupt, unless masked, is generated to the processor. A read operation on the TSDL bit will reset it if the temperature has decreased to lower than 10°C below the threshold. If the temperature exceeds a higher threshold value of +160°C, the TSDH bit in the Register 0x08 is set, and the chip will automatically go to the Power-Off sequence. A read operation on the TSDH bit will reset it. Power On can be activated only if the junction temperature is less than the early warning lower threshold +115°C. Support Functions REFERENCE LP8765 has an internal reference block creating all necessary references and biasing for all blocks. OSCILLATOR There is an internal oscillator giving clock to the bucks and to logic control (2MHz typ.). REFERENCE VOLTAGE (2.5V) Parameter Typ. Min. Max. REF_OUT 2.5V 2.425 2.575V V Load (typ.) 100 µA OPERATING VOLTAGE MONITOR There is Operating Voltage Monitor (OPVM) that checks VDD-pin voltage before starting Power-On sequence. OPVM is also checked during Power-On sequence. If the VDD voltage is less than OPVM threshold LP8765 will not power on. After LP8765 successfully passed Power-On sequence OPVM is not monitored. Parameter Typ. Min. Max. Unit OPVM threshold 3.1 3.0 3.25 V www.national.com Parameter Typ. Higher Threshold*) 160 Early Warning*) 125 Early Warning Hysteresis*) 10 *) Guaranteed by design. 10 Unit °C Operating Ratings 2) VIN_CHG (Note 10) BATT VCOIN VIN1, VIN2, ViN_B1, VIN_B2 VIN3 All input-output pins Junction Temperature (TJ) Range Ambient Temperature (TA) Maximum Power Dissipation (Note 5) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN_CHG, VIN_CHG SENSE VBATT, VIN1, VIN2, VIN_B1, VIN_B2 VIN3 VCOIN SINK1&2 SINK3 All other input-only pins Junction Temperature (TJ-MAX) Storage Temperature Maximum Continuous Power Dissipation PD-MAX ESD (Note 4) VIN_CHG, BATT, GND, ADC1&2, PWR_ON, RSTIN_N All other −0.3V to +28V −0.3V to +6V -0.3 to +4.5V −0.3V to +4V −0.3V to VBATT+0.5V and < 6V −0.3V to 10V −0.3V to VBATT+0.3V, max 6V 150°C −40 to 150°C (Note 3) (Note 1, Note 2) 4.5V to 6.8V 3.0V to 5.5V 2.0V to 3.6V 2.5V to VBATT 0.7V to 4.5V 0V to VBATT −40°C to +125°C −40°C to +85°C 1.4W Thermal Properties (Note 9) Junction-to-Ambient Thermal Resistance (θJA) (Jedec Standard Thermal PCB) 38.6°C/W 8 kV HBM 2 kV HBM General Electrical Characteristics CURRENT CONSUMPTION Unless otherwise noted, VBATT (=VVIN1=VVIN2=VVIN3=VVIN_B1=VVIN_B2) =3.7V, GND (=GND_B1=GND_B2=GND_LDO=GND_SINK) =0V, CVIN_CHG=CVIN_B1=CVIN_B2=CBUCK1=CBUCK2= CVIN1=CVIN2=10 μF, CLDOx=CVTRM=CCOIN=1μF. Typical values and limits appearing in normal type apply for TJ=25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, TJ= −40°C to +125°C . (Note 6) Symbol Parameter Conditions IQ(STANDBY) Battery Standby Current IQ(SLEEP) Battery Current in SLEEP Mode @ 0 load Typ COIN on, no load 35 COIN off, no load 4 SLEEP_EN=LOW (Buck1, Buck2, LDO5, COIN & REF_OUT on) Limit Min Max Units µA 165 LOGIC AND CONTROL Unless otherwise noted, VBATT (=VVIN1=VVIN2=VVIN3=VVIN_B1=VVIN_B2) =3.7V, GND (=GND_B1=GND_B2=GND_LDO=GND_SINK) =0V, CVIN_CHG=CVIN_B1=CVIN_B2=CBUCK1=CBUCK2= CVIN1=CVIN2=10 μF, CLDOx=CVTRM=CCOIN=1μF. Typical values and limits appearing in normal type apply for TJ=25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, TJ= −40°C to +125°C. (Note 7) Symbol Parameter Conditions Typ Limit Min Max Units Logic and Control Inputs VIL Input Low Level VIH Input High Level VIL Input Low Level VIH Input High Level VIL Input Low Level VIH Input High Level 0.9 PWR_ON V 1.5 0.4 GPIO1-3 V 1.3 0.35 SDA,SCL 1.3 11 V www.national.com LP8765 Absolute Maximum Ratings (Note 1, Note LP8765 Symbol VIL Parameter Conditions Typ Limit Min 0.2* VLDO5 Input Low Level SLEEP_N, PS_HOLD, RSTIN_N VIH Input High Level ILEAK Input Current SDA, SCL, SLEEP_N, PS_HOLD, GPIO1-3 0V
LP8765RLE/NOPB 价格&库存

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