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LP8867-Q1, LP8869-Q1
SNVSB83B – JUNE 2019 – REVISED JANUARY 2020
LP8867-Q1, LP8869-Q1 Low EMI Automotive LED Driver with 4-, 3- Channels
1 Features
2 Applications
•
•
1
•
•
•
•
AEC-Q100 Qualified for automotive applications:
– Device temperature grade 1:
–40°C to +125°C, TA
Functional safety capable
– Documentation available to aid functional
safety system design
3-, 4-Channel 120-mA current sinks
– High dimming ratio of 10 000:1 at 100 Hz
– Current matching 1% (typical)
– LED String current up to 120 mA per channel
– Outputs can be combined externally for higher
current per string
Integrated boost and SEPIC converter for LED
string power
– Input voltage operating range 4.5 V to 40 V
– Output voltage up to 45 V
– Integrated 3.3-A Switch FET
– Switching frequency 300 kHz to 2.2 MHz
– Switching synchronization input
– Spread spectrum for lower EMI
Fault detection and protection
– Fault output
– Input voltage OVP, UVLO and OCP
– Boost block SW OVP and output OVP
– LED open and short fault detection
– Power-Line FET control for battery bus
protection
– Automatic LED current reduction with external
temperature sensor
– Thermal shutdown
Simplified Schematic
VIN
4.5...40 V RISENSE
Q1
D1
L1
CIN BOOST
Backlight for:
– Automotive infotainment
– Automotive instrument clusters
– Smart mirrors
– Heads-up displays (HUD)
3 Description
The LP8867-Q1, LP8869-Q1 is an automotive highlyintegrated, low-EMI, easy-to-use LED driver with DCDC converter. The DC-DC converter supports both
boost and SEPIC mode operation. The device has
four or three high-precision current sinks that can be
combined for higher current capability.
The DC-DC converter has adaptive output voltage
control based on the LED forward voltages. This
feature minimizes the power consumption by
adjusting the voltage to the lowest sufficient level in
all conditions. For EMI reduction DC-DC supports
spread spectrum for switching frequency and an
external synchronization with dedicated pin. A widerange adjustable frequency allows the LP886x-Q1 to
avoid disturbance for sensitive frequency band.
The input voltage range for the LP886x-Q1 is from
4.5 V to 40 V to support automotive start-stop and
load dump condition. The LP886x-Q1 integrates
extensive fault detection features.
Device Information(1)
PART NUMBER
LP8867-Q1
LP8869-Q1
LED Backlight Efficiency
COUT
96
VL DO
CIN
CLDO
FB
CFB
Up to 120 mA/string
LDO
OUT1
LP8867-Q1
OUT2
RFSET
BRIGHTNESS
EN
FSET
OUT3
VLDO
SYNC
OUT4
R4
PWM
TSET
VDDIO/EN
FAULT
PGND
R3
R7
TSENSE
FAULT
R8
R1
System Efficiency (%)
SW
RTº
ISET
GND
PAD
R6
RISET
6.50 mm × 4.40 mm
100
RGS
SD
VSENSE_N
VIN
HTSSOP (20)
BODY SIZE (NOM)
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Up to 45 V
R2
PACKAGE
R5
92
88
84
80
76
VIN = 16V
VIN = 12V
VIN = 8V
VIN = 6V
72
68
80
160
240
320
Output Current (mA)
400
480
D000
NTC
VDDIO
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LP8867-Q1, LP8869-Q1
SNVSB83B – JUNE 2019 – REVISED JANUARY 2020
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
5
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
5
5
5
6
6
6
6
7
7
7
7
9
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Internal LDO Electrical Characteristics .....................
Protection Electrical Characteristics .........................
Current Sinks Electrical Characteristics....................
PWM Brightness Control Electrical Characteristics ..
Boost and SEPIC Converter Characteristics ..........
Logic Interface Characteristics................................
Typical Characteristics ............................................
Detailed Description ............................................ 11
8.1
8.2
8.3
8.4
9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
11
12
13
25
Application and Implementation ........................ 27
9.1 Application Information............................................ 27
9.2 Typical Applications ................................................ 27
10 Power Supply Recommendations ..................... 32
11 Layout................................................................... 32
11.1 Layout Guidelines ................................................. 32
11.2 Layout Example .................................................... 33
12 Device and Documentation Support ................. 34
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Device Support......................................................
Documentation Support ........................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
34
34
34
34
34
34
34
13 Mechanical, Packaging, and Orderable
Information ........................................................... 34
4 Revision History
Changes from Revision A (July 2019) to Revision B
•
Page
Added the functional safety link to the Features section........................................................................................................ 1
Changes from Original (June 2019) to Revision A
•
2
Page
Changed from Advance Information to Production Data ....................................................................................................... 1
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Copyright © 2019–2020, Texas Instruments Incorporated
Product Folder Links: LP8867-Q1 LP8869-Q1
LP8867-Q1, LP8869-Q1
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SNVSB83B – JUNE 2019 – REVISED JANUARY 2020
5 Device Comparison Table
LP8869-Q1
LP8869C-Q1
LP8867-Q1
3
3
4
4
120 mA
120 mA
120 mA
120 mA
Yes
No
Yes
No
Number of LED channels
LED current / channel
Power Line FET Control and
Automatic Current De-rating Support
LP8867C-Q1
6 Pin Configuration and Functions
LP8867-Q1 PWP Package
20-Pin HTSSOP With Exposed Thermal Pad
Top View
VIN
1
20
VSENSE_N
LDO
2
19
SD
FSET
3
18
SW
VDDIO/EN
4
17
PGND
FAULT
5
16
FB
SYNC
6
15
OUT1
PWM
7
14
OUT2
TSENSE
8
13
OUT3
TSET
9
12
OUT4
11
GND
ISET
10
EP*
*EXPOSED PAD
LP8869-Q1 PWP Package
20-Pin HTSSOP With Exposed Thermal Pad
Top View
VIN
1
20
VSE NS E_N
LDO
2
19
SD
FSET
3
18
SW
VDDIO/EN
4
17
PGND
FAULT
5
16
FB
SYNC
6
15
OUT1
PWM
7
14
OUT2
TSENSE
8
13
OUT3
TSET
9
12
GND
ISET
10
11
GND
EP*
*EXP OSED PAD
Copyright © 2019–2020, Texas Instruments Incorporated
Product Folder Links: LP8867-Q1 LP8869-Q1
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SNVSB83B – JUNE 2019 – REVISED JANUARY 2020
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Pin Functions
PIN
NO.
NAME
TYPE (1)
DESCRIPTION
1
VIN
A
Input power pin; input voltage OVP detection pin; input current sense positive input pin.
2
LDO
A
Output of internal LDO; connect a 1-μF decoupling capacitor between this pin and noise-free ground.
Put the capacitor as close to the chip as possible.
3
FSET
A
DC-DC (boost or SEPIC) switching frequency setting resistor; for normal operation, resistor value
from 24 kΩ to 219 kΩ must be connected between this pin and ground.
4
VDDIO/EN
I
Enable input for the device as well as supply input (VDDIO) for digital pins.
5
FAULT
OD
6
SYNC
I
Input for synchronizing DC-DC converter. If synchronization is not used, connect this pin to ground to
disable spread spectrum or to VDDIO/EN to enable spread spectrum.
7
PWM
I
PWM dimming input.
8
TSENSE
A
Input for NTC resistor divider. Refer to LED Current Dimming With External Temperature Sensor for
proper connection. If unused, the pin must be left floating.
9
TSET
A
Input for NTC resistor divider. Refer to LED Current Dimming With External Temperature Sensor for
proper connection. If unused, the pin must be connected to GND.
10
ISET
A
LED current setting resistor; for normal operation, resistor value from 20 kΩ to 129 kΩ must be
connected between this pin and ground.
11
GND
G
Ground.
12
OUT4/GND
A
Current sink output for LP8867-Q1
This pin must be connected to ground if not used.
Fault signal output. If unused, the pin may be left floating.
GND pin for LP8869-Q1
13
OUT3
A
Current sink output.
This pin must be connected to ground if not used.
14
OUT2
A
Current sink output.
This pin must be connected to ground if not used.
15
OUT1
A
Current sink output.
This pin must be connected to ground if not used.
16
FB
A
DC-DC (boost or SEPIC) feedback input; for normal operation this pin must be connected to the
middle of a resistor divider between VOUT and ground using feedback resistor values greater than
5kΩ.
17
PGND
G
DC-DC (boost or SEPIC) power ground.
18
SW
A
DC-DC (boost or SEPIC) switch pin.
19
SD
A
Power-line FET control. Open Drain (current sink type) Output. If unused, the pin may be left floating.
20
VSENSE_N
A
Input current sense negative input. Connect to VIN pin when input current sense resistor is not used.
(1)
4
A: Analog pin, G: Ground pin, P: Power pin, I: Input pin, I/O: Input/Output pin, O: Output pin, OD: Open Drain pin
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SNVSB83B – JUNE 2019 – REVISED JANUARY 2020
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
Voltage on pins
MIN
MAX
VIN, VSENSE_N, SD, SW, FB
–0.3
50
OUT1, OUT2, OUT3, OUT4
–0.3
45
LDO, SYNC, FSET, ISET, TSENSE, TSET, PWM, VDDIO/EN, FAULT
–0.3
5.5
Continuous power dissipation (3)
UNIT
V
Internally Limited
Ambient temperature, TA (4)
–40
125
°C
Junction temperature, TJ (4)
–40
150
°C
Storage temperature, Tstg
–65
150
°C
(1)
(2)
(3)
(4)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to the potential at the GND pins.
Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 165°C (typical) and
disengages at TJ = 145°C (typical).
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP =
150°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the
part/package in the application (RθJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (RθJA × PD-MAX).
7.2 ESD Ratings
VALUE
Human-body model (HBM), per AEC Q100-002, all pins
V(ESD)
(1)
Electrostatic discharge
Charged-device model (CDM), per AEC
Q100-011
(1)
UNIT
±2000
Corner pins (1, 10, 11 and 20)
±750
All pins
±500
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
7.3 Recommended Operating Conditions
Over operating free-air temperature range (unless otherwise noted) (1)
VIN
Voltage on
pins
(1)
MIN
NOM
MAX
4.5
12
45
SW, VSENSE_N, SD
0
OUT1, OUT2, OUT3, OUT4
0
40
FB, FSET, LDO, ISET, TSENSE, TSET, VDDIO/EN, FAULT
0
5.25
SYNC, PWM
0
VDDIO/EN
UNIT
45
V
All voltages are with respect to the potential at the GND pins.
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Product Folder Links: LP8867-Q1 LP8869-Q1
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SNVSB83B – JUNE 2019 – REVISED JANUARY 2020
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7.4 Thermal Information
LP886x-Q1
THERMAL METRIC (1)
PWP (HTSSOP)
UNIT
20 PINS
RθJA
Junction-to-ambient thermal resistance (2)
44.2
°C/W
RθJCtop
Junction-to-case (top) thermal resistance
26.5
°C/W
RθJB
Junction-to-board thermal resistance
22.4
°C/W
ψJT
Junction-to-top characterization parameter
0.9
°C/W
ψJB
Junction-to-board characterization parameter
22.2
°C/W
RθJCbot
Junction-to-case (bottom) thermal resistance
2.5
°C/W
(1)
(2)
For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power
dissipation exists, special care must be paid to thermal dissipation issues in board design.
7.5 Electrical Characteristics
Limits apply over the full operation temperature range −40°C ≤ TA ≤ +125°C , unless otherwise speicified, VIN = 12V.
PARAMETER
IQ
TEST CONDITIONS
MIN
Standby supply current
Device disabled, VVDDIO/EN = 0 V, VIN = 12 V
Active supply current
VIN = 12 V, VOUT = 26 V, output current 80
mA/channel, converter ƒSW = 300 kHz
TYP
MAX
4.5
20
UNIT
μA
5
12
mA
7.6 Internal LDO Electrical Characteristics
Limits apply over the full operation temperature range −40°C ≤ TA ≤ +125°C , unless otherwise speicified, VIN = 12V.
PARAMETER
VLDO
Output voltage
VDR
Dropout voltage
ISHORT
Short circuit current
IEXT
Current for external load
TEST CONDITIONS
VIN = 12 V
MIN
TYP
MAX
4.15
4.3
4.55
V
120
300
430
mV
50
UNIT
mA
5
mA
7.7 Protection Electrical Characteristics
Limits apply over the full operation temperature range −40°C ≤ TA ≤ +125°C , unless otherwise speicified, VIN = 12V.
PARAMETER
MIN
TYP
MAX
41
42
44
V
VOCP
VIN OCP threshold voltage, VIN VSENSEN
135
160
186
mV
VUVLO
VIN UVLO Falling threshold
3.7
3.85
4
VUVLO_HYST
VIN UVLO Rising threshold - VIN UVLO
Fallling threshold
ISENSE_N
VSENSE_N pin leakage
VSENSE_N = 45V, EN = L
0.1
3
µA
ISD_LEAK
SD pin leakage
VSD = 45V, EN = L
0.1
3
µA
ISD
SD pull down current
230
283
µA
VFB_OVP
FB threshold for BST_OVP fault
TTSD
Thermal shutdown Rising threshold
175
℃
TTSD_HYS
Thermal shutdown Rising threshold Thermal shutdown Falling threshold
VOVP
VIN OVP threshold voltage
6
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TEST CONDITIONS
150
185
165
20
V
mV
2.3
150
UNIT
V
℃
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SNVSB83B – JUNE 2019 – REVISED JANUARY 2020
7.8 Current Sinks Electrical Characteristics
Limits apply over the full operation temperature range −40°C ≤ TA ≤ +125°C , unless otherwise speicified, VIN = 12V.
TYP
MAX
ILEAKAGE
Leakage current
PARAMETER
Outputs OUT1 to OUT4 , VOUTx = 45 V, EN = L
0.1
5
IMAX
Maximum current
OUT1, OUT2, OUT3, OUT4, RISET = 20 kΩ
120
IOUT
Output current accuracy
IOUT = 100 mA
IMATCH
Output current matching (1)
IOUT = 100 mA, PWM duty =100%
VLOW_COMP
Low comparator threshold
0.9
VMID_COMP
Mid comparator threshold
1.9
VHIGH_COMP
High comparator threshold
(1)
TEST CONDITIONS
MIN
−5%
µA
mA
5%
1%
5.6
UNIT
6
5%
V
V
7
V
Output Current Accuracy is the difference between the actual value of the output current and programmed value of this current.
Matching is the maximum difference from the average. For the constant current sinks on the part (OUTx), the following are determined:
the maximum output current (MAX), the minimum output current (MIN), and the average output current of all outputs (AVG). Matching
number is calculated: (MAX-MIN)/AVG. The typical specification provided is the most likely norm of the matching figure for all parts. LED
current sinks were characterized with 1-V headroom voltage. Note that some manufacturers have different definitions in use.
7.9 PWM Brightness Control Electrical Characteristics
Limits apply over the full operation temperature range −40°C ≤ TA ≤ +125°C , unless otherwise speicified, VIN = 12V.
PARAMETER
ƒPWM
PWM input frequency
tON/OFF
Minimum on/off time (1)
(1)
TEST CONDITIONS
MIN
TYP
100
MAX
20 000
0.5
UNIT
Hz
µs
This specification is not ensured by ATE.
7.10 Boost and SEPIC Converter Characteristics
Limits apply over the full operation temperature range −40°C ≤ TA ≤ +125°C , unless otherwise speicified, VIN = 12V.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
Input voltage
VOUT
Output voltage
ƒSW_MIN
Minimum switching frequency
Defined by RFSET resistor
300
ƒSW_MAX
Maximum switching frequency
Defined by RFSET resistor
2 200
tOFF
Minimum switch OFF time (1)
ƒSW ≥ 1.15 MHz
ISW_MAX
SW current limit first triggerred
tSW_MAX
SW current limit first triggerred period
ISW_LIM
SW current limit
RDSON
FET RDSON
fSYNC
External SYNC frequency
300
tSYNC_ON
External SYNC on time (1)
150
ns
tSYNC_OFF
External SYNC off time (1)
150
ns
(1)
4.5
40
6
45
UNIT
VIN
3.3
3.7
kHz
kHz
55
ns
4.1
A
3.7
A
1.6
3
3.35
240
V
s
400
mΩ
2 200
kHz
This specification is not ensured by ATE.
7.11 Logic Interface Characteristics
Limits apply over the full operation temperature range −40°C ≤ TA ≤ +125°C , unless otherwise speicified, VIN = 12V.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
LOGIC INPUT VDDIO/EN
VIL
Input low level
VIH
Input high level
0.4
1.65
−1
Input DC current
IEN
Input transient current during VDDIO/EN
powering up
5
V
30
µA
1.2
mA
LOGIC INPUT SYNC, PWM
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SNVSB83B – JUNE 2019 – REVISED JANUARY 2020
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Logic Interface Characteristics (continued)
Limits apply over the full operation temperature range −40°C ≤ TA ≤ +125°C , unless otherwise speicified, VIN = 12V.
PARAMETER
VIL
Input low level
VIH
Input high level
II
Input current
TEST CONDITIONS
MIN
TYP
MAX
0.2 ×
VDDIO/E
N
0.8 ×
VDDIO/E
N
−1
1
UNIT
V
μA
LOGIC OUTPUT FAULT
VOL
Output low level
Pullup current 3 mA
ILEAKAGE
Output leakage current
V = 5.5 V
8
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0.3
0.5
V
1
μA
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SNVSB83B – JUNE 2019 – REVISED JANUARY 2020
7.12 Typical Characteristics
480
480
400
400
Boost Output Current (mA)
Boost Output Current (mA)
Unless otherwise specified: D = NRVB460MFS, TA = 25°C
320
240
160
80
4.5
VBoost = 18V
VBoost = 26V
VBoost = 37V
5.5
6.5
7.5
Input Voltage (V)
8.5
320
240
160
VBoost = 18V
VBoost = 26V
VBoost = 37V
80
4.5
9
5.5
D005
ƒSW = 400 kHz
L = 33 μH
DC Load (PWM = 100%)
CIN and COUT = 33 µF (electrolytic) + 2 × 10 µF (ceramic)
6.5
7.5
Input Voltage (V)
8.5
9.5
10
D006
ƒSW = 1.1 MHz
L = 15 μH
DC Load (PWM = 100%)
CIN and COUT = 33 µF (electrolytic) + 10 µF (ceramic)
Figure 1. Maximum Boost Current
Figure 2. Maximum Boost Current
480
5.5
Output current mismatch (%)
Boost Output Current (mA)
5
400
320
240
160
80
4.5
VBoost = 18V
VBoost = 26V
VBoost = 37V
5.5
6.5
7.5
Input Voltage (V)
ƒSW = 2.2 MHz
L = 10 μH
CIN and COUT = 3× 10 µF (ceramic)
8.5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
30
40
50
9.5
60
70
80
90
Output Current (mA)
100
110
120
D008
D007
DC Load (PWM = 100%)
Figure 4. LED Current Sink Matching
100
96
96
92
92
Boost Efficiency (%)
Boost Efficiency (%)
Figure 3. Maximum Boost Current
100
88
84
80
76
VIN = 16V
VIN = 12V
VIN = 8V
VIN = 6V
72
68
80
160
240
320
Output Current (mA)
ƒSW = 400 kHz
L = 22 μH
CIN and COUT = 33 µF (electrolytic)
+ 2 × 10 µF (ceramic)
400
88
84
80
76
VIN = 16V
VIN = 12V
VIN = 8V
VIN = 6V
72
480
68
80
D001
DC Load (PWM = 100%)
VBOOST = 18 V
160
240
320
Output Current (mA)
ƒSW = 400 kHz
L = 22 μH
CIN and COUT = 33 µF (electrolytic)
+ 2 × 10 µF (ceramic)
Figure 5. Boost Efficiency
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400
480
D002
DC Load (PWM = 100%)
VBOOST = 30 V
Figure 6. Boost Efficiency
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Typical Characteristics (continued)
100
100
96
96
92
92
Boost Efficiency (%)
Boost Efficiency (%)
Unless otherwise specified: D = NRVB460MFS, TA = 25°C
88
84
80
76
VIN = 16V
VIN = 12V
VIN = 8V
VIN = 6V
72
68
80
160
240
320
Output Current (mA)
ƒSW = 2.2 MHz
L = 4.7 μH
CIN and COUT = 3 × 10 µF (ceramic)
400
88
84
80
76
VIN = 16V
VIN = 12V
VIN = 8V
VIN = 6V
72
480
68
80
160
D003
DC Load (PWM = 100%)
VBOOST = 18 V
ƒSW = 2.2 MHz
L = 4.7 μH
CIN and COUT = 3 × 10 µF (ceramic)
Figure 7. Boost Efficiency
10
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240
320
Output Current (mA)
400
480
D004
DC Load (PWM = 100%)
VBOOST = 30 V
Figure 8. Boost Efficiency
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8 Detailed Description
8.1 Overview
The LP8867-Q1, LP8869-Q1 is a highly integrated LED driver for automotive infotainment , cluster and HUD
medium-size LCD backlight applications. It includes a DC-DC with an integrated FET, supporting both boost and
SEPIC modes, an internal LDO enabling direct connection to battery without need for a pre-regulated supply and
3 or 4 LED current sinks. The VDDIO/EN pin provides the supply voltage for digital IOs (PWM and SYNC inputs)
and at the same time enables the device.
The switching frequency on the DC-DC converter is set by a resistor connected to the FSET pin. The maximum
voltage of the DC-DC is set by a resistive divider connected to the FB pin. For the best efficiency, the output
voltage is adapted automatically to the minimum necessary level needed to drive the LED strings. This is done
by monitoring LEDs' cathode voltage in real time. For EMI reduction, two optional features are available:
• Spread spectrum, which reduces EMI noise around the switching frequency and its harmonic frequencies
• DC-DC can be synchronized to an external frequency connected to SYNC pin
The 3 or 4 constant current outputs OUT1, OUT2, OUT3, and OUT4 provide LED current up to 120 mA. Value
for the current per OUT pin is set with a resistor connected to ISET pin. Current sinks that are not used must be
connected to ground. Grounded current sink is disabled and excluded from boost adaptive voltage detection
loop.
Brightness is controlled with the PWM input. Frequency range for the input PWM is from 100 Hz to 20 kHz. LED
output PWM behavior follows the input PWM so the output frequency is equal to the input frequency.
LP886x-Q1 has extensive fault detection features:
• LED open and short detection
• VIN input overvoltage protection
• VIN input undervoltage protection
• VIN input overcurrent protection
• VBoost output overvoltage protection
• SW overvoltage protection
• Thermal shutdown in case of chip overheated
Fault condition is indicated through the FAULT output pin.
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8.2 Functional Block Diagram
RISENSE
VIN
L
Q
RGS
CIN
CIN BOOST
VIN
VSENSE_N
D
COUT
SD
POWER-LINE FET CONTROL
LDO
LDO
CLDO
SW
SYNC
RFSET
PGND
BOOST
CONTROLLER
FSET
FB
RISET
4 x LED
CURRENT
SINK
ISET
TSET
CURRENT
SETTING
OUT2
NTC
TSENSE
OUT3
PWM
OUT4
tº
VDDIO/EN
FAULT
VDDIO
OUT1
GND
DIGITAL BLOCKS
(FSM, ADAPTIVE VOLTAGE
CONTROL, SAFETY LOGIC
etc.)
ANALOG BLOCKS
(CLOCK GENERATOR, VREF,
TSD etc.)
EXPOSED PAD
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8.3 Feature Description
8.3.1 Integrated DC-DC Converter
The LP886x-Q1 DC-DC converter generates supply voltage for the LEDs and can operate in boost mode or in
SEPIC mode. The output voltage, switching frequency are all configured by external resistors.
For detailed boost application, refer to Typical Application for 4 LED Strings
For detailed SEPIC application, refer to SEPIC Mode Application
8.3.1.1 DC-DC Converter Parameter Configuration
The LP886x-Q1 converter is a current-peak mode DC-DC converter, where the switch FET's current and the
output voltage feedback are measured and controlled. The block diagram is shown in Figure 9.
D
VIN
VOUT
CIN
COUT
R1
SW
OCP
ADAPTIVE
VOLTAGE
CONTROL
RC
filter
FB
R2
LIGHT
LOAD
S R
R
-
GM
OVP
R
CURRENT
SENSE
R
PGND
+
SYNC
FSET
GM
FSET
CTRL
BOOST
OSCILLATOR
RFSET
OFF/BLANK
TIME
PULSE
GENERATOR
BLANK
TIME
CURRENT
RAMP
GENERATOR
Figure 9. DC-DC converter in Boost Application
8.3.1.1.1 Switching Frequency
Switching frequency is adjustable between 300 kHz and 2.2 MHz with RFSET resistor as Equation 1:
ƒSW = 67600 / (RFSET + 6.4)
where
•
•
ƒSW is switching frequency, kHz
RFSET is frequency setting resistor, kΩ
(1)
For example, if RFSET is set to 163 kΩ, fSW will be 400 kHz.
In most cases, lower switching frequency has higher system efficiency and lower internal temperature increase.
8.3.1.1.2 Spread Spectrum and External SYNC
LP886x-Q1 has an optional spread spectrum feature (±3% from central frequency, 1-kHz modulation frequency)
which reduces EMI noise at the switching frequency and its harmonic frequencies. If SYNC pin level is low,
spread spectrum function is disabled. If SYNC pin level is high, spread spectrum function is enabled.
LP886x-Q1 DC-DC converter can be driven by an external SYNC signal between 300 kHz and 2.2 MHz. When
external synchronization is used, spread spectrum is not available. If the external synchronization input
disappears, DC-DC continues operation at the frequency defined by RFSET resistor and spread spectrum function
will be enabled/disabled depending on the final SYNC pin level.
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Feature Description (continued)
External SYNC frequency must be 1.2 to 1.5 times higher than the frequency defined by RFSET resistor. In
external SYNC configuration, minimum frequency setting with RFSET could go as low as 250 kHz to support 300kHz switching with external clock.
Table 1. DC-DC Synchronization Mode
SYNC PIN INPUT
MODE
Low
Spread spectrum disabled
High
Spread spectrum enabled
300 to 2200 kHz frequency
Spread spectrum disabled, external synchronization mode
8.3.1.1.3 Recommended Component Value and Internal Parameters
The LP886x-Q1 DC-DC converter has an internal compensation network to ensure the stability. There's no
external component needed for compensation. It's strongly recommended that the inductance value and the
boost input and output capacitors value follow the requirement of Table 2. Also, the DC-DC internal parameters
are chosen automatically according to the selected switching frequency (see Table 2) to ensure stability.
Table 2. Boost Converter Parameters (1)
FREQUENCY (kHz)
TYPICAL
INDUCTANCE (µH)
TYPICAL BOOST INPUT
AND OUTPUT CAPACITORS (µF)
MINIMUM SWITCH
OFF TIME (ns) (2)
BLANK
TIME (ns)
1
300 to 480
22 or 33
2 ×10 (cer.) + 33 (electr.)
150
95
2
480 to 1150
15
10 (cer.) + 33 (electr.)
60
95
3
1150 to 1650
10
3 × 10 (cer.)
40
95
4
1650 to 2200
4.7 or 10
3 × 10 (cer.)
40
70
RANGE
(1)
(2)
Parameters are for reference only
Due to current sensing comparator delay the actual minimum off time is 6 ns (typical) longer than in the table.
8.3.1.1.4 DC-DC Converter Switching Current Limit
The LP886x-Q1 DC-DC converter has an internal SW FET inside chip's SW pin. The internal FET current is
limited to 3.35 A (typical). The DC-DC converter will sense the internal FET current, and turn off the internal FET
cycle-by-cycle when the internal FET current reaches the limit.
To support start transient condition, the current limit could be automatically increased to 3.7 A for a short period
of 1.6 seconds when a 3.35-A limit is reached.
NOTE
Application condition where the 3.35-A limit is exceeded continuously is not allowed. In
this case the current limit would be 3.35 A for 1.6 seconds followed by 3.7-A limit for 1.6
seconds, and this 3.2-second period repeats.
8.3.1.1.5 DC-DC Converter Light Load Mode
LP886x-Q1 DC-DC converter will enter into light load mode in below condition:
• VIN voltage is very close to VOUT
• Loading current is very low
• PWM pulse width is very short
When DC-DC converter enters into light load mode, DC-DC converter stops switching occasionally to make sure
boost output voltage won't rise up too much. It could also be called as PFM mode, since the DC-DC converter
switching frequency will change in this mode.
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8.3.1.2 Adaptive Voltage Control
The LP886x-Q1 DC/DC converter generates the supply voltage for the LEDs. During normal operation, boost
output voltage is adjusted automatically based on the LED cathode (OUTx pin) voltages. This is called adaptive
boost control. Only the active LED outputs are monitored to control the adaptive boost voltage. Any LED strings
with open or short faults are removed from the adaptive voltage control loop. The OUTx pin voltages are
periodically monitored by the control loop. The boost voltage is raised if any of the OUTx voltage falls below the
VLOW_COMP threshold. The boost voltage is also lowered if all OUTx voltages are higher than VLOW_COMP
threshold. The boost voltage keeps unchanged when one of OUTx voltage touches the VLOW_COMP threshold. In
normal operation, the lowest voltage among the OUTx pins is around VLOW_COMP, and boost voltage stays
constant. VLOW_COMP level is the minimum voltage which could guarantee proper LED current sink operation. See
Figure 10 for how the boost voltage automatically scales based on the OUT1-4 pin voltage.
Boost
decreases voltage
No actions
OUT 1-4
VOLTAGE
The lowest channel
voltage touches
VLOW_COMP threshold
No output is close to
VLOW_COMP threshold
Boost
Increases voltage
One output is lower than
VLOW_COMP threshold
Normal
Conditions
OUT4
OUT3
OUT2
OUT1
OUT4
OUT3
OUT2
OUT1
OUT4
OUT3
OUT2
OUT1
VLOW_COMP
Dynamic
Conditions
Figure 10. Adaptive Boost Voltage Control Loop Function
8.3.1.2.1 Using Two-Divider
VBOOST_MAX voltage should be chosen based on the maximum voltage required for LED strings. Recommended
maximum voltage is about 3 to 5-V higher than maximum LED string voltage. DC-DC output voltage is adjusted
automatically based on LED cathode voltage. The maximum, minimum and initial boost voltages can be
calculated with Equation 2:
·
§V
VBOOST ¨ BG K u 0.0387 ¸ u R1 VBG
© R2
¹
where
•
•
•
•
•
•
VBG = 1.2 V
R2 recommended value is 10 kΩ to 200 kΩ
R1/R2 recommended value is 5 to 10
K = 1 for maximum adaptive boost voltage (typical)
K = 0 for minimum adaptive boost voltage (typical)
K = 0.88 for initial boost voltage (typical)
(2)
For example, if R1 is set to 750 kΩ and R2 is set to 130 kΩ, VBOOST will be in the range of 8.1 V to 37.1 V.
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VOUT
COUT
R1
R2
+
GM
±
VBG
FB
+
VOVP
BSTOV P
±
Curren t DA C
(38.7uA Full-Scale)
Figure 11. FB External Two-Divider Resistors
8.3.1.2.2 Using T-Divider
Alternatively, a T-divider can be used if resistance less than 100 kΩ is required for the external resistive divider.
Then the maximum, minimum and initial boost voltages can be calculated with
§ R1u R3
·
VBOOST = ¨
+R1+R3 ¸ K u 0.0387 +
© R2
¹
§ R1 ·
+1¸ u VBG
¨
© R2 ¹
where
•
•
•
•
•
•
VBG = 1.2 V
R2 recommended value is 10 kΩ to 200 kΩ
R1/R2 recommended value is 5 to 10
K = 1 for maximum adaptive boost voltage (typical)
K = 0 for minimum adaptive boost voltage (typical)
K = 0.88 for initial boost voltage (typical)
(3)
For example, if R1 is set to 100 kΩ, R2 is set to 10 kΩ and R3 is set to 60 kΩ, VBOOST will be in the range of 13.2
V to 42.6 V.
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VOUT
COUT
R1
+
GM
±
VBG
R3
FB
R2
+
VOVP
BSTOV P
±
Curren t DA C
(38.7uA Full-Scale)
Figure 12. FB External T-divider Resistors
8.3.1.2.3 Feedback Capacitor
When operating with no electrolytic capacitor in boost output, which is a typical case when boost frequency is in
the 1.15-MHz to 2.2-MHz range, a feedback capacitor needs to be put in parallel with R1 to ensure the loop
stability. The value of the capacitor is recommended to be:
CFB =
1
2S fzR1
where
•
fz = 20 kHz
(4)
For example, if R1 is set to 750 kΩ, CFB needs to be around 11 pF.
VOUT
COUT
C FB
R1
R2
Optiona l
R3
+
GM
±
VBG
FB
+
VOVP
BSTOV P
±
Curren t DA C
(38.7uA Full-Scale)
Figure 13. FB External Resistors With Capacitor When Operating With No Electrolytic Capacitor In Boost
Output
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8.3.2 Internal LDO
The internal LDO regulator converts the input voltage at VIN to a 4.3-V output voltage for internal use. Connect a
minimum of 1-µF ceramic capacitor from LDO pin to ground, as close to the LDO pin as possible.
8.3.3 LED Current Sinks
8.3.3.1 LED Output Configuration
LP886x-Q1 detects LED output configuration during start-up. Any current sink output connected to ground is
disabled and excluded from the adaptive voltage control of the DC-DC converter and fault detections.
If more current is needed, LP886x-Q1's output could also be connected together to support the high current LED.
8.3.3.2 LED Current Setting
The output current of the LED outputs is controlled with external RISET resistor. RISET value for the target LED
current per channel can be calculated using Equation 5:
ILED = 2000 u
VBG
RISET
where
•
•
•
VBG = 1.2 V
RISET is current setting resistor, kΩ
ILED is output current per OUTx pin, mA
(5)
For example, if RISET is set to 20 kΩ, ILED will be 120 mA per channel.
8.3.3.3 Brightness Control
LP886x-Q1 controls the brightness of the display with conventional PWM. Output PWM directly follows the input
PWM. Input PWM frequency can be in the range of 100 Hz to 20 kHz.
8.3.4 Power-Line FET Control
The LP886x-Q1 has a power-line FET control feature. It has a control pin (SD) for driving the gate of an external
power-line P-Channel MOSFET. This feature grants LP886x-Q1 the ability to immediately cut-off the power part
of backlight system when failure occurs, protecting other parallel power systems from being impacted. In
addition, the feature could smooth the inrush current during powering-up by turning on the power-line FET
gradually. In SOFT START state, the SD pin slowly increases the sink current until it reaches 230 μA. An
example schematic is shown in Figure 14.
The value of RGS should follow the rules below
• ISD_MAX × RGS should be less than the power-line FET's maximum acceptable Source-Gate voltage
• ISD_MIN × RGS should be greater than the minimum power-line FET's Source-Gate voltage which could ensure
a low On-State Resistance.
A 20-kΩ RGS is chosen in typical application which generates a 4.6 V difference on power-line FET's SourceGate voltage.
VIN
RISENSE
Q1
L1
CIN BOOST
RGS
SW
SD
VSENSE_N
VIN
CIN
Figure 14. Power-Line FET Control Schematics
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The LP886x-Q1 turns off the power-line FET and prevents the possible boost and LEDs leakage when the device
is disabled or in FAULT RECOVERY state.
Power-line FET control is an optional feature. Leave SD pin NC and don't use power-line FET when this feature
is not needed.
8.3.5 LED Current Dimming With External Temperature Sensor
The LP886x-Q1 has an optional feature to decrease automatically LED current when LED overheating is
detected with an external NTC sensor. An example of the behavior is shown in Figure 15. When the NTC
temperature reaches T1, the LP886x-Q1 starts to decrease the LED current. When the LED current has reduced
to 17.5% of the nominal value, current turns off until temperature returns to the operation range.
LED CURRENT
100%
17.5%
T1
NTC TEMPERATURE
T2
Figure 15. Temperature-Based LED Current Dimming Functionality
VBG
ISET_SCALED
1:2000
ISET
+
LED OUT
RISET
VDD
ILED
R3
ITSENSE
R4
LED DRIVER
TSET
TSENSE
RT
R7
R5
ITSENSE
R6
NTC
Figure 16. Temperature-Based LED Current Dimming Implementation
When TSET pin is grounded and TSENSE is floated, this feature is disabled. LED current is set by RISET resistor:
ILED = 2000 u
VBG
RISET
where
•
•
•
VBG = 1.2 V
RISET is current setting resistor, kΩ
ILED is output current per OUTx pin, mA
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When external NTC is connected, the TSENSE pin current decreases LED output current. Temperature T1 and
de-rate slope are defined by external resistors as explained below.
Parallel resistance of the NTC sensor RT and resistor R4 is calculated by formula:
RT u R6
RT R6
RII
(7)
TSET voltage can be calculated with Equation 8:
VTSET
VDD u
R5
R4 R5
(8)
TSENSE pin current is calculated by Equation 9:
VTSET
ITSENSE
RII
VDD u
RII
RII R3
RII2
R7
RII R3
where
•
VDD is the bias voltage of the resistor group. It's recommended to connect with chip's internal LDO output (pin
2)
(9)
ISET pin current defined by RISET is:
VBG
ISET _ SCALED
RISET
(10)
For Equation 11, ITSENSE current must be limited between 0 and ISET_SCALED. If ITSENSE > ISET_SCALED then set
ITSENSE = ISET_SCALED. If ITSENSE < 0 then set ITSENSE = 0.
LED driver output current is:
ILED = (ISET_SCALED – ITSENSE ) x 2 000
(11)
When current is lower than 17.5% of the nominal value, the current is set to 0 (the cut-off point).
An Excel® calculator is available for calculating the component values for a specific NTC and target thermal
profile (contact TI E2E™ support forums ). Figure 17 shows an example thermal profile implementation.
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120
0.06
100
0.05
80
0.04
60
0.03
40
0.02
LED current
20
TSENSE Current (mA)
LED Current (mA)
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0.01
TSENSE current
0.00
0
60
70
80
90
100
110
120
Temperature (ž&
C006
NTC – 10 kΩ at 25ºC
RISET = 24 kΩ
R2 = 10 kΩ
R4 = 100 kΩ
VDD = 4.3 V
R1 = 10 kΩ
R3 = 2 kΩ
R5 = 7.5 kΩ
Figure 17. Calculation Example
8.3.6 Fault Detections and Protection
The LP886x-Q1 has fault detection for LED open and short, VIN input overvoltage protection (VIN_OVP) , VIN
undervoltage protection (VIN_UVLO), VIN overcurrent protection (VIN_OCP) , Boost output overvoltage
protection (BST_OVP), SW overvoltage protection (SW_OVP) and thermal shutdown (TSD).
8.3.6.1 Supply Fault and Protection
8.3.6.1.1 VIN Undervoltage Fault (VIN_UVLO)
The LP886x-Q1 device supports VIN undervoltage protection. The VIN undervoltage falling threshold is 3.85-V
typical and rising threshold is 4-V typical. If during operation of the LP886x-Q1 device, the VIN pin voltage falls
below the VIN undervoltage falling threshold, the boost, LED outputs, and power-line FET will be turned off, and
the device will enter FAULT RECOVERY mode. The FAULT pin will be pulled low. The LP886x-Q1 will exit
FAULT RECOVERY mode after 100 ms and try the start-up sequence again. VIN_UVLO fault detection is
available in SOFT START, BOOST START, and NORMAL state.
8.3.6.1.2 VIN Overvoltage Fault (VIN_OVP)
The LP886x-Q1 device supports VIN overvoltage protection. The VIN overvoltage threshold is 43-V typical. If
during LP886x-Q1 operation, VIN pin voltage rises above the VIN overvoltage threshold, the boost, LED outputs
and the power-line FET will be turned off, and the device will enter FAULT RECOVERY mode. The FAULT pin
will be pulled low. The LP886x-Q1 will exit FAULT RECOVERY mode after 100 ms and try the start-up sequence
again. VIN_OVP fault detection is available in SOFT START, BOOST START and NORMAL state.
8.3.6.1.3 VIN Overcurrent Fault (VIN_OCP)
The LP886x-Q1 device supports VIN overcurrent protection. If during LP886x-Q1 operation, voltage drop
between VIN pin and VSENSE_N pin rises above 160-mV typical, the boost, LED outputs and the power-line
FET will be turned off, and the device will enter FAULT RECOVERY mode. The FAULT pin will be pulled low.
The LP886x-Q1 will exit FAULT RECOVERY mode after 100 ms and try the start-up sequence again. VIN_OCP
fault detection is available in SOFT START, BOOST START, and NORMAL state.
A 30-mΩ resistor is recommended to put between VIN pin and VSENSE_N pin, which will set the VIN
overcurrent threshold to 5.3 A.
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8.3.6.2 Boost Fault and Protection
8.3.6.2.1 Boost Overvoltage Fault (BST_OVP)
The LP886x-Q1 device supports boost overvoltage protection. If during LP886x-Q1 operation, the FB pin voltage
exceeds the VFB_OVP threshold, which is 2.3-V typical, the boost, LED outputs and the power-line FET will be
turned off, and the device will enter FAULT RECOVERY mode. The FAULT pin will be pulled low. The LP886xQ1 will exit FAULT RECOVERY mode after 100 ms and try the start-up sequence again. BST_OVP fault
detection is available in NORMAL state.
Calculating back from FB pin voltage threshold to boost output OVP voltage threshold, the value is not a static
threshold, but a dynamic threshold changing with the current target boost adaptive voltage:
§ R1 ·
VBOOST_OVP = VBOOST + ¨
+1¸ u ( VFB_OVP
© R2 ¹
VBG )
where
•
•
•
•
VBOOST is the current target boost adaptive voltage, which in most time is the current largest LED string forward
voltage among multiple strings + 0.9 V in steady state
VFB_OVP = 2.3 V
VBG = 1.2 V
R1 and R2 is the resistor value of FB external network in Using Two-Divider and Using T-Divider
(12)
For example, if R1 is set to 750 kΩ and R2 is set to 130 kΩ, VBOOST will report OVP when the boost voltage is 7.4
V above target boost voltage.
This equation holds true in both two-divider FB external network and T-divider FB external network.
8.3.6.2.2 SW Overvoltage Fault (SW_OVP)
Besides boost overvoltage protection, the LP886x-Q1 supports SW pin overvoltage protection to further protect
the boost system from overvoltage scenario. If during LP886x-Q1 operation, the SW pin voltage exceeds the
VSW_OVP threshold, which is 49-V typical, the boost, LED outputs and the power-line FET are turned off, and the
device will enter FAULT RECOVERY mode. The FAULT pin will be pulled low. The LP886x-Q1 will exit FAULT
RECOVERY mode after 100 ms and try the start-up sequence again. SW_OVP fault detection is available in
SOFT START, BOOST START and NORMAL state.
8.3.6.3 LED Fault and Protection (LED_OPEN and LED_SHORT)
Every LED current sink has 3 comparators for LED fault detections.
OUT#
VHIGH_COMP
HIG H_COMP
VMID_COMP
MID_COMP
VLOW_COMP
LOW_COMP
CURRENT/PWM
CONTROL
Figure 18. Comparators for LED Fault Detection
Figure 19 shows cases which generates LED faults. Any LED faults will pull the Fault pin low.
During normal operation, boost voltage is raised if any of the used LED outputs falls below the VLOW_COMP
threshold. Open LED fault is detected if boost output voltage has reached the maximum and at least one LED
output is still below the threshold. The open string is then disconnected from the boost adaptive control loop and
its output is disabled.
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Shorted LED fault is detected if one or more LED outputs are above the VHIGH_COMP threshold (typical 6 V) and at
least one LED output is inside the normal operation window (between VLOW_COMP and VMID_COMP, typical 0.9 V
and 1.9 V). The shorted string is disconnected from the boost adaptive control loop and its output is disabled.
LED Open fault detection and LED Short fault detection are available only in NORMAL state.
No actions
OUT1~4 PIN
VOLTAGE
Open LED fault
when
VBOOST = MAX
Short LED fault
(at least one channel between
LOW_COMP and MID COMP)
Open LED Fault
Short LED Fault
VHIGH_COMP
VMID_COMP
Normal Condition
OUT4
OUT3
OUT2
OUT1
OUT4
OUT3
OUT2
OUT1
OUT4
OUT3
OUT2
OUT1
VLOW_COMP
Fault Condition
Figure 19. Protection and DC-DC Voltage Adaptation Algorithms
If LED fault is detected, the device continues normal operation and only the faulty string is disabled. The fault is
indicated via the FAULT pin which can be released by toggling VDDIO/EN pin low for a short period of 2 µs to 20
µs. LEDs are turned off for this period but the device stays in NORMAL state. If VDDIO/EN is low longer, the
device goes to STANDBY and restarts when EN goes high again.
This means if the system doesn't want to simply disable the device because of LED faults. It could clear the LED
faults by toggling VDDIO/EN pin low for a short period of 2 µs to 20 µs.
8.3.6.4 Thermal Fault and Protection (TSD)
If the die temperature of LP886x-Q1 reaches the thermal shutdown threshold TTSD, which is 165°C typical, the
boost, power-line FET and LED outputs are turned off to protect the device from damage. The FAULT pin will be
pulled low. The LP886x-Q1 will exit FAULT RECOVERY mode after 100 ms and try the start-up sequence again.
Only if the die temperature drops lower than TTSD - TTSD_HYS, which is 145°C typical, the device could start-up
normally. TSD fault detection is available in SOFT START, BOOST START and NORMAL state.
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8.3.6.5 Overview of the Fault and Protection Schemes
A summary of the LP886x-Q1 fault detection behavior is shown in Table 3. Detected faults (excluding LED open or short) cause device to enter FAULT
RECOVERY state. In FAULT_RECOVERY the DC-DC and LED current sinks of the device are disabled, and the FAULT pin is pulled low. The device will
exit FAULT RECOVERY mode after 100 ms and try the start-up sequence again. When recovery is successful and device enters into NORMAL state, the
FAULT pin is released high.
Table 3. Fault Detections
FAULT/
PROTECTION
VIN overvoltage
protection
FAULT
PIN
Enter FAULT_
RECOVERY
STATE
ACTIVE STATE
ACTION
VIN > 43 V
Yes
Yes
SOFT START, BOOST
START, NORMAL
Device enters into FAULT RECOVERY state, and restarts after
100 ms
FAULT NAME
VIN_OVP
CONDITION
VIN undervoltage
protection
VIN_UVLO
Effective when VIN <
3.85 V
Released when VIN >4
V
Yes
Yes
SOFT START, BOOST
START, NORMAL
Device enters into FAULT RECOVERY state, and restarts after
100 ms
VIN overcurrent
protection
VIN_OCP
VIN-VSENSE_N >
160mV
Yes
Yes
SOFT START, BOOST
START, NORMAL
Device enters into FAULT RECOVERY state, and restarts after
100 ms
NORMAL
Open string is removed from the DC-DC voltage control loop
and output is disabled.
Fault pin low could be released by toggling VDDIO/EN pin, If
VDDIO/EN is low for a period of 2 µs to 20 µs, LEDs are turned
off for this period but device stays in NORMAL.
LED _OPEN
Adaptive Voltage is
max. and
any OUTx voltage <
0.9 V
Shorted LED fault
LED_SHORT
One of OUTx voltage
is [0.9 V, 1.9 V] and
any OUTx voltage > 6
V
Yes
No
NORMAL
Short string is removed from the DC-DC voltage control loop
and output is disabled.
Fault pin low could be released by toggling VDDIO/EN pin, If
VDDIO/EN is low for a period of 2 µs to 20 µs, LEDs are turned
off for this period but device stays NORMAL.
Boost overvoltage
protection
BST_OVP
VFB > 2.3 V
Yes
Yes
NORMAL
Fault is detected if boost overvoltage condition duration is more
than 560 ms
Device enters into FAULT RECOVERY state, and restarts after
100 ms
SW overvoltage
protection
SW_OVP
VSW > 49 V
Yes
Yes
SOFT START, BOOST
START, NORMAL
Device enters into FAULT RECOVERY state, and restarts after
100 ms
Effective when Tj >
165 ºC
Released when Tj <
145 ºC
Yes
Yes
SOFT START, BOOST
START, NORMAL
Device enters into FAULT RECOVERY state, and restarts until
TSD fault is released
Open LED fault
Thermal protection
24
TSD
Yes
No
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8.4 Device Functional Modes
8.4.1 STANDBY State
The LP886x-Q1 enters STANDBY state when the VIN voltage powers on and voltage is higher than VINUVLO
rising threshold, which is 4-V typical. In STANDBY state, the device is able to detect VDDIO/EN signal. When
VDDIO/EN is pulled high, the internal LDO wakes up and the device enters into SOFT START state. The device
will re-enter the STANDBY state when VDDIO/EN is pulled low for more than 50 µs.
8.4.2 SOFT START State
In SOFT START state, Power-line FET is enabled, and boost input and output capacitors are charged to VIN
level. VIN_OCP, VIN_OVP, VIN_UVLO, SW_OVP and TSD fault are active. After 65 ms, the device enters into
BOOST START state.
8.4.3 BOOST START State
In BOOST START state, DC-DC controller is turned on and boost voltage is ramped to initial boost voltage level
with reduced current limit. VIN_OCP, VIN_OVP, VIN_UVLO, SW_OVP and TSD fault are active in this state.
After 50 ms, LED outputs do a one-time detection on grounded outputs. Grounded outputs are disabled and
excluded from the adaptive voltage control loop. Then the device enters into NORMAL state.
8.4.4 NORMAL State
In NORMAL state, LED drivers are enabled when PWM signal is high. All faults are active in this state. Fault pin
will be released high in the start of NORMAL state if recovering from FAULT RECOVERY state and no fault is
available.
8.4.5 FAULT RECOVERY State
Non-LED faults can trigger fault recovery state. LED drivers, boost converter and power-line FET are all disabled.
After 100 ms, the device attempts to restart from SOFT START state if VDDIO/EN is still high.
8.4.6 State Diagram and Timing Diagram for Start-up and Shutdown
VIN > VUVLO
STANDBY
VDDIO / EN = 1
VDDIO / EN = 0
SOFT START
65 ms
BOOST START
50 ms
FAULT
FAULT
100 ms
FAULT RECOVERY
LED OUTPUT
CONFIGURATION
DETECTION
(1st time power-up only)
FAULT
NORMAL
VDDIO / EN = 0
Figure 20. State Diagram
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Device Functional Modes (continued)
T=50 s
t>500 s
VIN
LDO
VDDIO/EN
SYNC
Headroom adaptation
VOUT=VIN level ± diode drop
VOUT
PWM OUT
IQ
Active mode
SOFT
START
BOOST
START
Figure 21. Timing Diagram for the Typical Start-Up and Shutdown
26
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The LP886x-Q1 is designed for automotive applications. The input voltage (VIN) is intended to be connected to
the automotive battery, which supports voltage range from 4.5 V to 40 V. Device internal circuitry is powered
from the integrated LDO.
The LP886x-Q1 uses a simple four-wire control:
• VDDIO/EN for enable
• PWM input for brightness control
• SYNC pin for boost synchronisation (optional)
• FAULT output to indicate fault condition (optional)
9.2 Typical Applications
9.2.1 Typical Application for 4 LED Strings
Figure 22 shows the typical application for LP886x-Q1 which supports 4 LED strings, 100 mA per string with a
boost switching frequency of 400 kHz.
VIN
5...28 V
RISENSE
L1
Q1
D1
Up to 34V
COUT
CIN BOOST
R2
SW
RGS
R1
SD
VSENSE_N
FB
VIN
CIN
CLDO
LDO
OUT1
LP8867-Q1
OUT2
RFSET
FSET
BRIGHTNESS
VDDIO/EN
SYNC
OUT4
PWM
TSET
TSENSE
VDDIO/EN
FAULT
FAULT
R8
VLDO
OUT3
PGND
R4
R7
ISET
GND
PAD
R3
RTf
R6
R5
NTC
RISET
VDDIO/EN
Figure 22. Four Strings 100 mA per String Configuration
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Typical Applications (continued)
9.2.2 Design Requirements
Table 4. Design Requirements Table
DESIGN PARAMETER
VALUE
VIN voltage range
5 V – 28 V
LED string
4P8S LEDs (30 V max)
LED string current
100 mA
Maximum boost voltage
34 V
Boost switching frequency
400 kHz
External boost sync
not used
Boost spread spectrum
enabled
L1
33 μH
CIN
100 µF, 50 V
CIN BOOST
2 × (10 µF, 50-V ceramic) + 33 µF, 50-V electrolytic
COUT
2 × (10 µF, 50-V ceramic) + 33 µF, 50-V electrolytic
CLDO
1 µF, 10 V
RISET
24 kΩ
RFSET
160 kΩ
R1
685 kΩ
R2
130 kΩ
R8
10 kΩ
9.2.3 Detailed Design Procedure
9.2.3.1 Inductor Selection
There are two main considerations when choosing an inductor; the inductor must not saturate, and the inductor
current ripple must be small enough to achieve the desired output voltage ripple. Different saturation current
rating specifications are followed by different manufacturers so attention must be given to details. Saturation
current ratings are typically specified at 25°C. However, ratings at the maximum ambient temperature of
application should be requested from the manufacturer. Shielded inductors radiate less noise and are preferred.
The saturation current must be greater than the sum of the maximum load current, and the worst case averageto-peak inductor current. Equation 13 shows the worst case conditions
IOUTMAX
+ IRIPPLE For Boost
'¶
(VOUT - VIN) VIN
x
Where IRIPPLE =
(2 x L x f)
VOUT
ISAT >
Where D =
•
•
•
•
•
•
•
(VOUT ± VIN)
(VOUT)
DQG '¶ = (1 - D)
IRIPPLE - peak inductor current
IOUTMAX - maximum load current
VIN - minimum input voltage in application
L - min inductor value including worst case tolerances
f - minimum switching frequency
VOUT - output voltage
D - Duty Cycle for CCM Operation
(13)
As a result, the inductor should be selected according to the ISAT. A more conservative and recommended
approach is to choose an inductor that has a saturation current rating greater than the maximum current limit. A
saturation current rating of at least 4.1 A is recommended for most applications. See Table 2 for recommended
inductance value for the different switching frequency ranges. The inductor’s resistance should be less than
300 mΩ for good efficiency.
28
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See detailed information in Understanding Boost Power Stages in Switch Mode Power Supplies.
Power Stage Desinger Tool can be used for the boost calculation.
9.2.3.2 Output Capacitor Selection
A ceramic capacitor with 2 × VMAX BOOST or more voltage rating is recommended for the output capacitor. The
DC-bias effect can reduce the effective capacitance by up to 80%, which needs to be considered in capacitance
value selection. If the selected ceramic capacitors' voltage rating is less than 2 × VMAX BOOST, an alternative way
is to increase the number of ceramic capacitors. Capacitance recommendations for different switching
frequencies are shown in Table 2. To minimize audible noise of ceramic capacitors their physical size should
typically be minimized.
9.2.3.3 Input Capacitor Selection
A ceramic capacitor with 2 × VIN MAX or more voltage rating is recommended for the input capacitor. The DC-bias
effect can reduce the effective capacitance by up to 80%, which needs to be considered in capacitance value
selection. If the selected ceramic capacitors' voltage rating is less than 2 × VMAX BOOST, an alternative way is to
increase the number of ceramic capacitors. Capacitance recommendations for different boost switching
frequencies are shown in Table 2.
9.2.3.4 LDO Output Capacitor
A ceramic capacitor with at least 10-V voltage rating is recommended for the output capacitor of the LDO. The
DC-bias effect can reduce the effective capacitance by up to 80%, which needs to be considered in capacitance
value selection. Typically a 1-µF capacitor is sufficient.
9.2.3.5 Diode
A Schottky diode should be used for the boost output diode. Do not use ordinary rectifier diodes, because slow
switching speeds and long recovery times degrade the efficiency and the load regulation. Diode rating for peak
repetitive current should be greater than inductor peak current (up to 4.1 A) to ensure reliable operation in boost
mode. Average current rating should be greater than the maximum output current. Schottky diodes with a low
forward drop and fast switching speeds are ideal for increasing efficiency. Choose a reverse breakdown voltage
of the Schottky diode significantly larger than the output voltage. The junction capacitance of Schottky diodes are
also very important. Big junction capacitance leads to huge reverse current and big noise when boost is
switching. A
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