LSF0108QPWRQ1

LSF0108-Q1 SDLS967D – MAY 2016 – REVISED APRIL 2021 LSF0108-Q1 Automotive 8-Channel Multi-Voltage Level Translator 1 Features 2 Applications • • • • • • • • • • • • • • Qualified for automotive applications AEC-Q100 qualified with the following results: – Device HBM ESD classification level 2000-V – Device CDM ESD classification level 1000-V Provides bidirectional voltage translation with no direction pin Supports up to 100 MHz up translation and greater than 100 MHz down translation at ≤ 30-pF capacitive load and up to 40 MHz up or down translation at 50-pF capacitive load Supports hot insertion Allow bidirectional voltage level translation between – 0.95 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V – 1.2 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V – 1.8 V ↔ 2.5 V, 3.3 V, 5 V – 2.5 V ↔ 3.3 V, 5 V – 3.3 V ↔ 5 V Low standby current 5-V tolerance I/O port to support TTL Low ron provides less signal distortion High-impedance I/O pins for EN = low Flow-through pinout for easy PCB trace routing Latch-up performance exceeds 100 mA per JESD 17 –40°C to +125°C operating temperature range • • • • • GPIO, MDIO, PMBus, SMBus, SDIO, UART, I2C, and other interfaces in telecom infrastructure Infotainment and cluster Body electronics and lighting Hybrid, electric and powertrain systems Passive safety ADAS 3 Description • • • • Supports up to 100 MHz up translation and greater than 100 MHz down translation at 100 MHz given the correct conditions. The maximum frequency is dependent upon the loading of the application. The LSF0108-Q1 behaves like a standard switch where the bandwidth of the device is dictated by the on resistance and on capacitance of the device. Figure 8-2 shows a bandwidth measurement of the LSF0108-Q1 using a two-port network analyzer. 0 –1 –2 Gain (dB) –3 –4 –5 –6 –7 –8 –9 0.1 1 10 100 Frequency (MHz) 1000 Figure 8-2. 3-dB Bandwidth The 3-dB point of the LSF0108-Q1 is ≈ 600 MHz; however, this measurement is an analog type of measurement. For digital applications the signal should not degrade up to the fifth harmonic of the digital signal. The frequency bandwidth should be at least five times the maximum digital clock rate. This component of the signal is very important in determining the overall shape of the digital signal. In the case of the LSF0108-Q1, a digital clock frequency of greater than 100 MHz can be achieved. The LSF0108-Q1 does not provide any drive capability. Therefore higher frequency applications will require higher drive strength from the host side. No pull-up resistor is needed on the host side (3.3 V) if the LSF0108-Q1 is being driven by standard CMOS totem pole output driver. Ideally, it is best to minimize the trace length from the LSF0108-Q1 on the sink side (1.8 V) to minimize signal degradation. All fast edges have an infinite spectrum of frequency components; however, there is an inflection (or knee) in the frequency spectrum of fast edges where frequency components higher than ƒknee are insignificant in determining the shape of the signal. 12 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: LSF0108-Q1 LSF0108-Q1 www.ti.com SDLS967D – MAY 2016 – REVISED APRIL 2021 To calculate the maximum practical frequency component, or the knee frequency (fknee), use Equation 2 and Equation 3: ƒknee = 0.5 / RT (10 – 80%) (2) ƒknee = 0.4 / RT (20 – 80%) (3) For signals with rise time characteristics based on 10% to 90% thresholds, fknee is equal to 0.5 divided by the rise time of the signal. For signals with rise time characteristics based on 20% to 80% thresholds, which is very common in many of today's device specifications, ƒknee is equal to 0.4 divided by the rise time of the signal. Some guidelines to follow that will help maximize the performance of the device: • • • Keep trace length to a minimum by placing the LSF0108-Q1 close to the I2C output of the processor. The trace length should be less than half the time of flight to reduce ringing and line reflections or nonmonotonic behavior in the switching region. To reduce overshoots, a pull-up resistor can be added on the 1.8 V side; be aware that a slower fall time is to be expected. 8.2.1.3 Application Curves 4 Input Output 3 Input (3.3V) Voltage (V) 2 Output (1.0V) 1 0 -1 0 50 100 150 200 250 300 350 400 450 500 Time (ns) . . Figure 8-3. Captured Waveform From Above Set-Up (1.8 V to 3.3 V at 2.5 MHz) I2C Figure 8-4. Captured Waveform From Above MDIO Setup Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: LSF0108-Q1 13 LSF0108-Q1 www.ti.com SDLS967D – MAY 2016 – REVISED APRIL 2021 8.2.2 Multiple Voltage Translation in Single Device Vpu= 5.0V Vref(A) = 1.8V Vref_B Vref_A 200KΩ LSF0108 1.8V Vcc GPIO A1 A3 A4 A6 Rpu Rpu SCL B6 SW SDA GPIO B5 SW SCL Vcc GPIO B4 SW A5 Vpu= 3.3V GPIO B3 SW GPIO Vcc GPIO B2 SW GPIO Rpu B1 SW A2 GPIO EN SDA Rpu Rpu MDIO SW MDIO MDC SW MDC 8.2.2.1 Design Requirements Refer to Section 8.2.1.1. 8.2.2.2 Detailed Design Procedure Refer to Section 8.2.1.2. 8.2.2.3 Application Curve 3.5 Input Output 3 Voltage (V) 2.5 2 1.5 1 0.5 0 -0.5 0 2 4 6 8 10 12 Time (ns) 14 16 18 20 22 D012 Figure 8-5. Translation Down (3.3 to 1.8 V) at 150 MHz 14 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: LSF0108-Q1 LSF0108-Q1 www.ti.com SDLS967D – MAY 2016 – REVISED APRIL 2021 9 Power Supply Recommendations There are no power sequence requirements for the LSF0108-Q1. For enable and reference voltage guidelines, please refer to the Section 8.2.1.1.1. 10 Layout 10.1 Layout Guidelines Because the LSF0108-Q1 is a switch-type level translator, the signal integrity is highly related with a pull-up resistor and PCB capacitance condition. • • • Short signal trace as possible to reduce capacitance and minimize stub from pull-up resistor. Place LSF close to high voltage side. Select the appropriate pull-up resistor that applies to translation levels and driving capability of transmitter. 10.2 Layout Example LSF0108-Q1 GND 1 20 EN Vref_A 2 19 Vref_B A1 3 18 B1 A2 4 17 B2 A8 10 11 Short Signal Trace as possible B8 Minimize Stub as possible Figure 10-1. Short Trace Layout TP1 SD Controller (1.8 V IO) SDIO Controller (3.3 V IO) LSF0108 SDIO level translator Device PCB TP2 Figure 10-2. Device Placement 3.5 3.5 Input Output Input Output 3 2.5 2.5 2 2 Voltage (V) Voltage (V) 3 1.5 1 0.5 1.5 1 0.5 0 0 -0.5 -0.5 0 2.5 5 7.5 10 12.5 15 Time (ns) 17.5 20 22.5 25 0 D011 3 6 9 12 15 18 Time (ns) 21 24 27 30 D010 Figure 10-3. Waveform From TP1 (Pull-Up Figure 10-4. Waveform From TP2 (Pull-Up Resistor: 160-Ω and 50-pF Capacitance 3.3 V to 1.8 Resistor: 160-Ω and 50-pF Capacitance 1.8 V to 3.3 V at 100 MHz) V at 100 MHz) Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: LSF0108-Q1 15 LSF0108-Q1 www.ti.com SDLS967D – MAY 2016 – REVISED APRIL 2021 11 Device and Documentation Support 11.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 11.2 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 11.3 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 11.4 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 11.5 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the mostcurrent data available for the designated device. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, see the left-hand navigation pane. 16 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: LSF0108-Q1 PACKAGE OPTION ADDENDUM www.ti.com 20-Apr-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) LSF0108QPWRQ1 ACTIVE TSSOP PW 20 2000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 LSF0108Q (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of