MAX232EIDR

Product Folder Sample & Buy Support & Community Tools & Software Technical Documents MAX232E SLLS723C – APRIL 2006 – REVISED AUGUST 2016 MAX232E Dual RS-232 Driver and Receiver With IEC61000-4-2 Protection 1 Features 3 Description • The MAX232E is a dual driver and receiver that includes a capacitive voltage generator to supply RS232-F compliant voltage levels from a single 5-V supply. Each receiver converts RS-232 inputs to 5-V TTL/CMOS levels. This receiver has a typical threshold of 1.3 V, a typical hysteresis of 0.5 V, and can accept ±30-V inputs. Each driver converts TTL/CMOS input levels into TIA/RS-232-F levels. 1 • • • • • Meets or Exceeds TIA/RS-232-F and ITU Recommendation V.28 ESD Protection for RS-232 Bus Pins – ±15-kV Human-Body Model (HBM) – ±8-kV IEC61000-4-2, Contact Discharge – ±15-kV IEC61000-4-2, Air-Gap Discharge Operates From a Single 5-V Power Supply With 1-µF Charge-Pump Capacitors Operates up to 250 kbit/s Two Drivers and Two Receivers Low Supply Current: 8 mA Typical Device Information(1) PART NUMBER 2 Applications • • • • • TIA/RS-232-F Battery-Powered Systems Terminals Modems Computers PACKAGE (PINS) BODY SIZE (NOM) MAX232ECD MAX232EID SOIC (16) 9.90 mm × 3.91 mm MAX232ECDW MAX232EIDW SOIC WIDE (16) 10.30 mm × 7.50 mm MAX232ECN MAX232EIN PDIP (16) 19.30 mm × 6.35 mm MAX232ECPW MAX232EIPW TSSOP (16) 5.00 mm × 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Logic Diagram (Positive Logic) POWER 5V DIN 2 2 TX 250 kb/s ROUT 2 RX DOUT RS-232 IEC61000-4-2 2 RIN RS-232 Copyright © 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. MAX232E SLLS723C – APRIL 2006 – REVISED AUGUST 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 4 4 4 4 5 5 5 5 6 6 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Electrical Characteristics: Driver ............................... Electrical Characteristics: Receiver .......................... Switching Characteristics: Driver .............................. Switching Characteristics: Receiver.......................... Typical Characteristics ............................................ Parameter Measurement Information .................. 7 Detailed Description .............................................. 9 8.1 8.2 8.3 8.4 9 Overview ................................................................... 9 Functional Block Diagram ......................................... 9 Feature Description................................................... 9 Device Functional Modes........................................ 10 Applications and Implementation ...................... 11 9.1 Application Information............................................ 11 9.2 Typical Application .................................................. 11 10 Power Supply Recommendations ..................... 13 11 Layout................................................................... 13 11.1 Layout Guidelines ................................................. 13 11.2 Layout Example .................................................... 13 12 Device and Documentation Support ................. 14 12.1 12.2 12.3 12.4 12.5 Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 14 14 14 14 14 13 Mechanical, Packaging, and Orderable Information ........................................................... 14 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (November 2009) to Revision C Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ................................................................................................. 1 • Deleted "±30-V Input Levels" from Features ......................................................................................................................... 1 • Deleted Ordering Information table; see POA at the end of the data sheet ......................................................................... 1 • Added MIN value ±3 to "Receiver input voltage (RIN1, RIN2) row in Recommended Operating Conditions ....................... 4 • Changed RθJA values in Thermal Information ......................................................................................................................... 4 • Deleted table note 3 from Receiver Section Electrical Characteristics ................................................................................. 5 • Added a new row to the Function Table for Each Receiver ................................................................................................ 10 2 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: MAX232E MAX232E www.ti.com SLLS723C – APRIL 2006 – REVISED AUGUST 2016 5 Pin Configuration and Functions D, DW, N, or PW Package Add 16-Pin SOIC, PDIP, or TSSOP Top View C1+ VS+ C1− C2+ C2− VS− DOUT2 RIN2 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC GND DOUT1 RIN1 ROUT1 DIN1 DIN2 ROUT2 Pin Functions PIN NO. 1 NAME C1+ I/O DESCRIPTION — Positive lead of C1 capacitor 2 VS+ O Positive charge pump output for storage capacitor only 3 C1– — Negative lead of C1 capacitor 4 C2+ — Positive lead of C2 capacitor 5 C2– — Negative lead of C2 capacitor 6 VS– O Negative charge pump output for storage capacitor only 7 DOUT2 O RS-232 line data output (to remote RS-232 system) 8 RIN2 I RS-232 line data input (from remote RS-232 system) 9 ROUT2 O Logic data output (to UART) 10 DIN2 I Logic data input (from UART) 11 DIN1 I Logic data input (from UART) 12 ROUT1 O Logic data output (to UART) 13 RIN1 I RS-232 line data input (from remote RS-232 system) 14 DOUT1 O RS-232 line data output (to remote RS-232 system) 15 GND — Ground 16 VCC — Supply voltage—connect to external 5-V power supply Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: MAX232E 3 MAX232E SLLS723C – APRIL 2006 – REVISED AUGUST 2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) Input supply voltage VS+ Positive output supply voltage VS– Negative output supply voltage VI Input voltage VO Output voltage UNIT 6 V VCC – 0.3 15 V –0.3 –15 V –0.3 VCC + 0.3 Receiver Short-circuit duration Operating virtual junction temperature Tstg Storage temperature (2) MAX Driver TJ (1) MIN –0.3 (2) VCC ±30 DOUT VS– – 0.3 VS+ + 0.3 ROUT –0.3 VCC + 0.3 DOUT V V Unlimited –65 150 °C 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to network GND. 6.2 ESD Ratings VALUE Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) Electrostatic discharge V(ESD) ±15000 Other pins ±3000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) All pins ±1500 IEC61000-4-2, air-gap discharge Pins 7, 8, 13, and 14 ±15000 IEC61000-4-2, contact discharge (1) (2) Pins 7, 8, 13, and 14 UNIT V ±8000 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions VCC Supply voltage VIH High-level input voltage (DIN1, DIN2) VIL Low-level input voltage (DIN1, DIN2) NOM MAX 4.5 5 5.5 2 Receiver input voltage (RIN1, RIN2) TA MIN MAX232EC Operating free-air temperature MAX232EI UNIT V V 0.8 V ±3 ±30 V 0 70 –40 85 °C 6.4 Thermal Information MAX232E THERMAL METRIC (1) (2) (3) D (SOIC) DW (SOIC) N (PDIP) PW (TSSOP) UNIT 16 PINS 16 PINS 16 PINS 16 PINS RθJA Junction-to-ambient thermal resistance 73.8 73.4 43.3 101.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 33.4 35.1 30 29.3 °C/W RθJB Junction-to-board thermal resistance 31.4 38.3 23.3 47.3 °C/W (1) (2) (3) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Maximum power dissipation is a function of TJ(max), RθJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/RθJA. Operating at the absolute maximum TJ of 150°C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: MAX232E MAX232E www.ti.com SLLS723C – APRIL 2006 – REVISED AUGUST 2016 Thermal Information (continued) MAX232E THERMAL METRIC (1) (2) (3) D (SOIC) DW (SOIC) N (PDIP) PW (TSSOP) 16 PINS UNIT 16 PINS 16 PINS 16 PINS ψJT Junction-to-top characterization parameter 5.8 9.4 14.4 1.4 °C/W ψJB Junction-to-board characterization parameter 31.1 37.7 23.2 46.6 °C/W 6.5 Electrical Characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 10) TEST CONDITIONS (1) PARAMETER ICC (1) (2) Supply current VCC = 5.5 V MIN TYP (2) MAX All outputs open, TA = 25°C 8 10 UNIT mA Test conditions are C1 – C4 = 1 µF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 5 V and TA = 25°C. 6.6 Electrical Characteristics: Driver over recommended ranges of supply voltage and operating free-air temperature range TEST CONDITIONS (1) PARAMETER VOH High-level output voltage (3) DOUT RL = 3 kΩ to GND MIN 5 VOL Low-level output voltage DOUT RL = 3 kΩ to GND ro Output resistance DOUT VS+ = VS– = 0, VO = ±2 V IOS (4) Short-circuit output current DOUT VCC = 5.5 V, VO = 0 IIS Short-circuit input current DIN VI = 0 (1) (2) (3) (4) TYP (2) MAX 7 –7 UNIT V –5 300 V Ω ±10 mA 200 µA Test conditions are C1 – C4 = 1 µF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 5 V and TA = 25°C. The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for logic voltage levels only. Not more than one output should be shorted at a time. 6.7 Electrical Characteristics: Receiver over recommended ranges of supply voltage and operating free-air temperature range TEST CONDITIONS (1) PARAMETER MIN TYP (2) VOH High-level output voltage ROUT IOH = –1 mA VOL Low-level output voltage ROUT IOL = 3.2 mA VIT+ Receiver positive-going input threshold voltage RIN VCC = 5 V TA = 25°C VIT– Receiver negative-going input threshold voltage RIN VCC = 5 V TA = 25°C Vhys Input hysteresis voltage RIN VCC = 5 V ri Receiver input resistance RIN VCC = 5 V (1) (2) MAX 3.5 TA = 25°C UNIT V 1.7 0.4 V 2.4 V 0.8 1.2 0.2 0.5 1 V V 3 5 7 kΩ TYP MAX UNIT 30 V/µs Test conditions are C1 – C4 = 1 µF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 5 V and TA = 25°C. 6.8 Switching Characteristics: Driver VCC = 5 V, TA = 25°C TEST CONDITIONS (1) PARAMETER SR SR(t) (1) Driver slew rate RL = 3 kΩ to 7 kΩ, See Figure 6 Driver transition region slew rate RL = 3 kΩ, CL = 2.5 nF See Figure 7 Data rate One DOUT switching MIN 3 V/µs 250 kbit/s Test conditions are C1 – C4 = 1 µF at VCC = 5 V ± 0.5 V. Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: MAX232E 5 MAX232E SLLS723C – APRIL 2006 – REVISED AUGUST 2016 www.ti.com 6.9 Switching Characteristics: Receiver VCC = 5 V, TA = 25°C (see Figure 5) TEST CONDITIONS (1) PARAMETER TYP UNIT tPLH(R) Receiver propagation delay time, low- to high-level output CL = 50 pF 500 ns tPHL(R) Receiver propagation delay time, high- to low-level output CL = 5 0pF 500 ns (1) Test conditions are C1 – C4 = 1 µF at VCC = 5 V ± 0.5 V. 6.10 Typical Characteristics 8 7 6 5 4 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 0.8 VOH VOL 0.6 ROUT Voltage (V) DOUT Voltage (V) TA = 25 °C 0.4 0.2 0 1 2 3 4 5 6 7 8 DOUT Load Resistance (k:) 9 10 0 1 2 3 D001 Figure 1. Driver Output Voltage vs Load Resistance 4 5 6 7 ROUT Current (mA) 8 10 D002 Figure 2. Receiver Low Output Voltage vs Load Current 12 6 DIN DOUT ROUT 10 5 8 6 4 Waveform (V) ROUT Voltage (V) 9 3 2 4 2 0 -2 -4 1 -6 0 -10 -8 0 1 2 3 4 5 6 7 ROUT Current (mA) 8 9 10 0 D003 Figure 3. Receiver High Output Voltage vs Load Current 6 Submit Documentation Feedback 5 10 Time (us) 15 20 D004 Figure 4. Loopback Waveforms Data Rate 120 kbit/s Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: MAX232E MAX232E www.ti.com SLLS723C – APRIL 2006 – REVISED AUGUST 2016 7 Parameter Measurement Information VCC RL = 1.3 kW Pulse Generator (see Note A) See Note C ROUT RIN CL = 50 pF (see Note B) TEST CIRCUIT ≤10 ns Input 10% ≤10 ns 90% 50% 90% 50% 3V 10% 0V 500 ns tPLH tPHL VOH Output 1.5 V 1.5 V VOL WAVEFORMS A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%. B. CL includes probe and jig capacitance. C. All diodes are 1N3064 or equivalent. Figure 5. Receiver Test Circuit and Waveforms for tPHL and tPLH Measurements Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: MAX232E 7 MAX232E SLLS723C – APRIL 2006 – REVISED AUGUST 2016 www.ti.com Parameter Measurement Information (continued) Pulse Generator (see Note A) DIN DOUT RS-232 Output CL = 10 pF (see Note B) RL TEST CIRCUIT ≤10 ns ≤10 ns 10% 3V 90% 50% 90% 50% Input 10% 0V 5 ms tPLH tPHL 90% Output VOH 90% 10% 10% VOL tTLH tTHL 0.8 (V SR –V ) 0.8 (V –V ) OH OL OL OH or t t TLH THL WAVEFORMS A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%. B. CL includes probe and jig capacitance. Figure 6. Driver Test Circuit and Waveforms for tPHL and tPLH Measurements (5-µs Input) Pulse Generator (see Note A) DIN DOUT RS-232 Output 3 kW CL = 2.5 nF TEST CIRCUIT ≤10 ns ≤10 ns Input 90% 1.5 V 10% 90% 1.5 V 10% 20 ms tTLH tTHL Output 3V 3V −3 V −3 V SR VOH VOL 6V tTHL or t TLH WAVEFORMS A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%. Figure 7. Test Circuit and Waveforms for tTHL and tTLH Measurements (20-µs Input) 8 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: MAX232E MAX232E www.ti.com SLLS723C – APRIL 2006 – REVISED AUGUST 2016 8 Detailed Description 8.1 Overview The MAX232E device is a dual driver and receiver that includes a capacitive voltage generator using four capacitors to supply TIA/EIA-232-F voltage levels from a single 5-V supply. All RS-232 pins have 15-kV HBM and IEC61000-4-2 Air-Gap discharge protection. RS-232 pins also have 8-kV IEC61000-4-2 contact discharge protection. Each receiver converts TIA/EIA-232-F inputs to 5-V TTL/CMOS levels. These receivers have shorted and open fail safe. The receiver can accept up to ±30-V inputs and decode inputs as low as ±3 V. Each driver converts TTL/CMOS input levels into TIA/EIA-232-F levels. Outputs are protected against shorts to ground. 8.2 Functional Block Diagram POWER 5V DIN 2 2 TX 250 kb/s ROUT 2 RX DOUT RS-232 IEC61000-4-2 2 RIN RS-232 Copyright © 2016, Texas Instruments Incorporated Figure 8. Logic Diagram (Positive Logic) 8.3 Feature Description 8.3.1 Power The power block increases and inverts the 5-V supply for the RS-232 driver using a charge pump that requires four 1-µF external capacitors. 8.3.2 RS-232 Driver Two drivers interface standard logic level to RS-232 levels. Internal pullup resistors on DIN inputs ensures a high input when the line is high impedance. 8.3.3 RS-232 Receiver Two receivers interface RS-232 levels to standard logic levels. An open or shorted to ground input results in a high output on ROUT. Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: MAX232E 9 MAX232E SLLS723C – APRIL 2006 – REVISED AUGUST 2016 www.ti.com 8.4 Device Functional Modes 8.4.1 VCC Powered by 5 V The device is in normal operation. 8.4.2 VCC Unpowered When MAX232E is unpowered, it can be safely connected to an active remote RS-232 device. 8.4.3 Truth Tables Table 1 and Table 2 list the functions of this device. Table 1. Function Table for Each Driver (1) (1) INPUT DIN OUTPUT DOUT L H H L H = high level, L = low level Table 2. Function Table for Each Receiver (1) (1) INPUT RIN OUTPUT ROUT L H H L Open H H = high level, L = low level, Open = input disconnected or connected driver off 11 14 DIN1 DOUT1 10 7 DIN2 DOUT2 12 13 ROUT1 RIN1 9 8 ROUT2 RIN2 Figure 9. Logic Diagram (Positive Logic) 10 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: MAX232E MAX232E www.ti.com SLLS723C – APRIL 2006 – REVISED AUGUST 2016 9 Applications and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information For proper operation add capacitors as shown in Figure 10. Pins 9 through 12 connect to UART or general purpose logic lines. RS-232 lines on pins 7, 8, 13, and 14 connect to a connector or cable. 9.2 Typical Application 5V CBYPASS = 1 mF + − 16 1 C1 C1+ 1 mF 3 1 mF 5 From CMOS or TTL To CMOS or TTL 8.5 V VS+ VS− C2+ 1 mF 2 C1− 4 C2 C3† VCC 6 −8.5 V C4 + C2− 11 14 10 7 12 13 9 8 0V 1 mF RS-232 Output RS-232 Output RS-232 Input RS-232 Input 15 GND † C3 can be connected to VCC or GND. Copyright © 2016, Texas Instruments Incorporated Resistor values shown are nominal. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be connected as shown. Figure 10. Typical Operating Circuit 9.2.1 Design Requirements • • VCC minimum is 4.5 V and maximum is 5.5 V. Maximum recommended bit rate is 250 kbit/s. 9.2.2 Detailed Design Procedure The capacitor type used for C1–C4 is not critical for proper operation. The MAX232E requires 1-µF capacitors, although capacitors up to 10 µF can be used without harm. Ceramic dielectrics are suggested for capacitors. When using the minimum recommended capacitor values, make sure the capacitance value does not degrade excessively as the operating temperature varies. If in doubt, use capacitors with a larger (for example, 2×) nominal value. The capacitors' effective series resistance (ESR), which usually rises at low temperatures, influences the amount of ripple on V+ and V–. Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: MAX232E 11 MAX232E SLLS723C – APRIL 2006 – REVISED AUGUST 2016 www.ti.com Typical Application (continued) Use larger capacitors (up to 10 µF) to reduce the output impedance at VS+ and VS–. Bypass VCC to ground with at least 1 µF. In applications sensitive to power-supply noise generated by the charge pumps, decouple VCC to ground with a capacitor the same size as (or larger than) the charge-pump capacitors (C1–C4). 9.2.3 Application Curve Loopback waveform connects DOUT to RIN. 12 DIN DOUT ROUT 10 8 Waveform (V) 6 4 2 0 -2 -4 -6 -8 -10 0 5 10 Time (us) 15 20 D005 Date Rate = 120 kbit/s, CL = 1 nF Figure 11. Loopback Waveforms 12 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: MAX232E MAX232E www.ti.com SLLS723C – APRIL 2006 – REVISED AUGUST 2016 10 Power Supply Recommendations The VCC voltage should be connected to the same power source used for logic device connected to DIN and ROUT pins. VCC should be between 4.5 V and 5.5 V. 11 Layout 11.1 Layout Guidelines Keep the external capacitor traces short. This is more important on C1 and C2 nodes that have the fastest rise and fall times. Make the impedance from MAX232E ground pin and circuit board's ground plane as low as possible for best ESD performance. Use wide metal and multiple vias on both sides of ground pin. 11.2 Layout Example Ground C3 1 C1+ VCC 16 VCC PF C1 2 V+ GND 15 3 C1- DOUT1 14 4 C2+ RIN1 13 5 C2- ROUT1 12 Ground C2 Ground 6 V- DIN1 11 7 DOUT2 DIN2 10 C4 8 RIN2 ROUT2 9 Figure 12. MAX232E Layout Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: MAX232E 13 MAX232E SLLS723C – APRIL 2006 – REVISED AUGUST 2016 www.ti.com 12 Device and Documentation Support 12.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.3 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.4 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 14 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated Product Folder Links: MAX232E PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) MAX232ECD ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM 0 to 70 MAX232EC MAX232ECDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM 0 to 70 MAX232EC MAX232ECDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM 0 to 70 MAX232EC MAX232ECDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) NIPDAU | SN Level-1-260C-UNLIM 0 to 70 MAX232EC MAX232ECDWRE4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM 0 to 70 MAX232EC MAX232ECDWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM 0 to 70 MAX232EC MAX232ECN ACTIVE PDIP N 16 25 Pb-Free (RoHS) NIPDAU N / A for Pkg Type 0 to 70 MAX232ECN MAX232ECNE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) NIPDAU N / A for Pkg Type 0 to 70 MAX232ECN MAX232ECPW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM 0 to 70 MA232EC MAX232ECPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) NIPDAU | SN Level-1-260C-UNLIM 0 to 70 MA232EC MAX232ECPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM 0 to 70 MA232EC MAX232EID ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 MAX232EI MAX232EIDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 MAX232EI MAX232EIDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 MAX232EI MAX232EIDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 MAX232EI MAX232EIDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 MAX232EI MAX232EIDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 MAX232EI Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) MAX232EIN ACTIVE PDIP N 16 25 Pb-Free (RoHS) NIPDAU N / A for Pkg Type -40 to 85 MAX232EIN MAX232EINE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) NIPDAU N / A for Pkg Type -40 to 85 MAX232EIN MAX232EIPW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 MB232EI MAX232EIPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM -40 to 85 MB232EI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of