MAX3221EIPWG4

MAX3221E SLLS686C – OCTOBER 2005 – REVISED JULY 2021 MAX3221E 3-V to 5.5-V Single-Channel RS-232 Line Driver/Receiver With ±15-kV IEC ESD Protection 1 Features 3 Description • The MAX3221E is a single driver, single receiver RS-232 solution operating from a single VCC supply. The RS-232 pins provide IEC 61000-4-2 ESD protection. The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. These devices operate at data signaling rates up to 250 kbit/s and a maximum of 30-V/µs driver output slew rate. • • • • • • • • ESD protection for RS-232 pins – ±15-kV Human-body model (HBM) – ±8 kV (IEC 61000-4-2, Contact discharge) – ±15 kV (IEC 61000-4-2, Air-gap discharge) Meets or exceeds the requirements of TIA/ EIA-232-F and ITU v.28 standards Operates with 3-V to 5.5-V VCC upply Operates up to 250 kbit/s One driver and one receiver Low standby current: 1 µA typical Accepts 5-V logic input with 3.3-V supply Auto-power-down feature automatically disables drivers for power savings Alternative high-speed device (1 Mbit/s) – SN75C3221E and SN65C3221E Flexible control options for power management are available. Auto-power down disables driver and charge pump when the receiver is disconnected or the remote driver is power down. The drivers can be manually enabled or disabled. INVALID output goes low when receiver input is unconnected or power off. 2 Applications • • • • • • • • • Industrial PCs Wired networking Data center and enterprise computing Battery-powered systems PDAs Notebooks Laptops Palmtop PCs Hand-held equipment Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) MAX3221ECDB, MAX3221EIDB SSOP (16) 6.20 mm × 5.30 mm MAX3221ECPW, MAX3221EIPW TSSOP (16) 5.00 mm × 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. spacer 3.3V, 5V POWER AUTOPOWERDOWN FORCEON FORCEOFF RX Enable EN DIN 1 1 TX 250 kb/s ROUT INVALID 1 RX DOUT RS-232 IEC 61000-4-2 1 RIN RS-232 STATUS Copyright © 2016, Texas Instruments Incorporated Block Diagram An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3 6 Specifications.................................................................. 4 6.1 Absolute Maximum Ratings........................................ 4 6.2 ESD Ratings............................................................... 4 6.3 ESD Ratings - IEC Specifications............................... 4 6.4 Recommended Operating Conditions.........................5 6.5 Thermal Information....................................................5 6.6 Electrical Characteristics.............................................5 6.7 Electrical Characteristics: Driver................................. 6 6.8 Electrical Characteristics: Receiver............................ 6 6.9 Electrical Characteristics: Auto-Power Down..............6 6.10 Switching Characteristics: Driver.............................. 7 6.11 Switching Characteristics: Receiver..........................7 6.12 Switching Characteristics: Auto-Power Down...........7 6.13 Typical Characteristics.............................................. 8 7 Parameter Measurement Information............................ 9 8 Detailed Description......................................................12 8.1 Overview................................................................... 12 8.2 Functional Block Diagram......................................... 12 8.3 Feature Description...................................................12 8.4 Device Functional Modes..........................................13 9 Application and Implementation.................................. 14 9.1 Application Information............................................. 14 9.2 Typical Application.................................................... 14 10 Power Supply Recommendations..............................17 11 Layout........................................................................... 17 11.1 Layout Guidelines................................................... 17 11.2 Layout Example...................................................... 17 12 Device and Documentation Support..........................18 12.1 Receiving Notification of Documentation Updates..18 12.2 Support Resources................................................. 18 12.3 Trademarks............................................................. 18 12.4 Electrostatic Discharge Caution..............................18 12.5 Glossary..................................................................18 13 Mechanical, Packaging, and Orderable Information.................................................................... 18 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (March 2016) to Revision C (July 2021) Page • Changed the Applications list............................................................................................................................. 1 • Added ESD ratings IEC Specifications table and added a table note for the minimum requirement to meet the IEC ESD level..................................................................................................................................................... 4 • Changed values in the Thermal Information table for DB and PW packages.....................................................5 Changes from Revision A (May 2006) to Revision B (March 2016) Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .................. 1 • Deleted Ordering Information table; see the POA at the end of the data sheet ................................................ 1 • Changed RθJA thermal values: 82 to 92 for DB package and 108 to 100.3 for PW Package.............................5 2 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 5 Pin Configuration and Functions C1+ 1 2 16 15 FORCEOFF VCC V+ 3 14 GND C1– 4 13 DOUT C2+ 5 12 FORCEON C2– 6 11 DIN V– 7 10 INVALID RIN 8 9 EN ROUT Not to scale Figure 5-1. DB or PW Package, 16-Pin SSOP or TSSOP, Top View Table 5-1. Pin Functions PIN NAME NO. I/O DESCRIPTION C1+ 2 C2+ 5 C1– 4 C2– 6 DIN 11 I Driver input DOUT 13 O RS-232 driver output EN 1 I Low input enables receiver ROUT output. High input sets ROUT to high impedance. FORCEOFF 16 I Automatic power-down control input FORCEON 12 I Automatic power-down control input GND 14 — Ground INVALID 10 O Invalid output pin. Output low when RIN input is unpowered. RIN 8 I RS-232 receiver input ROUT 9 O Receiver output VCC 15 — 3-V to 5.5-V supply voltage V+ 3 O 5.5-V supply generated by the charge pump V– 7 O –5.5-V supply generated by the charge pump — Positive terminals of the voltage-doubler charge pump capacitors — Negative terminals of the voltage-doubler charge pump capacitors Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E 3 MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) Supply voltage(2) VCC voltage(2) V+ Positive output supply V– Negative output supply voltage(2) V+ – V– Supply voltage Input voltage VO Output voltage TJ Operating virtual junction temperature Tstg Storage temperature (2) MAX UNIT 6 V –0.3 7 V 0.3 –7 V 13 V difference(2) VI (1) MIN –0.3 DIN, FORCEOFF, FORCEON, EN –0.3 6 RIN –25 25 DOUT –13.2 13.2 ROUT, INVALID –0.3 VCC + 0.3 –65 V V 150 °C 150 °C Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime. All voltages are with respect to network GND. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) Charged-device model (CDM), per JEDEC specification JESD22-C101(2) Pins 8 and 11 ±15000 All other pins ±2000 All pins ±1500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 ESD Ratings - IEC Specifications VALUE V (ESD) (1) 4 Electrostatic discharge IEC 61000-4-2 Contact Discharge, DOUT and RIN (1) IEC 61000-4-2 Air-Gap Discharge, DOUT and RIN (1) UNIT ±8000 Pins 8 and 11 V ±15000 A minimum of 1-µF capacitor is required between VCC and GND to meet the specified IEC-ESD level. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 6.4 Recommended Operating Conditions See Figure 9-1 (1) VCC = 3.3 V Supply voltage VCC = 5 V VIH Driver and control high-level input voltage DIN, FORCEOFF, FORCEON, EN VIL Driver and control low-level input voltage DIN, FORCEOFF, FORCEON, EN VI Driver and control input voltage DIN, FORCEOFF, FORCEON VI Receiver input voltage TA (1) Operating free-air temperature VCC = 3.3 V VCC = 5 V MIN NOM MAX 3 3.3 3.6 4.5 5 5.5 2 MAX3221EI V V 2.4 MAX3221EC UNIT 0.8 V 0 5.5 V –25 25 V 0 70 –40 85 °C Test conditions are C1–C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2–C4 = 0.33 µF at VCC = 5 V ± 0.5 V. 6.5 Thermal Information MAX3221E THERMAL METRIC(1) DB (SSOP) PW (TSSOP) 16 PINS 16 PINS UNIT RθJA Junction-to-ambient thermal resistance 105.8 110.9 °C/W RθJC(top) Junction-to-case (top) thermal resistance 51.9 41.7 °C/W RθJB Junction-to-board thermal resistance 57.6 57.2 °C/W ψJT Junction-to-top characterization parameter 14.1 4.2 °C/W ψJB Junction-to-board characterization parameter 56.8 56.6 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.6 Electrical Characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(2) PARAMETER II Input leakage current Supply current Powered off Auto-power down enabled (1) (2) MAX ±0.01 ±1 µA 0.3 1 mA No load, FORCEOFF at GND 1 10 No load, FORCEOFF at VCC, FORCEON at GND, All RIN are open or grounded 1 10 FORCEOFF, FORCEON, EN MIN No load, FORCEOFF and FORCEON at VCC Auto-power down disabled ICC TYP(1) TEST CONDITIONS VCC = 3.3 V or 5 V, TA = 25°C UNIT µA All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Test conditions are C1–C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2–C4 = 0.33 µF at VCC = 5 V ± 0.5 V. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E 5 MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 6.7 Electrical Characteristics: Driver over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(3) PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT VOH High-level output voltage DOUT at RL = 3 kΩ to GND, DIN = GND 5 5.4 V VOL Low-level output voltage DOUT at RL = 3 kΩ to GND, DIN = VCC –5 –5.4 V IIH High-level input current VI = VCC ±0.01 ±1 µA IIL Low-level input current VI = GND ±0.01 ±1 µA IOS Short-circuit output current(2) VCC = 3.6 V, VO = 0 V ±35 ±60 VCC = 5.5 V, VO = 0 V ±35 ±60 ro Output resistance VCC, V+, and V– = 0 V, VO = ±2 V Ioff (1) (2) (3) Output leakage current FORCEOFF = GND 300 10M mA Ω VO = ±12 V, VCC = 3 V to 3.6 V ±25 VO = ±10 V, VCC = 4.5 V to 5.5 V ±25 µA All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Short-circuit durations should be controlled to prevent exceeding the device absolute power-dissipation ratings, and not more than one output should be shorted at a time. Test conditions are C1–C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2–C4 = 0.33 µF at VCC = 5 V ± 0.5 V. 6.8 Electrical Characteristics: Receiver over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(2) PARAMETER VOH High-level output voltage IOH = –1 mA VOL Low-level output voltage IOL = 1.6 mA TYP(1) VCC – 0.6 VCC – 0.1 MAX 0.4 1.6 2.4 VCC = 5 V 1.9 2.4 Positive-going input threshold voltage VIT– Negative-going input threshold voltage Vhys Input hysteresis (VIT+ – VIT–) Ioff Output leakage current EN = VCC ri Input resistance VI = ±3 V to ±25 V VCC = 3.3 V 0.6 1.1 VCC = 5 V 0.8 1.4 UNIT V VCC = 3.3 V VIT+ (1) (2) MIN TEST CONDITIONS V V V 0.5 V ±0.05 ±10 µA 5 7 kΩ 3 All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Test conditions are C1–C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2–C4 = 0.33 µF at VCC = 5 V ± 0.5 V. 6.9 Electrical Characteristics: Auto-Power Down over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER 6 TEST CONDITIONS MIN VT+(valid) Receiver input threshold for INVALID high-level output voltage FORCEON = GND, FORCEOFF = VCC VT–(valid) Receiver input threshold for INVALID high-level output voltage FORCEON = GND, FORCEOFF = VCC –2.7 VT(invalid) Receiver input threshold for I NVALID low-level output voltage FORCEON = GND, FORCEOFF = VCC –0.3 VOH INVALID high-level output voltage IOH = –1 mA, FORCEON = GND, FORCEOFF = VCC VOL INVALID low-level output voltage IOL = 1.6 mA, FORCEON = GND, FORCEOFF = VCC Submit Document Feedback MAX 2.7 UNIT V V 0.3 VCC – 0.6 V V 0.4 V Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 6.10 Switching Characteristics: Driver over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(3) PARAMETER TEST CONDITIONS Maximum data rate CL = 1000 pF, RL = 3 kΩ, tsk(p) Pulse skew(2) CL = 150 pF to 2500 pF, RL = 3 kΩ to 7 kΩ, SR(tr) Slew rate, transition region (see Figure 7-1) VCC = 3.3 V, RL = 3 kΩ to 7 kΩ (1) (2) (3) MIN TYP(1) 150 250 kbit/s 100 ns See Figure 7-2 MAX CL = 150 pF to 1000 pF 6 30 CL = 150 pF to 2500 pF 4 30 UNIT V/µs All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Pulse skew is defined as |tPLH – tPHL| of each channel of the same device. Test conditions are C1–C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2–C4 = 0.33 µF at VCC = 5 V ± 0.5 V. 6.11 Switching Characteristics: Receiver over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(3) PARAMETER TYP(1) TEST CONDITIONS UNIT tPLH Propagation delay time, low- to high-level output CL = 150 pF, See Figure 7-3 150 ns tPHL Propagation delay time, high- to low-level output CL = 150 pF, See Figure 7-3 150 ns ten Output enable time CL = 150 pF, RL = 3 kΩ, See Figure 7-4 200 ns tdis Output disable time CL = 150 pF, RL = 3 kΩ, See Figure 7-4 200 ns 50 ns tsk(p) (1) (2) (3) Pulse skew(2) See Figure 7-3 All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Pulse skew is defined as |tPLH – tPHL| of each channel of the same device. Test conditions are C1–C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2–C4 = 0.33 µF at VCC = 5 V ± 0.5 V. 6.12 Switching Characteristics: Auto-Power Down over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER tvalid Propagation delay time, low- to high-level output tinvalid Propagation delay time, high- to low-level output ten Supply enable time (1) TYP(1) UNIT 1 µs 30 µs 100 µs All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E 7 MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 6.13 Typical Characteristics 1.2 3.5 1 3 ROUT Voltage (V) ROUT Voltage (V) TA = 25° C; VCC = 3.3V 0.8 0.6 0.4 0.2 2.5 2 1.5 1 0.5 0 0 0 1 2 3 4 5 6 7 ROUT Current (mA) 8 9 0 10 6 0 5 -1 DOUT Voltage (V) DOUT Voltage (V) 2 3 4 5 6 7 ROUT Current (mA) 8 9 10 D002 Figure 6-2. Receiver VOH vs Load Current Figure 6-1. Receiver VOL vs Load Current 4 3 2 1 -2 -3 -4 -5 0 -6 0 3 6 9 12 15 18 21 DOUT Current (mA) 24 27 30 0 3 D003 Figure 6-3. Driver VOH vs Load Current 8 1 D001 6 9 12 15 18 21 DOUT Current (mA) 24 27 30 D004 Figure 6-4. Driver VOL vs Load Current Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 7 Parameter Measurement Information 3V Generator (see Note B) RS-232 Output 50 Ω RL TEST CIRCUIT 0V tTHL CL (see Note A) 3V FORCEOFF A. B. Input tTLH 3V 3V Output −3 V −3 V 6V SR(tr) = t THL or t TLH VOH VOL VOLTAGE WAVEFORMS CL includes probe and jig capacitance. The pulse generator has the following characteristics: PRR = 250 kbps, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 7-1. Driver Slew Rate 3V Generator (see Note B) RS-232 Output 50 Ω RL Input 0V CL (see Note A) tPHL tPLH VOH 3V FORCEOFF 50% 50% Output VOL TEST CIRCUIT A. B. 1.5 V 1.5 V VOLTAGE WAVEFORMS CL includes probe and jig capacitance. The pulse generator has the following characteristics: PRR = 250 kbps, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 7-2. Driver Pulse Skew 3 V or 0 V FORCEON 3V Input 1.5 V 1.5 V −3 V Output Generator (see Note B) 50 Ω 3V FORCEOFF tPHL CL (see Note A) tPLH VOH 50% Output 50% VOL TEST CIRCUIT A. B. VOLTAGE WAVEFORMS CL includes probe and jig capacitance. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 7-3. Receiver Propagation Delay Times Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E 9 MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 3V Input 3 V or 0 V FORCEON VCC S1 1.5 V GND 0V tPZH (S1 at GND) tPHZ (S1 at GND) RL 3 V or 0 V 1.5 V VOH Output 50% Output CL (see Note A) EN Generator (see Note B) 50 Ω 0.3 V tPZL (S1 at VCC) tPLZ (S1 at VCC) 0.3 V Output 50% VOL TEST CIRCUIT A. B. C. D. VOLTAGE WAVEFORMS CL includes probe and jig capacitance. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. tPLZ and tPHZ are the same as tdis. tPZL and tPZH are the same as ten. Figure 7-4. Receiver Enable and Disable Times 10 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 2.7 V 2.7 V 0V Receiver Input ROUT Generator (see Note B) 3V 0V −2.7 V −2.7 V −3 V 50 Ω tvalid tinvalid VCC Autopowerdown INVALID CL = 30 pF (see Note A) FORCEOFF FORCEON DIN DOUT INVALID Output 50% VCC 50% VCC 0V ten V+ ≈V+ Supply Voltages 0.3 V VCC 0V 0.3 V V− TEST CIRCUIT ≈V− VOLTAGE WAVEFORMS Valid RS-232 Level, INVALID High 2.7 V Indeterminate 0.3 V 0V If Signal Remains Within This Region For More Than 30 µs, INVALID Is Low† −0.3 V Indeterminate −2.7 V Valid RS-232 Level, INVALID High † Auto-powerdown disables drivers and reduces supply current to 1 µA. Figure 7-5. INVALID Propagation Delay Times and Driver Enabling Time Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E 11 MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 8 Detailed Description 8.1 Overview The MAX3221E is a single driver, single receiver RS-232 solution operating from a single VCC supply. The RS-232 pins provide IEC 61000-4-2 ESD protection. The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. These devices operate at data signaling rates up to 250 kbit/s and a maximum of 30-V/µs driver output slew rate. Flexible control options for power management are available when the serial port is inactive. The auto-powerdown feature functions when FORCEON is low and FORCEOFF is high. During this mode of operation, if the device does not sense a valid RS-232 signal on the receiver input, the driver output is disabled. If FORCEOFF is set low and EN is high, both the driver and receiver are shut off, and the supply current is reduced to 1 µA. Disconnecting the serial port or turning off the peripheral drivers causes the auto-power-down condition to occur. Auto-power down can be disabled when FORCEON and FORCEOFF are high. With auto-power down enabled, the device is activated automatically when a valid signal is applied to the receiver input. The INVALID output notifies the user if an RS-232 signal is present at the receiver input. INVALID is high (valid data) if the receiver input voltage is greater than 2.7 V or less than –2.7 V, or has been between –0.3 V and 0.3 V for less than 30 µs. INVALID is low (invalid data) if the receiver input voltage is between –0.3 V and 0.3 V for more than 30 µs. See Figure 7-1 for receiver input levels. 8.2 Functional Block Diagram 3.3V, 5V POWER AUTOPOWERDOWN FORCEON FORCEOFF RX Enable EN DIN 1 1 TX 250 kb/s ROUT INVALID 1 RX DOUT RS-232 IEC 61000-4-2 1 RIN RS-232 STATUS Copyright © 2016, Texas Instruments Incorporated Figure 8-1. Logic Diagram (Positive Logic) 8.3 Feature Description 8.3.1 Power The power block increases, inverts, and regulates voltage at V+ and V- pins using a charge pump that requires four external capacitors. Auto-power-down feature for driver is controlled by FORCEON and FORCEOFF inputs. Receiver is controlled by EN input. When MAX3221E is unpowered, it can be safely connected to an active remote RS-232 device. 8.3.2 RS-232 Driver One driver interfaces standard logic levels to RS-232 levels. DIN input must be valid high or low. 12 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 8.3.3 RS-232 Receiver One receiver interfaces RS-232 levels to standard logic levels. An open input results in a high output on ROUT. RIN input includes an internal standard RS-232 load. A logic high input on the EN pin shuts down the receiver output. 8.3.4 RS-232 Status The INVALID output goes low when RIN input is unpowered for more than 30 µs. The INVALID output goes high when receiver has a valid input. The INVALID output is active when Vcc is powered irregardless of FORCEON and FORCEOFF inputs (see Table 8-3). 8.4 Device Functional Modes Table 8-1, Table 8-2, and Table 8-3 show the behavior of the driver, receiver, and INVALID features under all possible relevant combinations of inputs. Table 8-1. Function Tables Each Driver(1) INPUTS (1) OUTPUT DOUT DRIVER STATUS X Z Powered off Normal operation with auto-power down disabled DIN FORCEON FORCEOFF VALID RIN RS-232 LEVEL X X L L H H X H H H H X L L L H Yes H H L H Yes L L L H No Z H L H No Z Normal operation with auto-power down enabled Powered off by auto-power down feature H = high level, L = low level, X = irrelevant, Z = high impedance Table 8-2. Each Receiver(1) INPUTS (1) OUTPUT ROUT RIN EN VALID RIN RS-232 LEVEL L L X H L X L X H X Z Open L No H H H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = disconnected input or connected driver off Table 8-3. INVALID (1) INPUTS OUTPUT RIN (1) FORCEON FORCEOFF EN INVALID L X X X H H X X X H Open X X X L H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E 13 MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 9 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 9.1 Application Information The MAX3221E line driver and receiver is a specialized device for 3-V to 5.5-V RS-232 communication applications. This application is a generic implementation of this device with all required external components. For proper operation, add capacitors as shown in Figure 9-1. 9.2 Typical Application ROUT and DIN connect to UART or general purpose logic lines. FORCEON and FORCEOFF may be connected general purpose logic lines or tied to ground or VCC. INVALID may be connected to a general purpose logic line or left unconnected. RIN and DOUT lines connect to a RS-232 connector or cable. DIN, FORCEON, and FORCEOFF inputs must not be left unconnected. 14 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 EN 1 16 2 V CC C1+ 15 + 3 C1 + + − − V+ AutoPowerdown C3 (1) 4 GND − 14 13 12 C2 6 C2− 7 11 FORCEON DIN V− 10 C4 + RIN DOUT C2+ + − C BYPASS = 0.1 mF C1− 5 − FORCEOFF 8 9 INVALID ROUT 5 kW (1) C3 can be connected to VCC or GND. NOTES: A. Resistor values shown are nominal. B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be connected as shown. V CC vs CAPACITOR VALUES V CC C1 C2, C3, and C4 3.3 V ± 0.3 V 5 V ± 0.5 V 3 V to 5.5 V 0.1 mF 0.047 mF 0.1 mF 0.1 mF 0.33 mF 0.47 mF Copyright © 2016, Texas Instruments Incorporated Figure 9-1. Typical Operating Circuit and Capacitor Values 9.2.1 Design Requirements • • • Recommended VCC is 3.3 V or 5 V. – 3 V to 5.5 V is also possible Maximum recommended bit rate is 250 kbps. Use capacitors as shown in Figure 9-1. 9.2.2 Detailed Design Procedure • • DIN, FORCEOFF and FORCEON inputs must be connected to valid low or high logic levels. Select capacitor values based on VCC level for best performance. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E 15 MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 9.2.3 Application Curves 8 8 DIN DOUT ROUT 4 2 0 -2 -4 4 2 0 -2 -4 -6 -6 0 1 2 3 4 5 6 Time (us) 7 8 9 10 0 1 D005 Figure 9-2. Loopback Waveforms VCC = 3.3 V, Data Rate 250 kbit/s 16 DIN DOUT ROUT 6 Waveform Voltage (V) Waveform Voltage (V) 6 2 3 4 5 6 Time (us) 7 8 9 10 D006 Figure 9-3. Loopback Waveforms with 1-nF load VCC = 3.3 V, Data Rate 250 kbit/s Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 10 Power Supply Recommendations TI recommends a 0.1-µF capacitor to filter noise on the power supply pin. For additional filter capability, a 0.01-μF capacitor may be added in parallel as well. Power supply input voltage is recommended to be any valid level in Section 6.4. 11 Layout 11.1 Layout Guidelines Keep the external capacitor traces short. This is more important on C1 and C2 nodes that have the fastest rise and fall times. Make the impedance from MAX3221E ground pin and circuit board's ground plane as low as possible for best ESD performance. Use wide metal and multiple vias on both sides of ground pin. 11.2 Layout Example 1 EN FORCEOFF 16 Ground C3 2 C1+ VCC 15 VCC PF C1 3 V+ GND 14 4 C1- DOUT 13 5 C2+ FORCEON 12 6 C2- DIN 11 Ground C2 7 V- Ground INVALID 10 C4 8 RIN ROUT 9 Figure 11-1. MAX3221E Layout Example Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E 17 MAX3221E www.ti.com SLLS686C – OCTOBER 2005 – REVISED JULY 2021 12 Device and Documentation Support 12.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.2 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 12.3 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 12.4 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.5 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 18 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: MAX3221E PACKAGE OPTION ADDENDUM www.ti.com 29-Jul-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) MAX3221ECDBR ACTIVE SSOP DB 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MP221EC Samples MAX3221ECDBRG4 ACTIVE SSOP DB 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MP221EC Samples MAX3221ECPWR ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 MP221EC Samples MAX3221EIDBR ACTIVE SSOP DB 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 MP221EI Samples MAX3221EIDBRG4 ACTIVE SSOP DB 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 MP221EI Samples MAX3221EIPWR ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 MP221EI Samples MAX3221EIPWRG4 ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 MP221EI Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of