MC33063AQDRQ1

Sample & Buy Product Folder Support & Community Tools & Software Technical Documents MC33063A-Q1 SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 MC33063A-Q1 1.5-A Peak Boost, Buck, Inverting Switching Regulator 1 Features 3 Description • The MC33063A-Q1 device is an easy-to-use IC containing all the primary circuitry needed for building simple DC-DC converters. The device primarily consists of an internal temperature-compensated reference, a comparator, an oscillator, a PWM controller with active current limiting, a driver, and a high-current output switch. Thus, the device requires minimal external components to build converters in the boost, buck, and inverting topologies. 1 • • • • • • • AEC-Q100 Qualified With the Following Results: – Device HBM ESD Classification Level 2 – Device CDM ESD Classification Level C4B Wide Input Voltage Range: 3 V to 40 V High Output Switch Current: Up to 1.5 A Adjustable Output Voltage Oscillator Frequency: Up to 100 kHz Precision Internal Reference: 2% Short-Circuit Current Limiting Low Standby Current The MC33063A-Q1 device is characterized for operation from –40°C to 125°C. Device Information(1) PART NUMBER 2 Applications Automotive: Topologies Buck, Boost, and MC33063A-Q1 Inverting PACKAGE SOIC (8) BODY SIZE (NOM) 4.90 mm × 3.91 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Simplified Schematic Drive Collector 8 1 Switch Collector 2 Switch Emitter 3 Timing Capacitor Q2 S Q Q1 R 100 W Ipk Sense 7 Ipk Oscillator CT 6 VCC + − Comparator Inverting Input 5 1.25-V Reference Regulator 4 GND 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. MC33063A-Q1 SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 4 4 4 4 5 5 5 5 6 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Oscillator Characteristics .......................................... Output Switch Characteristics................................... Comparator Characteristics ...................................... Total Device Characteristics ..................................... Typical Characteristics .............................................. Detailed Description .............................................. 7 7.1 7.2 7.3 7.4 8 Overview ................................................................... Functional Block Diagram ......................................... Feature Description................................................... Device Functional Modes.......................................... 7 7 7 9 Application and Implementation ........................ 10 8.1 Application Information .......................................... 10 8.2 Typical Applications ............................................... 10 9 Power Supply Recommendations...................... 18 10 Layout................................................................... 19 10.1 Layout Guidelines ................................................. 19 10.2 Layout Example .................................................... 19 11 Device and Documentation Support ................. 22 11.1 Trademarks ........................................................... 22 11.2 Electrostatic Discharge Caution ............................ 22 11.3 Glossary ................................................................ 22 12 Mechanical, Packaging, and Orderable Information ........................................................... 22 4 Revision History Changes from Revision B (September 2008) to Revision C • 2 Page Added the ESD Ratings table, Feature Description section, Device Functional Modes section, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ............................................................... 1 Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 MC33063A-Q1 www.ti.com SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 5 Pin Configuration and Functions D Package 8-Pin SOIC Top View Switch Collector 1 8 Driver Collector Switch Emitter 2 7 Ipk Timing Capacitor 3 6 VCC GND 4 5 Comparator Inverting Input Pin Functions PIN NO. NAME I/O DESCRIPTION 1 Switch Collector — Switch Collector 2 Switch Emitter — Switch Emitter 3 Timing Capacitor — Timing Capacitor 4 GND — Ground 5 Comparator Inverting Input I Comparator Inverting Input 6 VCC I Supply 7 IPK I Peak Current 8 Driver Collector — Driver Collector Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 3 MC33063A-Q1 SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT 40 V 40 V 40 V 40 V Switch Collector to Switch Emitter voltage, VCE(switch) 40 V Driver Collector voltage, VC(driver) 40 V Driver Collector current, IC(driver) 100 mA Supply voltage, VCC Comparator Inverting Input voltage range, VIR –0.3 Switch Collector voltage, VC(switch) Switch Emitter voltage, VE(switch) VPIN1 = 40 V Switch current, ISW 1.5 A Operating virtual junction temperature, TJ 150 °C 150 °C Storage temperature, Tstg (1) –65 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 6.2 ESD Ratings VALUE Human body model (HBM), per AEC Q100-002 (1) V(ESD) (1) Electrostatic discharge Charged device model (CDM), per AEC Q100-011 UNIT ±2000 Corner pins (1, 4, 5, and 8) ±750 Other pins ±500 V AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 6.3 Recommended Operating Conditions VCC Supply voltage TA Operating free-air temperature MIN NOM MAX 3 40 UNIT V –40 125 °C 6.4 Thermal Information MC33063A-Q1 THERMAL METRIC (1) D UNIT 8 PINS RθJA Junction-to-ambient thermal resistance (2) (3) 121.9 RθJC(top) Junction-to-case (top) thermal resistance 68.1 RθJB Junction-to-board thermal resistance 62.3 ψJT Junction-to-top characterization parameter 19.9 ψJB Junction-to-board characterization parameter 61.8 RθJC(bot) Junction-to-case (bottom) thermal resistance N/A (1) (2) (3) 4 °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Maximum power dissipation is a function of TJ(max), RθJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA) / RθJA. Operating at the absolute maximum TJ of 150°C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 MC33063A-Q1 www.ti.com SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 6.5 Oscillator Characteristics VCC = 5 V, TA = full operating range (unless otherwise noted) (see block diagram) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT fosc Oscillator frequency VPIN5 = 0 V, CT = 1 nF 25°C 24 33 42 kHz Ichg Charge current VCC = 5 V to 40 V 25°C 24 35 42 μA Idischg Discharge current VCC = 5 V to 40 V 25°C 140 220 260 μA Idischg/Ichg Discharge-to-charge current ratio VPIN7 = VCC 25°C 5.2 6.5 7.5 VIpk Current-limit sense voltage Idischg = Ichg 25°C 250 300 350 mV MIN TYP MAX UNIT 6.6 Output Switch Characteristics (1) VCC = 5 V, TA = full operating range (unless otherwise noted). See the Functional Block Diagram. PARAMETER TEST CONDITIONS TA VCE(sat) Saturation voltage – Darlington connection ISW = 1 A, pins 1 and 8 connected Full range 1 1.3 V VCE(sat) Saturation voltage – non-Darlington connection (2) ISW = 1 A, RPIN8 = 82 Ω to VCC, Forced β ~ 20 Full range 0.45 0.7 V hFE DC current gain ISW = 1 A, VCE = 5 V IC(off) Collector off-state current VCE = 40 V 100 μA (1) (2) 25°C 50 Full range 75 0.01 Low duty-cycle pulse testing is used to maintain junction temperature as close to ambient temperature as possible. In the non-Darlington configuration, if the output switch is driven into hard saturation at low switch currents (≤300 mA) and high driver currents (≥30 mA), it may take up to 2 μs for the switch to come out of saturation. This condition effectively shortens the off time at frequencies ≥30 kHz, becoming magnified as temperature increases. The following output drive condition is recommended in the nonDarlington configuration: Forced β of output switch = IC,SW / (IC,driver – 7 mA) ≥ 10, where ∼7 mA is required by the 100-Ω resistor in the emitter of the driver to forward bias the Vbe of the switch. 6.7 Comparator Characteristics VCC = 5 V, TA = full operating range (unless otherwise noted). See the Functional Block Diagram. PARAMETER TEST CONDITIONS TA MIN TYP MAX 25°C 1.225 1.25 1.275 Full range 1.21 UNIT Vth Threshold voltage ΔVth Threshold-voltage line regulation VCC = 5 V to 40 V Full range 1.4 5 mV IIB Input bias current VIN = 0 V Full range –20 –400 nA MIN MAX UNIT 1.29 V 6.8 Total Device Characteristics VCC = 5 V, TA = full operating range (unless otherwise noted). See the Functional Block Diagram. PARAMETER ICC Supply current TEST CONDITIONS VCC = 5 V to 40 V, CT = 1 nF, VPIN7 = VCC, VPIN5 > Vth, VPIN2 = GND, All other pins open TA Full range 4 Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 mA 5 MC33063A-Q1 SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 www.ti.com 6.9 Typical Characteristics 100 1.8 VCC = 5 V Pin 7 = VCC Pin 5 = GND TA = 25°C VCE(SAT), Output Switch Saturation Voltage (V) tON-OFF, Output Switch On-Off Time (µs) 1000 tON tOFF 10 1 0.01 1.6 1.5 1.4 1.3 1.2 1.1 1.0 1 0 0.0 0.1 1 CT, Oscillator Timing Capacitor (nF) 1.4 0.2 10 0.4 0.6 380 340 VIPK, Current Limit Sense Voltage (mV) 1.0 Force Beta = 20 0.8 0.6 0.0 0 0 0.0 VCC = 5 V Pin 7 = VCC Pin 2, 3, 5 = GND TA = 25°C 0.2 1 0.4 0.6 0.8 1.0 1.2 IC, Collector Current (A) 1.4 1.2 1.4 1.6 VCC = 5 V ICHG = IDISCHG 360 1.2 0.2 1 1.0 Figure 2. Output Switch Saturation Voltage vs Emitter Current (Emitter-Follower Configuration) Darlington Connection 0.4 0.8 IE, Emitter Current (A) Figure 1. Output Switch On-Off Time vs Oscillator Timing Capacitor VCE(SAT), Output Switch Saturation Voltage (V) VCC = 5 V Pin 1, 7, 8 = VCC Pin 3, 5 = GND TA = 25°C 1.7 1.6 Figure 3. Output Switch Saturation Voltage vs Collector Current (Common-Emitter Configuration) 320 300 280 260 240 220 200 −50 −25 0 25 50 75 100 TA, Ambient Temperature (°C) 125 Figure 4. Current-Limit Sense Voltage vs Temperature ICC, Supply Current (mA) 3.6 3.2 2.8 2.4 2.0 1.6 CT = 1 nF Pin 7 = VCC Pin 2 = GND TA = 25°C 1.2 0.8 0.4 0.0 0 5 10 15 20 25 30 VCC, Supply Voltage (V) 35 40 Figure 5. Standby Supply Current vs Supply Voltage 6 Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 MC33063A-Q1 www.ti.com SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 7 Detailed Description 7.1 Overview The MC33063A-Q1 device primarily consists of an internal temperature-compensated reference, a comparator, an oscillator, a PWM controller with active current limiting, a driver, and a high-current output switch. The MC33063A-Q1 device requires minimal external components to build converters in the boost, buck, and inverting topologies. 7.2 Functional Block Diagram Drive Collector 8 1 Switch Collector 2 Switch Emitter 3 Timing Capacitor Q2 S Q Q1 R 100 W Ipk Sense 7 Ipk Oscillator CT 6 VCC + − Comparator Inverting Input 1.25-V Reference Regulator 4 5 GND 7.3 Feature Description The device includes the following components: • Temperature-compensated reference voltage • Oscillator • Active peak-current limit • Output switch • Output voltage-sense comparator 7.3.1 Reference Voltage The reference voltage is set at 1.25 V and is used to set the output voltage of the converter. Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 7 MC33063A-Q1 SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 www.ti.com Feature Description (continued) Comparator Inverting Input Output R2 R1 Vout = 1.25(R2/R1 + 1) Figure 6. Reference Voltage Circuit 7.3.2 Current Limit Current limit is accomplished by monitoring the voltage drop across an external sense resistor located in series with VCC and the output switch. The voltage drop developed across the sense resistor is monitored by the current-sense pin, Ipk. When the voltage drop across the sense resistor becomes greater than the preset value of 330 mV, the current-limit circuitry provides an additional current path to charge the timing capacitor (CT) rapidly, to reach the upper oscillator threshold and, thus, limiting the amount of energy stored in the inductor. The minimum sense resistor is 0.2 W. Figure 7 shows the timing capacitor charge current versus current-limit sense voltage. To set the peak current, Ipk = 330 mV/Rsense. Ichg – Charging Current – mA 30 TA = 25°C 10 VCC = 40 V VCC = 5 V 3 1 0.3 Ichg = Idischg 0.1 0.03 0 0.2 0.4 0.6 0.8 VCLS – Current-Limit Sense Voltage – V 1 Figure 7. Timing Capacitor Charge Current vs Current-Limit Sense Voltage 7.3.3 Current Limit of Typical Operation Waveforms The output switch is an NPN Darlington transistor. The collector of the output transistor is tied to pin 1, and the emitter is tied to pin 2. This allows the designer to use the MC33063 device in buck, boost, or inverter configurations. The maximum collector-emitter saturation voltage at 1.5 A (peak) is 1.3 V, and the maximum peak current of the output switch is 1.5 A. For higher peak output current, an external transistor can be used. Figure 8 shows the typical operation waveforms. 8 Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 MC33063A-Q1 www.ti.com SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 Feature Description (continued) Comparator Output 1 0 Timing Capacitor, CT On Output Switch Off Nominal Output Voltage Output Voltage Startup Quiescent Operation Figure 8. Typical Operation Waveforms 7.4 Device Functional Modes The oscillator is composed of a current source and a current sink that charge and discharge the external timing capacitor (CT) between an upper and lower preset threshold. The typical charge current is 35 mA, and the typical discharge current is 200 mA, yielding approximately a 6:1 ratio. Thus, the ramp-up period is six times longer than that of the ramp-down period (see Figure 9). The upper threshold is 1.25 V, which is same as the internal reference voltage, and the lower threshold is 0.75 V. The oscillator runs constantly, at a pace controlled by the value of CT. V Upper Threshold (1.25 V Typical) Lower Threshold (0.75 V Typical) Time t 6t Discharge Charge Figure 9. Oscillator Voltage Thresholds Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 9 MC33063A-Q1 SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The MC33063A-Q1 device requires minimal external components to build converters in the boost, buck, and inverting topologies. 8.2 Typical Applications 8.2.1 Step-Up Converter 170 mH L 1 8 180 W S Q Q2 2 7 Ipk RSC 0.22 W VIN 12 V 3 CT 6 1N5819 Q1 R VCC + + _ Comparator 100 mF 1.25-V Reference Regulator CT 1500 pF 4 5 1.0 mH R2 R1 2.2 kW 47 kW CO 330 mF + VOUT 28 V/175 mA VOUT 100 mF 1.25 (1 R2) R1 + Optional Filter Figure 10. Step-Up Converter 10 Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 MC33063A-Q1 www.ti.com SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 Typical Applications (continued) R* 8 1 7 8 VOUT 7 2 VOUT 2 RSC RSC 6 VIN 1 6 VIN *R a) EXTERNAL npn SWITCH 0 for constant Vin b) EXTERNAL pnp SATURATED SWITCH (see Note A) Figure 11. External Switches 8.2.1.1 Design Requirements Table 1. Step-Up Converter TEST CONDITIONS RESULTS Line regulation VIN = 8 V to 16 V, IO = 175 mA 30 mV ± 0.05% Load regulation VIN = 12 V, IO = 75 mA to 175 mA 10 mV ± 0.017% Output ripple VIN = 12 V, IO = 175 mA 400 mVPP Efficiency VIN = 12 V, IO = 175 mA 87.7% Output ripple with optional filter VIN = 12 V, IO = 175 mA 40 mVPP 8.2.1.2 Detailed Design Procedure CALCULATION ton/toff STEP UP Vout VF + Vin(min) STEP DOWN Vin(min) Vout Vin(min) Vsat – – 1 f (ton + toff) ton + (ton ton ton toff – (ton toff 4 × 10 – 5 ton CT 2Iout(max) Ipk(switch) (tt (( Vin(min) – on + off Vsat) Ipk(switch) Vout + VF Vin – Vsat Vout – ) 1 f toff + + ton + t on + t off 1 toff) – (ton toff 4 × 10 – 5 ton ) (( Vin(min) – Vsat Ipk(switch) – 1 toff) + 2Iout(max) 0.3 Ipk(switch) t on(max) toff – toff 4 × 10 – 5 ton 2Iout(max) 1 0.3 Ipk(switch) RSC + Vsat t on + t off 1 toff) + VOLTAGE INVERTING VF 1 f t on + t off toff L(min) – (tt on + off ) 1 0.3 Ipk(switch) ) Vout) t on(max) (( Vin(min) – Vsat) Ipk(switch) ) t on(max) Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 11 MC33063A-Q1 SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 CALCULATION STEP UP CO I ton 9 out Vripple(pp) www.ti.com STEP DOWN Ipk(switch)(t on + VOLTAGE INVERTING t off) 9 8Vripple(pp) I outton Vripple(pp) 8.2.1.3 Application Curve Voltage Across Switch Q1 VCE Vout + VF Diode D1 Voltage VKA Vout – Vsat Switch Q1 Current Vin Vsat 0 0 VF Ipk 0 Diode D1 Current Inductor Current Ipk Iout 0 Ipk Iin = IL(AVG) 0 Capacitor Cout Current Ipk – Iout ½(I pk – I out) Q+ 0 –Iout Capacitor Cout Ripple Voltage Vout + Vpk toff t1 Q– ton Vout Vripple(p-p) Figure 12. Boost Switching Regulator Waveforms 12 Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 MC33063A-Q1 www.ti.com SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 8.2.2 Step-Down Converter 1 8 S Q R Q2 Q1 2 7 1N5819 Ipk RSC 0.33 W Oscillator VIN 25 V 6 CT 3 VCC + + _ Comparator 100 mF L 220 mH CT 470 pF 1.25-V Reference Regulator 4 5 1.0 mH R2 R1 1.2 kW VOUT 5 V/500 mA 3.8 kW CO 470 mF VOUT + 100 mF 1.25 (1 R2) R1 + Optional Filter Figure 13. Step-Down Converter 1 1 8 8 7 VOUT RSC VIN 7 2 VOUT 2 RSC 6 VIN a) EXTERNAL npn SWITCH 6 b) EXTERNAL pnp SATURATED SWITCH Figure 14. External Current-Boost Connections for IC Peak Greater Than 1.5 A Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 13 MC33063A-Q1 SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 www.ti.com 8.2.2.1 Design Requirements Table 2. Step-Down Converter TEST CONDITIONS RESULTS Line regulation VIN = 15 V to 25 V, IO = 500 mA 12 mV ± 0.12% Load regulation VIN = 25 V, IO = 50 mA to 500 mA 3 mV ± 0.03% 120 mVPP Output ripple VIN = 25 V, IO = 500 mA Short-circuit current VIN = 25 V, RL = 0.1 Ω 1.1 A Efficiency VIN = 25 V, IO = 500 mA 83.7% Output ripple with optional filter VIN = 25 V, IO = 500 mA 40 mVPP 8.2.2.2 Detailed Design Procedure See Detailed Design Procedure. 8.2.2.3 Application Curves Vin + VF Vin Voltage Across Switch Q1 VCE Vsat 0 Vin Vin – Vsat Diode D1 Voltage VKA 0 VF Ipk Switch Q1 Current Iin = IC(AVG) 0 Ipk Diode D1 Current ID(AVG) 0 Inductor Current Ipk Iout = Ipk/2 = IC(AVG) + ID(AVG) 0 +Ipk/2 Capacitor Cout Current 0 Q+ ½I p/2 Q– –Ipk/2 ton/2 toff/2 Vout + Vpk Capacitor Cout Ripple Voltage Vout Vripple(p-p) Vout – Vpk t0 t1 t2 Figure 15. Buck Switching Regulator Waveforms 14 Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 MC33063A-Q1 www.ti.com SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 8.2.3 Voltage Inverter Converter 1 8 S Q R Q2 Q1 2 7 Oscillator 6 VIN 4.5 V to 6.0 V L 88 mH Ipk RSC 0.24 W CT 3 VCC + + _ Comparator 100 mF 1N5819 1.25-V Reference Regulator + 1500 pF 4 5 1.0 mH R1 R2 8.2 kW VOUT −12 V/100 mA 953 W CO 1000 mF VOUT 100 mF + 1.25 (1 R2) R1 + Optional Filter Figure 16. Voltage-Inverting Converter 1 1 8 8 7 VOUT RSC VIN 7 2 VOUT 2 RSC 6 VIN a) EXTERNAL npn SWITCH 6 b) EXTERNAL pnp SATURATED SWITCH Figure 17. External Current-Boost Connections for Voltage Inverter Converter Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 15 MC33063A-Q1 SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 www.ti.com 8.2.3.1 Design Requirements TEST CONDITIONS RESULTS Line regulation VIN = 4.5 V to 6 V, IO = 100 mA 3 mV ± 0.12% Load regulation VIN = 5 V, IO = 10 mA to 100 mA 0.022 V ± 0.09% Output ripple VIN = 5 V, IO = 100 mA 500 mVPP Short-circuit current VIN = 5 V, RL = 0.1 Ω 910 mA Efficiency VIN = 5 V, IO = 100 mA 62.2% Output ripple with optional filter VIN = 5 V, IO = 100 mA 70 mVPP 8.2.3.2 Detailed Design Procedure See Detailed Design Procedure. 8.2.3.3 Application Curves Voltage Across Switch Q1 VCE Vin Vin – Vsat 0 Vin – (–Vout + VF) Diode D1 Voltage VKA Switch Q1 Current Vin – Vsat 0 VF Ipk Iin = IC(AVG) 0 Diode D1 Current Ipk Iout 0 Inductor Current Ipk 0 Capacitor Cout Current Ipk – Iout ½(I pk – I out) Q+ 0 –Iout Capacitor Cout Ripple Voltage –Vout + Vpk toff t1 Q– ton Vripple(p-p) Vout –Vout – Vpk Figure 18. Inverter Switching Regulator Waveforms 16 Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 MC33063A-Q1 www.ti.com SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 8.2.4 12 V Battery Based Automotive Supply Figure 19. 12 V Battery Based Automotive Supply Schematic 8.2.4.1 Design Requirements Input Supply Voltage: 7 to 40 V Output Supply Voltage: 5 V at 0.25 A An additional supply rail of 3.3 at 0.2 A along with a power supply supervisor is required for this application. 8.2.4.2 Detailed Design Procedure See Detailed Design Procedure. Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 17 MC33063A-Q1 SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 www.ti.com 8.2.4.3 Application Curve Figure 20. Application Example 4 Efficiency 9 Power Supply Recommendations The input decoupling capacitors must be located as close as possible to the MC33063-Q1. In addition, the voltage set-point resistor divider components must also be kept close to the IC to eliminate any noise pick-up into the feedback loop. 18 Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 MC33063A-Q1 www.ti.com SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 10 Layout 10.1 Layout Guidelines Layout is a critical portion of good power supply design. There are several signals paths that conduct fast changing currents or voltages that can interact with stray inductance or parasitic capacitance to generate noise or degrade the power supplies performance. To help eliminate these problems, the input voltage pin should be bypassed to ground with a low ESR ceramic bypass capacitor with X5R or X7R dielectric. Care should be taken to minimize the loop area formed by the bypass capacitor connections, the input pin, and the anode of the catch diode. 10.2 Layout Example Supply Decoupling Capacitor Placed Nearby Switching components (D2, C2, C3, L1) Minimize this loop area to reduce ringing Feedback components away from the power path and close to the IC (to avoid noise coupling) Figure 21. MC33063A-Q1 Layout Top Layer Example Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 19 MC33063A-Q1 SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 www.ti.com Layout Example (continued) Figure 22. MC33063A-Q1 Layout Middle Layer Example 20 Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 MC33063A-Q1 www.ti.com SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 Layout Example (continued) Multiple vias connect the input and output to the ground plane Large ground plane to reduce noise and ground-loop errors Figure 23. MC33063A-Q1 Layout Bottom Layer Example Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 21 MC33063A-Q1 SLLS654C – APRIL 2005 – REVISED DECEMBER 2014 www.ti.com 11 Device and Documentation Support 11.1 Trademarks All trademarks are the property of their respective owners. 11.2 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.3 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 22 Submit Documentation Feedback Copyright © 2005–2014, Texas Instruments Incorporated Product Folder Links: MC33063A-Q1 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) MC33063AQDRQ1 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 33063AQ (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of