MPC104AU

® MP C10 4 MPC104 MP C10 4 Wide-Bandwidth 2 x 1 VIDEO MULTIPLEXER FEATURES q BANDWIDTH: 210MHz (1.4Vp-p) q LOW INTERCHANNEL CROSSTALK: –79dB (30MHz, SO); –77dB (30MHz, DIP) q LOW SWITCHING TRANSIENTS: +13mV/–4mV q LOW DIFFERENTIAL GAIN/PHASE ERRORS: 0.03%, 0.01° q LOW QUIESCENT CURRENT: One Channel Selected: ±4.6mA No Channel Selected: ±120µA The MPC104 consists of two identical monolithic, integrated, open-loop buffer amplifiers, which are connected internally at the output. The bipolar complementary buffers form a unidirectional transmission path and offer extremely high output-to-input isolation. The MPC104 multiplexer enables the user to connect one of two input signals to the output. The output of the multiplexer is in a high-impedance state when no channel is selected. When one channel is selected with a digital “1” at the corresponding SEL input, the component acts as a buffer with high input impedance and low output impedance. The wide bandwidth of over 210MHz at 1.4Vp-p signal level, high linearity and low distortion, and low input voltage noise of 5nV/√Hz make this crosspoint switch suitable for RF and video applications. All performance is specified with ±5V supply voltage, which reduces power consumption in comparison with ±15V designs. The multiplexer is available in a spacesaving 8-pin SO and DIP packages. Both are designed and specified for operation over the industrial temperature range (–40°C to +85°C.) APPLICATIONS q VIDEO ROUTING AND MULTIPLEXING (CROSSPOINTS) q RADAR SYSTEMS q DATA ACQUISITION q INFORMATION TERMINALS q SATELLITE OR RADIO LINK IF ROUTING DESCRIPTION The MPC104 is a wide-bandwidth, 2-to-1 channel video signal multiplexer, which can be used in a wide variety of applications. It was designed for wide-bandwidth systems, including high-definition television and broadcast equipment. Although it is primarily used to route video signals, the harmonic and dynamic attributes of the MPC104 also make it appropriate for other analog signal routing applications such as radar, communications, computer graphics, and data acquisition systems. IN1 +1 VOUT IN2 +1 SEL1 SEL2 TRUTH TABLE SEL1 0 1 0 SEL2 0 0 1 VOUT HI-Z IN1 IN2 International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © 1994 Burr-Brown Corporation PDS-1230C Printed in U.S.A. July, 1994 SPECIFICATIONS–DC CHARACTERISTICS At VCC = ±5VDC, RL = 10kΩ, RIN = 100Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted. MPC104AP, AU PARAMETER INPUT OFFSET VOLTAGE Initial vs Temperature vs Supply (Tracking) vs Supply (Non-tracking) vs Supply (Non-tracking) Initial Matching INPUT BIAS CURRENT Initial vs Temperature vs Supply (Tracking) vs Supply (Non-tracking) vs Supply (Non-tracking) INPUT IMPEDANCE Resistance Capacitance Capacitance INPUT NOISE Voltage Noise Density Signal-to-Noise Ratio INPUT VOLTAGE RANGE TRANSFER CHARACTERISTICS Voltage Gain RATED OUTPUT Voltage Resistance Resistance Capacitance CHANNEL SELECTION INPUTS Logic 1 Voltage Logic 0 Voltage Logic 1 Current Logic 0 Current SWITCHING CHARACTERISTICS SEL to Channel ON Time SEL to Channel OFF Time Switching Transient, Positive Switching Transient, Negative POWER SUPPLY Rated Voltage Derated Performance Quiescent Current Rejection Ratio CONDITIONS MIN TYP MAX ±30 UNITS VCC = ±4.5V to ±5.5V VCC = +4.5V to +5.5V VCC = –4.5V to –5.5V All Buffers –40 14 60 –80 –50 –50 3 5 20 ±710 0.26 1.7 0.88 1.0 1.0 5 96 ±3.6 0.982 0.992 ±2.97 12.5 900 1.2 mV µV/°C dB dB dB mV µA nA/°C nA/V µA/V µA/V MΩ pF pF nV/√Hz dB V V/V V/V V Ω MΩ pF ±10 VCC = ±4.5V to ±5.5V VCC = +4.5V to +5.5V VCC = –4.5V to –5.5V Channel On Channel On Channel Off fOUT = 20kHz to 10MHz S/N = 0.7/V N • √5MHz Gain Error ≤ 10% RL = 1kΩ, VIN = ±2V RL = 10kΩ, VIN = ±2.8V VIN = ±3V One Channel Selected No Channel Selected No Channel Selected 0.98 ±2.8 +2 VSEL = 5.0V VSEL = 0.8V VI = –0.3V to +0.7V, f = 5MHz 90% Point of VOUT = 1Vp-p 10% Point of VOUT = 1Vp-p (Measured While Switching Between Two Grounded Channels) 75 100 0.002 0.13 0.17 +13 –4 ±5 ±4.6 ±120 –80 VCC +0.6 +0.8 125 5 V V µA µA µs µs mV mV V V mA µA dB ±4.5 One Channel Selected, Over Temperature No Channel Selected, Over Temperature ±5.5 ±5.3 ±175 The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® MPC104 2 SPECIFICATIONS– AC CHARACTERISTICS At VCC = ±5VDC, RL = 10kΩ, RIN = 100Ω, RSOURCE = 50Ω, and TA = +25° C, unless otherwise noted. MPC104AP, AU PARAMETER LARGE SIGNAL BANDWIDTH (–3dB) CONDITIONS VOUT = 5.0Vp-p, COUT = 1pF VOUT = 2.8Vp-p, COUT = 1pF VOUT = 1.4Vp-p, COUT = 1pF VOUT = 0.2Vp-p, COUT = 1pF MIN TYP 55 101 210 590 550 f = 4.43MHz, VIN = 0.3Vp-p VDC = 0 to 0.7V f = 4.43MHz, VIN = 0.3Vp-p VDC = 0 to 0.7V VOUT = 0.2Vp-p, DC to 30MHz VOUT = 0.2Vp-p, DC to 100MHz f = 30MHz, VOUT = 1.4Vp-p –63 –65 VIN = 1.4Vp-p f = 5MHz, f = 30MHz, f = 5MHz, f = 30MHz, f = 5MHz, f = 30MHz, f = 5MHz, f = 30MHz VOUT = 1.4Vp-p, Step 10% to 90% COUT = 1pF, ROUT = 22Ω VOUT = 1.4Vp-p COUT = 1pF COUT = 22pF COUT = 47pF –90 –77 –93 –81 –95 –79 –93 –86 2.3 500 360 260 dBc dBc dB dB dB dB dB dB dB dB ns V/µs V/µs V/µs 0.03 0.01 0.05 0.07 MAX UNITS MHz MHz MHz MHz ps % Degrees dB dB SMALL SIGNAL BANDWIDTH GROUP DELAY TIME DIFFERENTIAL GAIN DIFFERENTIAL PHASE GAIN FLATNESS PEAKING HARMONIC DISTORTION Second Harmonic Third Harmonic CROSSTALK MPC104AP Channel-to-Channel Off Isolation MPC104AU Channel-to-Channel Off Isolation RISE/FALL TIME SLEW RATE ® 3 MPC104 CONNECTION DIAGRAM Top View DIP/SO-8 PIN DESCRIPTION PIN IN1 , IN2 DESCRIPTION Analog Input Channels Analog Input Shielding Grounds, Connect to System Ground Channel Selection Inputs Analog Output; tracks selected channel Negative Supply Voltage; typical –5VDC Positive Supply Voltage; typical +5VDC IN1 1 GND 2 +VCC 3 IN2 4 +1 8 7 6 SEL1 –VCC VOUT SEL2 GND SEL1, SEL2 VOUT –VCC +VCC +1 5 ABSOLUTE MAXIMUM RATINGS Power Supply Voltage (±VCC) ......................................................... ±6VDC Analog Input Voltage (IN1 through IN2) ................................... ±VCC, ±0.7V Operating Temperature ..................................................... –40° C to +85°C Storage Temperature ...................................................... –40°C to +125°C Output Current .................................................................................. ±6mA Junction Temperature .................................................................... +175°C Lead Temperature (soldering, 10s) ................................................ +300°C Digital Input Voltages (SEL1 through SEL2) .............. –0.5V to +VCC +0.7V ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION PACKAGE DRAWING NUMBER(1) 006 182 TEMPERATURE RANGE –40° C to +85°C –40° C to +85°C PRODUCT MPC104AP MPC104AU PACKAGE 8-Pin Plastic DIP SO-8 Surface Mount NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. ® MPC104 4 TYPICAL PERFORMANCE CURVES At VCC = ±5VDC, RL = 10kΩ, RIN = 100Ω, RSOURCE = 50Ω, and TA = +25° C, unless otherwise noted. INPUT OFFSET VOLTAGE vs TEMPERATURE 18 16 Input Offset Voltage (mV) Input Bias Current (µA) 7 6 5 4 3 2 1 0 INPUT BIAS CURRENT vs TEMPERATURE 14 12 10 8 6 4 2 0 –40 –20 0 20 40 60 80 100 –40 –20 0 20 40 60 80 100 Temperature (°C) Temperature (°C) INPUT IMPEDANCE vs FREQUENCY 1.0M 100 90 Output Impedance (Ω) OUTPUT IMPEDANCE vs FREQUENCY Input Impedance (Ω) 100k 80 70 60 50 40 30 20 10k 1k 100 10k 100k 1M 10M 100M 1G Frequency (Hz) 10 10k 100k 1M 10M 100M 1G Frequency (Hz) TOTAL POSITIVE QUIESCENT CURRENT vs TEMPERATURE 9 8 One Channel Selected 140 120 TOTAL POSITIVE QUIESCENT CURRENT vs TEMPERATURE Supply Current (mA) 7 Supply Current (µA) 6 5 4 3 2 1 0 –40 –20 0 20 40 60 80 100 Temperature (°C) 100 80 60 No Channel Selected 40 20 0 –40 –20 0 20 40 60 80 100 Temperature (°C) ® 5 MPC104 TYPICAL PERFORMANCE CURVES (CONT) At VCC = ±5VDC, RL = 10kΩ, RIN = 100Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted. TRANSFER FUNCTION 5 4 3 Output Voltage (V) GAIN ERROR vs INPUT VOLTAGE 50 40 Gain Error (%) 2 1 0 –1 –2 –3 –4 –5 –5 –4 –3 –2 –1 0 1 2 3 4 5 Input Voltage (V) –40°C 30 +25°C +85°C 10 20 0 –5 –4 –3 –2 –1 0 1 2 3 4 5 Input Voltage (V) INPUT VOLTAGE NOISE SPECTRAL DENSITY 100 SWITCHING ENVELOPE (Channel-to-Channel Switching) Voltage Noise (nV/ Hz) SEL +0.7V 10 VOUT 0V –0.3V 1 10 100 1k 10k 100k 1M 10M Frequency (Hz) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 Time (µs) SEL1 100Ω VIN 1 DB1 8 6 100Ω 4 DB2 5 SEL2 VOUT1 SWITCHING TRANSIENTS SWITCHING TRANSIENTS +5V 0V SEL +5V 0V 36MHz Low-Pass Filter Acc. Eureka Rec. EU95-PG03 in 36MHz Low Path Filter Signal Pass Acc. Eureka Rec. EU95-PG03 +5mV 0V VOUT SEL +20mV Wideband Measurement 0V –5mV 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 Time (µs) ® VOUT –5mV 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 Time (µs) MPC104 6 TYPICAL PERFORMANCE CURVES (CONT) At VCC = ±5VDC, RL = 10kΩ, RIN = 100Ω, RSOURCE = 50Ω, and TA = +25° C, unless otherwise noted. SMALL SIGNAL PULSE RESPONSE 150 100 150 100 Output Voltage (mV) SMALL SIGNAL PULSE RESPONSE Output Voltage (mV) 50 0 –50 –100 –150 0 20 40 60 80 100 Time (ns) VIN = 0.2Vp-p, COUT = 1pF tRISE = tFALL = 2ns (Generator) 50 0 –50 –100 –150 0 20 40 60 80 100 Time (ns) VIN = 0.2Vp-p, COUT = 47pF tRISE = tFALL = 2ns (Generator) LARGE SIGNAL PULSE RESPONSE 3 2 Output Voltage (V) LARGE SIGNAL PULSE RESPONSE 3 2 Output Voltage (V) 1 0 –1 –2 –3 0 20 40 60 80 100 Time (ns) VIN = 4Vp-p, COUT = 1pF tRISE = tFALL = 2ns (Generator) 1 0 –1 –2 –3 0 20 40 60 80 100 Time (ns) VIN = 4Vp-p, COUT = 47pF tRISE = tFALL = 2ns (Generator) GROUP DELAY TIME vs FREQUENCY 3 BANDWIDTH vs COUT WITH RECOMMENDED ROUT 5 0 2 Delay Time (ns) 1pF Output (dB) –5 –10 –15 COUT 1pF ROUT 0Ω f–3dB 571MHz 364MHz 279MHz 231MHz 188MHz 10M 10pF 22pF 33pF 47pF 1 100Ω DUT 22Ω 180Ω BUF601 10pF 27Ω 22pF 16Ω 33pF 12Ω 47pF 8Ω 0 VIN 50Ω 1pF VOUT –20 VIN = 1.4Vp-p –1 1M 10M Frequency (Hz) 100M 1G –25 1M 100M 1G Frequency (Hz) ® 7 MPC104 TYPICAL PERFORMANCE CURVES (CONT) At VCC = ±5VDC, RL = 10kΩ, RIN = 100Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted. GAIN FLATNESS 2 20 10 1 Output (dBm) Output (dB) BANDWIDTH vs OUTPUT VOLTAGE 5Vp-p 2.8Vp-p 1.4Vp-p VOUT = 0.2Vp-p 0 VOUT = 1.4Vp-p 0 –10 –20 –30 0.2Vp-p –1 –2 1M 10M Frequency (Hz) 100M 1G –40 1M 10M Frequency (Hz) 100M 1G BANDWIDTH vs RLOAD 20 RL = 10kΩ 0 Output (dB) BANDWIDTH MATCHING 10 RL = 500Ω Output (dB) 0 Ch1, Ch2 –10 –10 –20 –20 –30 VOUT = 1.4Vp-p, COUT = 22pF –40 1M 10M Frequency (Hz) 100M 1G –30 1M 10M Frequency (Hz) 100M 1G COUT = 22pF, VOUT = 2.8Vp-p 30MHz HARMONIC DISTORITION 0 ON/OFF CHARACTERISTIC Harmonic Distortion (dBc) SEL –20 HP8116A VIN = 1.4Vp-p 100Ω DUT 50Ω 10kΩ 180Ω BUF601AU 47Ω Advantest R3361A +5V 0 +0.7V –40 G VOUT –60 0V –0.7V –80 30M 60M Frequency (Hz) VOUT = 1.4Vp-p, RL = 10kΩ, COUT = 1pF 90M 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 Time (µs) SEL1 100Ω VIN 1 DB1 8 6 100Ω 4 DB2 5 VOUT SEL2 ® MPC104 8 APPLICATIONS INFORMATION The MPC104 operates from ±5V power supplies (±6V maximum). Do not attempt to operate with larger power supply voltages or permanent damage may occur. The buffer outputs are not current-limited or protected. If the output is shorted to ground, currents up to 18mA could flow. Momentary shorts to ground (a few seconds) should be avoided, but are unlikely to cause permanent damage. INPUT PROTECTION As shown below, all pins on the MPC104 are internally protected from ESD by a pair of back-to-back reverse-biased diodes to either power supply. These diodes will begin to conduct when the input voltage exceeds either power supply by about 0.7V. This situation can occur with loss of the amplifier’s power supplies while a signal source is still present. The diodes can typically withstand a continuous current of 30mA without destruction. To insure long term reliability, however, diode current should be externally limited to 10mA whenever possible. The internal protection diodes are designed to withstand 2.5kV (using Human Body Model) and will provide adequate ESD protection for most normal handling procedures. However, static damage can cause subtle changes in the characteristics of the buffer amplifier input without necessarily destroying the device. In precision buffer amplifiers, such damage may cause a noticeable degradation of offset voltage and drift. Therefore, static protection is strongly recommended when handling the MPC104. Static damage has been well-recognized as a problem for MOSFET devices, but any semiconductor device deserves protection from this potentially damaging source. The MPC104 incorporates on-chip ESD protection diodes as shown in Figure 1. Thus the user does not need to add external protection diodes, which can add capacitance and degrade AC performance. +VCC ESD Protection diodes internally connected to all pins. low at +13mV and –4mV. The MPC104 consists of two identical unity-gain buffer amplifiers, respectively connected together internally at the output. The open-loop buffer amps, which consist of complementary emitter followers, apply no feedback so their low-frequency gain is slightly less than unity and somewhat dependent on loading. Unlike devices using MOS bilateral switching elements, the bipolar complementary buffers form a unidirectional transmission path, thus providing high output-to-input isolation. Switching stages compatible to TTL-level digital signals are provided for each buffer to select the input channel. When no channel is selected, the outputs of the device are high-impedance and allow the user to wire several MPC104s together to create multichannel switch matrices. Chip select logic is not integrated. The selected design increases the flexibility of address decoding in complex distribution fields, eases BUS-controlled channel selection, simplifies channel selection monitoring for the user, and lowers transient peaks. All of these characteristics make the multiplexer, in effect, a quad switchable high-speed buffer. The buffers require DC coupling and termination resistors when driven directly from a low-impedance cable. Highcurrent output amplifiers are recommended when driving low-impedance transmission lines or inputs. An advanced complementary bipolar process, consisting of pn-junction isolated, high-frequency NPN and PNP transistors, provides wide bandwidth while maintaining low crosstalk and harmonic distortion. The single chip bandwidth of over 210MHz at an output voltage of 1.4Vp-p allows the design of multi-channel crosspoint or distribution fields in HDTV-quality with an overall system bandwidth of 36MHz, or in quality for high resolution graphic and imaging systems with 200MHz system bandwidth. The buffer amplifiers also offer low differential gain (0.03%) and phase (0.01°) errors. These parameters are essential for video applications and demonstrate how well the signal path maintains a constant small-signal gain and phase for the low-level color subcarrier at 4.43MHz (PAL) or 3.58MHz (NSTC) as the luminance signal is ramped through its specified range. The bipolar construction also ensures that the input impedance remains high and constant between ON and OFF states. The ON/OFF input capacitance ratio is near unity, and does not vary with power supply voltage variations. The low output capacitance of 1.2pF when no channel is selected is a very important parameter for large distribution fields. Each parallel output capacitance is an additional load and reduces the overall system bandwidth. Bipolar video crosspoint switches are virtually glitch-free when compared to signal switches using CMOS or DMOS devices. The MPC104 operates with a fast make-beforebreak switching action to keep the output switching transients small and short. Switching from one channel to another causes the signal to mix at the output for a short time, but it hardly interferes with the input signals. The transient peaks remain less than +13mV and –4mV. The generated output transients are extremely small, so DC clamping during switching between channels is unnecessary. DC clamping during the switching dead time is re® External Pin Internal Circuitry –VCC FIGURE 1. Internal ESD Protection. DISCUSSION OF PERFORMANCE The MPC104 is a 2 x 1, wide-band analog signal multiplexer. It allows the user to connect one of the two inputs (IN1/IN2 ) to the output. The switching speed between two input channels is typically less than 300ns. However, in contrast to signal switches using CMOS or DMOS transistors, the switching transients were kept very 9 MPC104 quired to avoid synchronization by large negative output glitches in subsequent equipment. The SEL-to-channel-ON time is typically 25ns and always shorter than the typical SEL-to-channel-OFF time of 250ns. In the worst case, an ON/OFF margin of 150ns ensures safe switching even for timing spreads in the digital control latches. The short interchannel switching time of 300ns allows channel change during the vertical blanking time, even in high-resolution graphic or broadcast systems. As shown in the typical performance curves, the signal envelope during transition from one channel to another rises and falls symmetrically and shows less overshooting and DC settling effects. Power consumption is a serious problem when designing large crosspoint fields with high component density. Most of the buffer amplifiers are in the off-state. One important design goal was to attain low off-state quiescent current when no channel is selected. The low supply current of ±120µA when no channel is selected and ±4.6mA when one channel is selected, as well as the reduced ±5V supply voltage, conserves power, simplifies the power supply design, and results in cooler, more reliable operation. CIRCUIT LAYOUT The high-frequency performance of the MPC104 can be greatly affected by the physical layout of the circuit. The following tips are offered as suggestions, not as absolutes. Oscillations, ringing, poor bandwidth and settling, higher crosstalk, and peaking are all typical problems which plague high-speed components when they are used incorrectly. • Bypass power supplies very close to the device pins. Use tantalum chip capacitors (approximately 2.2µF), a parallel 470pF ceramic chip capacitor may be added if desired. Surface-mount types are recommended due to their low lead inductance. • PC board traces for signal and power lines should be wide to reduce impedance or inductance. • Make short and low inductance traces. The entire physical circuit should be as small as possible. • Use a low-impedance ground plane on the component side to ensure that low-impedance ground is available throughout the layout. Grounded traces between the input traces are essential to achieve high interchannel crosstalk rejection. • Do not extend the ground plane under high-impedance nodes sensitive to stray capacitances, such as the buffer’s input terminals. • Sockets are not recommended, because they add significant inductance and parasitic capacitance. If sockets must be used, consider using zero-profile solderless sockets. • Use low-inductance and surface-mounted components. Circuits using all surface mount components with the MPC104 will offer the best AC-performance. • A resistor (100Ω to 150Ω) in series with the input of the buffers may help to reduce peaking. Place the resistor as close as possible to the pin. • Plug-in prototype boards and wire-wrap boards will not function well. A clean layout using RF techniques is essential—there are no shortcuts. SEL1 (8) IN1 (1) GND (2) +VCC = +5V DB1 (3) SEL2 (5) IN2 (4) VOUT DB2 (6) –VCC = –5V (7) FIGURE 2. Simplified Circuit Diagram. ® MPC104 10 RIN1 IN1 DB1 SEL1 50Ω VOUT RIN2 IN2 DB2 MPC104 SEL2 50Ω CHANNEL DB1 DB2 SEL1 1 0 SEL2 0 1 IN1 GND VIN IN2 VIN GND RIN1 200 Ω 100 Ω RIN2 100Ω 200Ω FIGURE 3. Crosstalk Test Circuit 1. 50Ω VIN1 100Ω IN1 50Ω DB1 SEL1 50Ω 50Ω 100Ω IN2 DB2 SEL2 MPC104 SEL1 SEL2 0 0 FIGURE 4. Off Isolation Test Circuit 2. –20 –20 Interchannel Crosstalk (dB) –60 MPC104AP –80 –100 –120 –140 400k MPC104AU Off Isolation Crosstalk (dB) –40 –40 –60 MPC104AP –80 –100 –120 –140 400k MPC104AU 1M 10M Frequency (Hz) 100M 1G 1M 10M Frequency (Hz) 100M 1G FIGURE 5. Interchannel Crosstalk. FIGURE 6. Off Isolation. ® 11 MPC104 50Ω RS = 50Ω RIN 100Ω DUT 50Ω ROUT 180Ω BUF601 RB 47Ω 50Ω DSO 12.5GHz RIN = 50Ω CH1 or CH2 MPC104 COUT Pulse Generator FIGURE 7. Test Circuit Pulse Response. Generator RS = 75Ω 4.43MHz 75Ω RIN 100Ω DUT 75Ω 150Ω + OPA623 – 290Ω 75Ω 75Ω Video Analyzer RIN = 75Ω CH1 or CH2 MPC104 ROUT 10kΩ 290Ω VDC FIGURE 8. Test Circuit Differential Gain and Phase. Generator RS = 50Ω 50Ω RIN 100Ω DUT 50Ω ROUT 180Ω BUF601 RB 47Ω 50Ω Spectrum Analyzer RIN = 50Ω CH1 or CH2 MPC104 COUT FIGURE 9. Test Circuit Frequency Response. MPC 104 8 4 SER In 2 D 3 Clock STR OE 5 5 MPC 104 8 6 5 7 MPC 104 8 5 MPC 104 8 5 MPC 104 8 4 2 3 5 5 MPC 104 8 6 5 7 MPC 104 8 5 MPC 104 8 5 MPC 104 8 4 5 5 MPC 104 8 6 5 7 MPC 104 8 5 MPC 104 8 5 14 13 12 11 SER 3 Out 14 13 12 11 2 SER 3 ••• Out 3 ••• ••• ••• 14 13 12 11 SER 3 Out Parallel Out HC4094 1 15 Parallel Out HC4094 1 15 Parallel Out HC4094 1 15 FIGURE 10. Serial Bus-Controlled Distribution Field. ® MPC104 12 SEL1 SEL2 +5V –5V 8 100Ω In1 50Ω 100Ω In2 50Ω 5 2.2µF + 10nF 2.2µF + 10nF 7 8 1 CH1 100Ω 6 3 2 4 5 RS 499Ω 12-Bit 10MHz A/D Converter OPA642 4 CH2 402Ω MPC104 3 2.2µF + Gain = 2V/V ADS804 7 2.2µF + 402Ω +5V –5V FIGURE 11. High-Speed Data Acquisition System. +VS(1) +VS 2.2µF + 3 C1 In1 +VS 6 C2 In2 +VS 2 100Ω RT 4 CH2 SEL2 +VS 2 100Ω 8 1 CH1 SEL1 C3 ROUT Out MPC104 7 5 NOTE: (1) +VS should be within +5V to +10V. FIGURE 12. Single Supply Operation. ® 13 MPC104 +5V –5V 2.2µF 2.2µF + SEL1 SEL2 16 150Ω 100Ω In1 75Ω 100Ω In2 75Ω MPC104 2.2µF + 2.2µF + Contrast 1 CH1 7 10 B C E 11 CR3425 (1) + +80V, 60mA 1 8 9 to CRT 6 4 CH2 1kΩ 150Ω 10nF 2 15 B C E OPA2662 10Ω 14 +5V –5V 220Ω 220Ω 20pF 100pF NOTE: (1) Philips Semiconductors. FIGURE 13. Input Multiplexer for a CRT Output Stage. ® MPC104 14 Channel CH1 - CH6 TTL-Select Lines +5V –5V 8 100Ω Red1 75Ω 100Ω Red2 75Ω MPC104 7 2.2µF + 3 2.2µF + 390Ω 5 2.2µF + 10nF CH1 150Ω 3 2 CH2 7 4 OPA623 390Ω 6 75Ω Red Out 2.2µF + 10nF 1 6 4 –5V +5V +5V –5V 8 100Ω Green1 75Ω 100Ω Green2 75Ω 7 2.2µF + 5 2.2µF + 10nF 2.2µF + 10nF 1 CH3 150Ω 6 3 2 7 4 OPA623 390Ω 6 75Ω Green Out 4 CH4 MPC104 3 2.2µF + 390Ω –5V +5V +5V –5V 8 100Ω Blue1 75Ω 100Ω Blue2 75Ω 5 2.2µF + 10nF 2.2µF + 10nF 1 CH5 150Ω 6 3 2 7 4 OPA623 390Ω 6 75Ω Blue Out 4 CH6 MPC104 7 2.2µF + 3 2.2µF + 390Ω –5V +5V FIGURE 14. Input Multiplexer for RGB Video Signals. ® 15 MPC104