OPA132

OPA 132 OPA 2132 OPA 4132 OPA 132 OPA 2132 OPA 4132 OPA132 OPA2132 OPA4132 SBOS054A – JANUARY 1995 – REVISED JUNE 2004 High-Speed FET-INPUT OPERATIONAL AMPLIFIERS FEATURES q FET INPUT: IB = 50pA max q WIDE BANDWIDTH: 8MHz q HIGH SLEW RATE: 20V/µs q LOW NOISE: 8nV/√Hz (1kHz) q LOW DISTORTION: 0.00008% q HIGH OPEN-LOOP GAIN: 130dB (600Ω load) q WIDE SUPPLY RANGE: ±2.5 to ±18V q LOW OFFSET VOLTAGE: 500µV max q SINGLE, DUAL, AND QUAD VERSIONS OPA2132 Offset Trim –In +In V– 1 2 3 4 8-Pin DIP, SO-8 8 7 6 5 Offset Trim V+ Output NC OPA132 DESCRIPTION The OPA132 series of FET-input op amps provides highspeed and excellent dc performance. The combination of high slew rate and wide bandwidth provide fast settling time. Single, dual, and quad versions have identical specifications for maximum design flexibility. High performance grades are available in the single and dual versions. All are ideal for general-purpose, audio, data acquisition and communications applications, especially where high source impedance is encountered. OPA132 op amps are easy to use and free from phase inversion and overload problems often found in common FET-input op amps. Input cascode circuitry provides excellent common-mode rejection and maintains low input bias current over its wide input voltage range. OPA132 series op amps are stable in unity gain and provide excellent dynamic behavior over a wide range of load conditions, including high load capacitance. Dual and quad versions feature completely independent circuitry for lowest crosstalk and freedom from interaction, even when overdriven or overloaded. Single and dual versions are available in 8-pin DIP and SO-8 surface-mount packages. Quad is available in 14-pin DIP and SO-14 surface-mount packages. All are specified for –40°C to +85°C operation. Out A –In A +In A V– 1 2 3 4 8-Pin DIP, SO-8 A B 8 7 6 5 V+ Out B –In B +In B OPA4132 Out A –In A +In A V+ +In B –In B Out B 1 2 A 3 4 5 B 6 7 14-Pin DIP SO-14 C 9 8 –In C Out C D 12 11 10 +In D V– +In C 14 13 Out D –In D Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1995-2004, Texas Instruments Incorporated www.ti.com ABSOLUTE MAXIMUM RATINGS Supply Voltage, V+ to V– .................................................................... 36V Input Voltage ..................................................... (V–) –0.7V to (V+) +0.7V Output Short-Circuit(1) .............................................................. Continuous Operating Temperature .................................................. –40°C to +125°C Storage Temperature ..................................................... –55°C to +125°C Junction Temperature ...................................................................... 150°C Lead Temperature (soldering, 10s) ................................................. 300°C NOTE: (1) Short-circuit to ground, one amplifier per package. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet. 2 OPA132, 2132, 4132 www.ti.com SBOS054A SPECIFICATIONS At TA = +25°C, VS = ±15V, unless otherwise noted. OPA132P, U OPA2132P, U PARAMETER OFFSET VOLTAGE Input Offset Voltage vs Temperature(1) vs Power Supply Channel Separation (dual and quad) INPUT BIAS CURRENT Input Bias Current(2) vs Temperature Input Offset Current(2) NOISE Input Voltage Noise Noise Density, f = 10Hz f = 100Hz f = 1kHz f = 10kHz Current Noise Density, f = 1kHz INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection INPUT IMPEDANCE Differential Common-Mode OPEN-LOOP GAIN Open-Loop Voltage Gain (V–)+2.5 96 CONDITION MIN TYP ±0.25 ±2 5 0.2 MAX ±0.5 ±10 15 MIN OPA132PA, UA OPA2132PA, UA OPA4132PA, UA TYP ±0.5 ✻ ✻ ✻ ✻ ✻ ✻ MAX ±2 ✻ 30 UNITS mV µV/°C µV/V µV/V pA pA Operating Temperature Range VS = ±2.5V to ±18V RL = 2kΩ VCM = 0V VCM = 0V +5 ±50 See Typical Curve ±2 ±50 ✻ ✻ 23 10 8 8 3 ±13 100 1013 || 2 1013 || 6 110 110 110 120 126 130 8 ±20 0.7 1 0.5 0.00008 0.00009 (V+)–1.2 (V–)+0.5 (V+)–1.5 (V–)+1.2 (V+)–2.5 (V–)+2.2 (V+)–0.9 (V–)+0.3 (V+)–1.2 (V–)+0.9 (V+)–2.0 (V–)+1.9 ±40 See Typical Curve ±15 ±4 ✻ ✻ ✻ ✻ ✻ ✻ 104 104 104 (V+)–2.5 ✻ 86 ✻ ✻ ✻ ✻ ✻ ✻ 94 ✻ ✻ ✻ 120 120 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ±18 ±4.8 +85 +125 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ nV/√Hz nV/√Hz nV/√Hz nV/√Hz fA/√Hz V dB Ω || pF Ω || pF dB dB dB MHz V/µs µs µs µs % % V V V V V V mA VCM = –12.5V to +12.5V VCM = –12.5V to +12.5V RL = 10kΩ, VO = –14.5V to +13.8V RL = 2kΩ, VO = –13.8V to +13.5V RL = 600Ω, VO = –12.8V to +12.5V FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate Settling Time: 0.1% 0.01% Overload Recovery Time Total Harmonic Distortion + Noise G = –1, 10V Step, CL = 100pF G = –1, 10V Step, CL = 100pF G = ±1 1kHz, G = 1, VO = 3.5Vrms RL = 2kΩ RL = 600Ω RL = 10kΩ RL = 2kΩ RL = 600Ω OUTPUT Voltage Output, Positive Negative Positive Negative Positive Negative Short-Circuit Current Capacitive Load Drive (Stable Operation) POWER SUPPLY Specified Operating Voltage Operating Voltage Range Quiescent Current (per amplifier) TEMPERATURE RANGE Operating Range Storage Thermal Resistance, θJA 8-Pin DIP SO-8 Surface-Mount 14-Pin DIP SO-14 Surface-Mount ✻ Specifications same as OPA132P, OPA132U. ±2.5 IO = 0 –40 –40 V V mA °C °C °C/W °C/W °C/W °C/W 100 150 80 110 NOTES: (1) Guaranteed by wafer test. (2) High-speed test at TJ = 25°C. OPA132, 2132, 4132 SBOS054A www.ti.com 3 TYPICAL PERFORMANCE CURVES At TA = +25°C, VS = ±15V, RL = 2kΩ, unless otherwise noted. OPEN-LOOP GAIN/PHASE vs FREQUENCY 160 140 0 POWER SUPPLY AND COMMON-MODE REJECTION vs FREQUENCY 120 100 –PSR 120 –45 Voltage Gain (dB) 80 60 40 20 0 –20 0.1 1 10 100 1k 10k 100k 1M G –90 Phase Shift (°) 100 PSR, CMR (dB) φ 80 60 40 20 +PSR CMR –135 –180 0 10M 10 100 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) INPUT VOLTAGE AND CURRENT NOISE SPECTRAL DENSITY vs FREQUENCY 1k CHANNEL SEPARATION vs FREQUENCY 160 RL = ∞ Channel Separation (dB) Voltage Noise (nV/√Hz) Current Noise (fA/√Hz) 140 100 Voltage Noise 10 120 Dual and quad devices. G = 1, all channels. Quad measured channel A to D or B to C—other combinations yield improved rejection. 100 1k Frequency (Hz) RL = 2kΩ 100 Current Noise 1 1 10 100 1k Frequency (Hz) 10k 100k 1M 80 10k 100k INPUT BIAS CURRENT vs TEMPERATURE 100k 10k High Speed Test Warmed Up Input Bias Current (pA) INPUT BIAS CURRENT vs INPUT COMMON-MODE VOLTAGE 10 9 8 7 6 5 4 3 2 1 0 High Speed Test Input Bias Current (pA) 1k 100 Dual 10 1 0.1 –75 –50 –25 0 25 50 75 100 125 Ambient Temperature (°C) Single Quad –15 –10 –5 0 5 10 15 Common-Mode Voltage (V) 4 OPA132, 2132, 4132 www.ti.com SBOS054A TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, VS = ±15V, RL = 2kΩ, unless otherwise noted. AOL, CMR, PSR vs TEMPERATURE 130 Quiescent Current Per Amp (mA) 4.3 QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT vs TEMPERATURE 60 AOL, CMR, PSR (dB) 120 Open-Loop Gain 4.1 ±ISC ±IQ 40 110 PSR 4.0 30 100 CMR 90 –75 –50 –25 0 25 50 75 100 125 Ambient Temperature (°C) 3.9 20 3.8 –75 –50 –25 0 25 50 75 100 125 Ambient Temperature (°C) 10 OFFSET VOLTAGE PRODUCTION DISTRIBUTION 12 10 Percent of Amplifiers (%) 8 6 4 2 0 0 200 400 600 800 1000 1200 –1400 –1200 –1000 –800 –600 –400 –200 1400 Typical production distribution of packaged units. Single, dual and quad units included. 12 10 Percent of Amplifiers (%) OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION Typical production distribution of packaged units. Single, dual and quad units included. 8 6 4 2 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 Offset Voltage (µV) Offset Voltage Drift (µV/°C) TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 0.01 RL 2kΩ 600Ω 0.001 G = +10 Output Voltage (Vp-p) THD+Noise (%) MAXIMUM OUTPUT VOLTAGE vs FREQUENCY 30 VS = ±15V Maximum output voltage without slew-rate induced distortion 20 0.0001 G = +1 VO = 3.5Vrms 0.00001 10 100 1k Frequency (Hz) 10k 100k 10 VS = ±5V VS = ±2.5V 10k 100k Frequency (Hz) 1M 10M 0 OPA132, 2132, 4132 SBOS054A www.ti.com 5 Short-Circuit Current (mA) 4.2 50 TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, VS = ±15V, RL = 2kΩ, unless otherwise noted. SMALL-SIGNAL STEP RESPONSE G = 1, CL = 100pF LARGE-SIGNAL STEP RESPONSE G = 1, CL = 100pF 50mV/div 5V/div 200ns/div 1µs/div SETTLING TIME vs CLOSED-LOOP GAIN 100 60 50 Settling Time (µs) SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE G = +1 G = –1 Overshoot (%) 10 0.01% 40 30 20 10 FPO 0.1% 1 0.1 ±1 ±10 ±100 ±1000 Closed-Loop Gain (V/V) G = ±10 0 100pF 1nF Load Capacitance 10nF OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 15 14 Output Voltage Swing (V) VIN = 15V –55°C 25°C 25°C 125°C 85°C 125°C 85°C 13 12 11 10 –10 –11 –12 –13 –14 –15 0 VIN = –15V 10 20 30 40 25°C –55°C 50 60 Output Current (mA) 6 OPA132, 2132, 4132 www.ti.com SBOS054A APPLICATIONS INFORMATION OPA132 series op amps are unity-gain stable and suitable for a wide range of general-purpose applications. Power supply pins should be bypassed with 10nF ceramic capacitors or larger. OPA132 op amps are free from unexpected output phasereversal common with FET op amps. Many FET-input op amps exhibit phase-reversal of the output when the input common-mode voltage range is exceeded. This can occur in voltage-follower circuits, causing serious problems in control loop applications. OPA132 series op amps are free from this undesirable behavior. All circuitry is completely independent in dual and quad versions, assuring normal behavior when one amplifier in a package is overdriven or short-circuited. OPERATING VOLTAGE OPA132 series op amps operate with power supplies from ±2.5V to ±18V with excellent performance. Although specifications are production tested with ±15V supplies, most behavior remains unchanged throughout the full operating voltage range. Parameters which vary significantly with operating voltage are shown in the typical performance curves. OFFSET VOLTAGE TRIM Offset voltage of OPA132 series amplifiers is laser trimmed and usually requires no user adjustment. The OPA132 (single op amp version) provides offset voltage trim connections on pins 1 and 8. Offset voltage can be adjusted by connecting a potentiometer as shown in Figure 1. This adjustment should be used only to null the offset of the op amp, not to adjust system offset or offset produced by the signal source. Nulling offset could degrade the offset voltage drift behavior of the op amp. While it is not possible to predict the exact change in drift, the effect is usually small. 10nF V+ Trim Range: ±4mV typ 100kΩ 7 2 3 10nF 1 8 OPA132 4 6 OPA132 single op amp only. Use offset adjust pins only to null offset voltage of op amp—see text. V– FIGURE 1. OPA132 Offset Voltage Trim Circuit. INPUT BIAS CURRENT The FET-inputs of the OPA132 series provide very low input bias current and cause negligible errors in most applications. For applications where low input bias current is crucial, junction temperature rise should be minimized. The input bias current of FET-input op amps increases with temperature as shown in the typical performance curve “Input Bias Current vs Temperature.” The OPA132 series may be operated at reduced power supply voltage to minimize power dissipation and temperature rise. Using ±3V supplies reduces power dissipation to one-fifth that at ±15V. The dual and quad versions have higher total power dissipation than the single, leading to higher junction temperature. Thus, a warmed-up quad will have higher input bias current than a warmed-up single. Furthermore, an SOIC will generally have higher junction temperature than a DIP at the same ambient temperature because of a larger θJA. Refer to the specifications table. Circuit board layout can also help minimize junction temperature rise. Temperature rise can be minimized by soldering the devices to the circuit board rather than using a socket. Wide copper traces will also help dissipate the heat by acting as an additional heat sink. Input stage cascode circuitry assures that the input bias current remains virtually unchanged throughout the full input common-mode range of the OPA132 series. See the typical performance curve “Input Bias Current vs CommonMode Voltage.” OPA132, 2132, 4132 SBOS054A www.ti.com 7 PACKAGE OPTION ADDENDUM www.ti.com 1-Jul-2004 PACKAGING INFORMATION ORDERABLE DEVICE OPA132P OPA132P1 OPA132PA OPA132PA2 OPA132U OPA132U/2K5 OPA132U1 OPA132UA OPA132UA/2K5 OPA132UA2 OPA2132P OPA2132PA OPA2132U OPA2132U/2K5 OPA2132UA OPA2132UA/2K5 OPA4132PA OPA4132UA OPA4132UA/2K5 STATUS(1) OBSOLETE OBSOLETE OBSOLETE OBSOLETE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE PACKAGE TYPE PDIP PDIP PDIP PDIP SOIC SOIC PDIP SOIC SOIC PDIP PDIP PDIP SOIC SOIC SOIC SOIC PDIP SOIC SOIC PACKAGE DRAWING P P P P D D P D D P P P D D D D N D D PINS 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 14 14 14 58 2500 50 50 100 2500 100 2500 100 2500 100 2500 PACKAGE QTY (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. MECHANICAL DATA MPDI001A – JANUARY 1995 – REVISED JUNE 1999 P (R-PDIP-T8) 0.400 (10,60) 0.355 (9,02) 8 5 PLASTIC DUAL-IN-LINE 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.015 (0,38) 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.010 (0,25) NOM Gage Plane 0.020 (0,51) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.010 (0,25) M 0.430 (10,92) MAX 4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. 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