OPA1655DBVR

OPA1655, OPA1656 SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 OPA165x Ultra-Low-Noise, Low-Distortion, FET-Input, Burr-Brown™ Audio Operational Amplifiers 1 Features 3 Description • The OPA1655 and OPA1656 (OPA165x) are BurrBrown™ op amps designed specifically for audio and industrial applications, where maintaining signal fidelity is crucial. The FET-input architecture achieves a low 2.9‑nV/√Hz voltage noise density and 6‑fA/√Hz current noise density, allowing for very-low noise performance in a wide variety of circuits. The high bandwidth and high open-loop-gain design of the OPA165x delivers a low distortion of 0.000035% (–129 dB) at 20 kHz, and improves audio signal fidelity across the full audio bandwidth. These devices also feature excellent output current drive capability, offering rail-to-rail output swing to within 250 mV of the power supplies with a 2‑kΩ load, and can deliver 100 mA of output current. • • • • • • • • • Ultra-low noise: – Voltage noise: 2.9 nV/√Hz at 10 kHz – Current noise: 6 fA/√Hz at 1 kHz Low distortion: – 0.000029% (–131 dB) at 1 kHz – 0.000035% (–129 dB) at 20 kHz High open-loop gain: 150 dB High output current: 100 mA Low input bias current: 10 pA Slew rate: 24 V/μs Gain bandwidth product: 53 MHz Rail-to-rail output Wide supply range: ±2.25 V to ±18 V or 4.5 V to 36 V Quiescent current: 3.9 mA per channel The OPA165x operate over a very wide supply range of ±2.25 V to ±18 V or (4.5 V to 36 V) on 3.9 mA of supply current to accommodate the power-supply constraints of many types of audio products. The temperature range is specified from –40°C to +125°C. 2 Applications • • • • • • • • • Professional microphones and wireless systems Professional audio mixer/control surface Guitar amplifier and other music instrument amplifier A/V receiver Bookshelf stereo system Professional audio amplifier DJ equipment Turntable Special function module Device Information PART NUMBER OPA1655 Single OPA1656 Dual (1) PACKAGE(1) D (SOIC, 8) DBV (SOT-23, 5) D (SOIC, (8) For all available packages, see the package option addendum at the end of the data sheet. 100 Bass – + – OPA165x + OPA165x Output Voltage Noise Density (nV/—Hz) Pad Input CHANNEL 10 Treble Active Baxandall Tone Control 1 10 100 1k 10k 100k Frequency (Hz) 1M 10M C020 Ultra-Low Input Voltage Noise An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3 6 Specifications.................................................................. 4 6.1 Absolute Maximum Ratings........................................ 4 6.2 ESD Ratings............................................................... 4 6.3 Recommended Operating Conditions.........................4 6.4 Thermal Information: OPA1655.................................. 5 6.5 Thermal Information: OPA1656.................................. 5 6.6 Electrical Characteristics.............................................6 6.7 Typical Characteristics................................................ 8 7 Detailed Description......................................................15 7.1 Overview................................................................... 15 7.2 Functional Block Diagram......................................... 15 7.3 Feature Description...................................................15 7.4 Device Functional Modes..........................................18 8 Application and Implementation.................................. 19 8.1 Application Information............................................. 19 8.2 Typical Applications.................................................. 20 8.3 Power Supply Recommendations.............................27 8.4 Layout....................................................................... 27 9 Device and Documentation Support............................29 9.1 Device Support......................................................... 29 9.2 Documentation Support............................................ 30 9.3 Receiving Notification of Documentation Updates....30 9.4 Support Resources................................................... 30 9.5 Trademarks............................................................... 30 9.6 Electrostatic Discharge Caution................................30 9.7 Glossary....................................................................30 10 Mechanical, Packaging, and Orderable Information.................................................................... 30 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (December 2021) to Revision C (September 2022) Page • Changed OPA1655 DBV (SOT-23, 5) package from preview to production data (active).................................. 1 Changes from Revision A (July 2019) to Revision B (December 2021) Page • Added OPA1655 production data (active) device and associated content......................................................... 1 Changes from Revision * (March 2019) to Revision A (July 2019) Page • Changed device status from advanced information (preview) to production data (active)................................. 1 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 5 Pin Configuration and Functions –IN 2 +IN 3 V– 4 8 NC – 7 V+ + 6 OUT 5 NC OUT 1 V± 2 +IN 3 5 V+ 4 ±IN ± 1 + NC Not to scale Figure 5-2. OPA1655 DBV (5-Pin SOT-23) Package, Top View Not to scale Figure 5-1. OPA1655 D (8-Pin SOIC) Package, Top View Pin Functions: OPA1655 PIN NO. NAME TYPE DESCRIPTION D (SOIC) DBV (SOT-23) –IN 2 4 Input Inverting input +IN 3 3 Input Noninverting input OUT 6 1 Output Output V– 4 2 Power Negative (lowest) power supply V+ 7 5 Power Positive (highest) power supply OUT A 1 8 V+ ±IN A 2 7 OUT B +IN A 3 6 ±IN B V± 4 5 +IN B Not to scale Figure 5-3. OPA1656 D (8-Pin SOIC) Package, Top View Pin Functions: OPA1656 PIN TYPE DESCRIPTION NAME NO. –IN A 2 Input Inverting input, channel A +IN A 3 Input Noninverting input, channel A –IN B 6 Input Inverting input, channel B +IN B 5 Input Noninverting input, channel B OUT A 1 Output Output, channel A OUT B 7 Output Output, channel B V– 4 Power Negative (lowest) power supply V+ 8 Power Positive (highest) power supply Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 3 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) MIN MAX 40 V (V–) – 0.5 (V+) + 0.5 V –10 10 mA 125 °C 150 °C 150 °C Supply voltage, VS = (V+) – (V–) Voltage Input Input (all pins except power-supply pins) Current Output short-circuit(2) Continuous Operating, TA Temperature –55 Junction, TJ Storage, Tstg (1) (2) UNIT –65 Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime. Short-circuit to VS / 2 (groundinsymmetrical dual-supply setups), one amplifier per package. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000 UNIT V JEDEC document JEP155 states that 500-V HBM allowssafemanufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allowssafemanufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN 4 VS Supply voltage TA Operating temperature Single supply Dual supply Submit Document Feedback NOM MAX 4.5 36 ±2.25 ±18 –40 125 UNIT V °C Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 6.4 Thermal Information: OPA1655 OPA1655 THERMAL METRIC(1) D (SOIC) DBV (SOT23) 8 PINS 5 PINS UNIT RθJA Junction-to-ambient thermal resistance 120.9 143.4 °C/W RθJC(top) Junction-to-case (top) thermal resistance 58.9 68.4 °C/W RθJB Junction-to-board thermal resistance 65.1 39.2 °C/W ψJT Junction-to-top characterization parameter 13.5 20.4 °C/W ψJB Junction-to-board characterization parameter 64.2 39.0 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.5 Thermal Information: OPA1656 OPA1656 THERMAL METRIC(1) D (SOIC) UNIT 8 PINS RθJA Junction-to-ambient thermal resistance 119.9 °C/W RθJC(top) Junction-to-case (top) thermal resistance 51.8 °C/W RθJB Junction-to-board thermal resistance 65.4 °C/W ψJT Junction-to-top characterization parameter 10.0 °C/W ψJB Junction-to-board characterization parameter 64.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 5 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 6.6 Electrical Characteristics at TA = 25°C, VS = ±18 V, RL = 2 kΩ, and VCM = VOUT = VS/2 (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT AUDIO PERFORMANCE 0.000029% G = 1, RL = 600 Ω, VO = 3.5 VRMS, f = 1 kHz, 80-kHz measurement bandwidth –131 G = 1, RL = 600 Ω, VO = 3.5 VRMS, f = 20 kHz, 80-kHz measurement bandwidth THD+N IMD –120 Total harmonic distortion + noise Intermodulation distortion G = 1, RL = 2 kΩ, VO = 3.5 VRMS, f = 1 kHz, 80-kHz measurement bandwidth 0.000029% G = 1, RL = 2 kΩ, VO = 3.5 VRMS, f = 20 kHz, 80-kHz measurement bandwidth 0.000035% SMPTE/DIN two-tone, 4:1 (60 Hz and 7 kHz) 0.000018% CCIF twin-tone (19 kHz and 20 kHz) 0.000020% G=1 VO = 3.5 VRMS dB 0.0001% dB –131 dB –129 dB –135 dB –134 dB FREQUENCY RESPONSE GBW SR Gain-bandwidth product G = 100 53 MHz Unity gain bandwidth G=1 20 MHz Slew rate G = –1, 10-V step 24 V/µs Full-power bandwidth(1) VO = 1 VP 3.8 MHz Overload recovery time G = –10 100 ns Channel separation f = 1 kHz –135 dB Settling time 0.01%, G = –1, 10-V step 800 ns f = 20 Hz to 20 kHz 0.53 µVRMS f = 0.1 Hz to 10 Hz 1.9 µVPP 11.8 nV/√Hz NOISE Input voltage noise f = 100 Hz en Input voltage noise density in Input current noise density f = 1 kHz 4.3 f = 10 kHz 2.9 f = 1 kHz nV/√Hz 6 fA/√Hz OFFSET VOLTAGE VOS Input offset voltage VS = ±2.25 V to ±18 V ±0.5 ±1 mV dVOS/dT Input offset voltage drift(2) VS = ±2.25 V to ±18 V TA = –40°C to +125°C 0.3 2 µV/°C PSRR Power-supply rejection ratio VS = ±2.25 V to ±18 V 0.3 5 µV/V INPUT BIAS CURRENT IB Input bias current(3) VCM = 0 V IOS Input offset current VCM = 0 V OPA1655 ±10 OPA1656 ±10 OPA1655 ±10 OPA1656 ±10 ±20 ±20 pA pA INPUT VOLTAGE RANGE VCM Common-mode voltage range CMRR Common-mode rejection ratio (V–) (V–) ≤ VCM ≤ (V+) – 2.25 106 (V+) – 2.25 120 V dB INPUT IMPEDANCE Differential 100 || 9.1 Common-mode 6 || 1.9 MΩ || pF 1012Ω || pF OPEN-LOOP GAIN AOL 6 Open-loop voltage gain (V–) + 1.3 V ≤ VO ≤ (V+) – 1.3 V RL = 600 Ω 134 150 (V–) + 0.5 V ≤ VO ≤ (V+) – 0.5 V RL = 2 kΩ 134 154 Submit Document Feedback dB Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 6.6 Electrical Characteristics (continued) at TA = 25°C, VS = ±18 V, RL = 2 kΩ, and VCM = VOUT = VS/2 (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OUTPUT VO Voltage output ZO Open-loop output impedance (V–) + 0.25 ISC Short-circuit current(4) ±100 mA CL Capacitive load drive 100 pF f = 1 MHz (V+) – 0.25 26 V Ω POWER SUPPLY IQ (1) (2) (3) (4) Quiescent current (per channel) IO = 0 A, VS = ±2.25 V to ±18 V IO = 0 A, TA = –40°C to +125°C(2) 3.9 4.6 5.0 mA Full-power bandwidth = SR / (2π × VP), where SR = slew rate. Specified by design and characterization. Input bias current test conditions can vary from nominal ambient conditions as a result of junction temperature differences. One channel at a time. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 7 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 6.7 Typical Characteristics at TA = 25°C, VS = ±15 V, RL = 2 kΩ, and VCM = VS/2 (unless otherwise noted) Input Referred Voltage Noise (500 nV/div) Voltage Noise Density (nV/—Hz) 100 10 1 10 100 1k 10k 100k Frequency (Hz) 1M 10M Time (1 s/div) C020 D029 Figure 6-1. Input Voltage Noise Density vs Frequency 1000 500 50 Voltage Noise Contribution Resistor Noise Contribution Current Noise Contribution Total Noise Contribution 20 10 5 2 1 0.5 100 1k 10k Source Resistance (:) 100k 20 0 100 1M 120 120 90 90 60 60 30 30 0 0 -30 100 1k 10k 100k Frequency (Hz) 1M 10M D113 10M G= 1 G= 1 G= 10 G= +100 40 20 0 -20 100 1k D104 CL = 10 pF 10k 100k Frequency (Hz) 1M 10M D106 CL = 10 pF Figure 6-5. Open-Loop Gain and Phase vs Frequency 8 1M 60 Phase (q) 150 180 Gain Phase 150 10 10k 100k Frequency (Hz) Figure 6-4. Maximum Output Voltage vs Frequency Gain (dB) 180 1 1k D120 Figure 6-3. Voltage Noise vs Source Resistance Gain (dB) 30 10 0.2 0.1 10 -30 100m Vs=r18 V Vs=r15 V Vs=r2.25 V 40 Output Voltage (VP) 200 100 50 Noise (nV/—Hz) Figure 6-2. 0.1-Hz to 10-Hz Noise Figure 6-6. Closed-Loop Gain vs Frequency Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 6.7 Typical Characteristics (continued) -120 20 100 1k Frequency (Hz) VOUT = 3 VRMS 10k -140 20k 0.1 0.01 -100 0.0001 -120 1E-5 100m f = 1 kHz -120 -140 2E-6 1E-6 5E-7 -160 2E-7 1E-7 5E-8 -180 2E-8 1E-8 20 100 1k Frequency (Hz) VOUT = 3 VRMS 10k -200 20k G = 1, VIN = 1 VPP (0.354 VRMS) G = 1, VIN = 5 VPP (1.768 VRMS) G = +1, VIN = 1 VPP (0.354 VRMS) G = +1, VIN = 5 VPP (1.768 VRMS) 0.003 0.002 0.001 0.0007 0.0005 0.0001 7E-5 5E-5 -120 3E-5 2E-5 r5 r10 Bandwidth = 80 kHz f = 1 kHz -20 -100 0.0001 -120 -40 Amplitude (dBc) -80 0.001 D141 Bandwidth = 80 kHz 0 Intermodulation Distortion (dB) 0.01 RL = 2 kΩ Figure 6-10. THD+N vs Supply Voltage -60 CCIF SMPTE r18 VS (V) D111 0.1 -100 0.0003 0.0002 Figure 6-9. Individual Harmonic Amplitude vs Frequency Intermodulation Distortion (%) D110 Bandwidth = 80 kHz 0.005 Noise (%) 1, HD2 1, HD3 1, HD4 1, HD5 1, HD2 1, HD3 1, HD4 1, HD5 Amplitude (dB) 2E-5 1E-5 5E-6 10 Figure 6-8. THD+N Ratio vs Output Amplitude Total Harmonic Distortion Amplitude ( ) 0.0002 0.0001 5E-5 -140 1 Output Amplitude (VRMS) D109 Bandwidth = 80 kHz -100 G= G= G= G= G= G= G= G= -40 1, 600 : Load 1, 2k : Load 1, 10k : Load -60 1, 600 : Load 1, 2k : Load 1, 10k : Load -80 0.001 Figure 6-7. THD+N Ratio vs Frequency 0.001 0.0005 G= G= G= G= G= G= Total Harmonic Distortion + Noise (dB) 0.00001 Noise (dB) 0.0001 1 Noise (%) 0.001 -80 1, 600 : Load 1, 2k : Load 1, 10k : Load 1, 600 : Load 1, 2k : Load 1, 10k : Load -100 Total Harmonic Distortion G= G= G= G= G= G= Total Harmonic Distortion Total Harmonic Distortion Noise (%) 0.01 Total Harmonic Distortion + Noise (dB) at TA = 25°C, VS = ±15 V, RL = 2 kΩ, and VCM = VS/2 (unless otherwise noted) -60 -80 -100 -120 -140 -160 -180 1E-5 10m -140 100m 1 Output Amplitude (VRMS) 10 -200 20 100 D140 Bandwidth = 80 kHz Figure 6-11. Intermodulation Distortion vs Amplitude G = 1, VOUT = 3 VRMS 1k Frequency (Hz) RL = 2 kΩ 10k 50k D142 Bandwidth = 80 kHz Figure 6-12. FFT, 1-kHz Sine Wave Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 9 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 6.7 Typical Characteristics (continued) 0 0 -20 -20 -40 -40 -60 -60 Amplitude (dBc) Amplitude (dBc) at TA = 25°C, VS = ±15 V, RL = 2 kΩ, and VCM = VS/2 (unless otherwise noted) -80 -100 -120 -140 -80 -100 -120 -140 -160 -160 -180 -180 -200 1k -200 10k Frequency (Hz) G = 1, VOUT = 3 VRMS RL = 2 kΩ 0 80k Bandwidth = 80 kHz VOUT = 3 VRMS Figure 6-13. FFT, 10-kHz Sine Wave Rejection Ratio (dB) Channel Seperation (dB) 80k D143 Bandwidth = 80 kHz PSRR PSRR CMRR 140 -100 -120 -140 -160 120 100 80 60 40 20 -180 1k 0 10k 100k Frequency (Hz) VOUT = 3 VRMS 1M 10M 1 10 100 D114 1k 10k Frequency (Hz) 100k 1M 10M D107 G=1 Figure 6-15. Channel Separation vs Frequency Figure 6-16. CMRR and PSRR vs Frequency (Referred to Input) 147 126 Common-Mode Rejection Ratio (dB) Power Supply Rejection Ratio (dB) RL = 2 kΩ 60k 160 -80 146 145 144 -25 -10 5 20 35 50 65 Temperature (qC) 80 95 110 125 125 124 123 122 -40 -25 -10 D028 Figure 6-17. Power Supply Rejection Ratio vs Temperature (Referred to Input) 10 40k Frequency (Hz) Figure 6-14. FFT, CCIF Input (19 kHz + 20 kHz) -60 143 -40 20k D143 5 20 35 50 65 Temperature (qC) 80 95 110 125 D027 Figure 6-18. Common Mode Rejection Ratio vs Temperature (Referred to Input) Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 6.7 Typical Characteristics (continued) at TA = 25°C, VS = ±15 V, RL = 2 kΩ, and VCM = VS/2 (unless otherwise noted) 15 30 Total Amplifiers (%) Total Amplifiers (%) 25 10 5 20 15 10 5 -1000 -750 -500 -250 0 250 500 Input Offset Voltage (PV) 750 -2 1000 -1.5 D001 -1 -0.5 0 0.5 1 Offset Voltage Drift (PV/qC) 1.5 2 D004 Count = 32 Count = 7955 Figure 6-20. Input Offset Voltage Drift Distribution Figure 6-19. Input Offset Voltage Distribution 1 100 -40qC 50 0.5 Offset Voltage (PV) Offset Voltage (mV) 75 0 25 0 -25 -50 -0.5 25qC -75 -1 -40 -25 -10 5 20 35 50 65 Temperature (qC) 80 95 -100 -18 -15 -12 110 125 D017 85qC 125qC -9 -6 -3 0 3 6 9 Input Common-Mode Voltage (V) 12 15 18 D019 5 typical units shown Figure 6-22. Input Offset vs Common Mode Voltage Figure 6-21. Input Offset vs Temperature Voltage (5 mV/div) VIN VOUT Voltage (5 mV/div) VIN VOUT Time (1 Ps/div) Time (1 Ps/div) D137 G=1 CL = 20 pF D135 G = –1 Figure 6-23. Small-Signal Step Response (100 mV) CL = 100 pF Figure 6-24. Small-Signal Step Response (100 mV) Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 11 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 6.7 Typical Characteristics (continued) at TA = 25°C, VS = ±15 V, RL = 2 kΩ, and VCM = VS/2 (unless otherwise noted) Voltage (5 V/div) VIN VOUT Voltage (5 V/div) VIN VOUT Time (1 Ps/div) Time (1 Ps/div) D136 G=1 RL = 2 kΩ D139 CL = 100 pF G = –1 Figure 6-25. Large-Signal Step Response Figure 6-26. Large-Signal Step Response 100 50 156 20 10 5 Input Bias Current (nA) 158 AOL (dB) 154 152 150 148 IB+ IBIOS 2 1 0.5 0.2 0.1 0.05 146 0.02 0.01 0.005 144 -40 0.002 0.001 -40 -25 -10 5 20 35 50 65 Temperature(qC) 80 95 110 125 -10 5 20 35 50 65 Temperature (qC) 80 95 110 125 D024 Figure 6-28. IB and IOS vs Temperature 4 30 IBIB+ IOS VS = 4.5 V VS = 36 V Quiescent Current (mA) Input Bias Current (pA) -25 D033 Figure 6-27. Open-Loop Gain vs Temperature 20 CL = 100 pF 10 0 -10 3.9 3.8 3.7 -20 -30 -18 -15 -12 -9 -6 -3 0 3 6 9 Input Common-Mode Voltage (V) 12 15 Figure 6-29. IB and IOS vs Common-Mode Voltage 12 18 3.6 -40 -25 -10 D023 5 20 35 50 65 Temperature (qC) 80 95 110 125 D031 Figure 6-30. Supply Current vs Temperature Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 6.7 Typical Characteristics (continued) 4.5 18 4 17 25qC Output Voltage (V) Quiescent Current (mA) at TA = 25°C, VS = ±15 V, RL = 2 kΩ, and VCM = VS/2 (unless otherwise noted) 3.5 3 2.5 -40qC 16 15 125qC 14 2 13 1.5 12 85qC 0 4 8 12 16 20 24 Supply Voltage (V) 28 32 36 0 Figure 6-31. Supply Current vs Supply Voltage 20 30 40 50 60 70 80 Output Current (mA) 90 100 110 120 D025 Figure 6-32. Output Voltage vs Output Current (Sourcing) -12 140 Sinking Sourcing 132 85qC Short Circuit Current (mA) -13 Output Voltage (V) 10 D030 -14 125qC -15 -16 25qC -17 -40qC 124 116 108 100 92 84 76 68 60 -40 -18 0 10 20 30 40 50 60 70 80 Output Current (mA) 90 100 110 120 -10 5 20 35 50 65 Temperature (qC) 80 95 110 125 D041 Figure 6-34. Short-Circuit Current vs Temperature Figure 6-33. Output Voltage vs Output Current (Sinking) 75 100 90 80 Overshoot ( ) 50 Phase Margin (q) -25 D026 25 0 RISO = 0 : RISO = 25 : RISO = 50 : 70 60 50 40 30 20 -25 10 100 Load Capacitance, CL (pF) 500 10 10 D105 100 Load Capacitance, C L (pF) 1000 D037 G=1 G=1 Figure 6-35. Phase Margin vs Capacitive Load Figure 6-36. Percent Overshoot vs Capacitive Load Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 13 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 6.7 Typical Characteristics (continued) at TA = 25°C, VS = ±15 V, RL = 2 kΩ, and VCM = VS/2 (unless otherwise noted) 60 RISO = 0 : RISO = 25 : RISO = 50 : Voltage (5 V/div) 50 Overshoot ( ) 40 30 20 10 0 10 VIN VOUT 100 Load Capacitance, CL (pF) Time (400 ns/div) 1000 D134 D131 G = –10 G = –1 Figure 6-38. Negative Overload Recovery Figure 6-37. Percent Overshoot vs Capacitive Load 1000 VIN VOUT ZO : Voltage (5 V/div) 100 10 1 0.1 Time (400 ns/div) 1 10 100 1k 10k Frequency (Hz) D138 100k 1M 10M D112 G = –10 Figure 6-39. Positive Overload Recovery Figure 6-40. Open-Loop Output Impedance vs Frequency Voltage (5 V/div) VIN VOUT Time (400 ns/div) D138 G=1 Figure 6-41. No Phase Reversal 14 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 7 Detailed Description 7.1 Overview The OPA1655 and OPA1656 (OPA165x) use a three-gain-stage architecture to achieve very low noise and distortion. The Functional Block Diagram shows a simplified schematic of the OPA165x (one channel shown). The devices consist of a low-noise input stage and feedforward pathway coupled to a high-current output stage. This topology exhibits superior distortion performance under a wide range of loading conditions compared to other operational amplifiers. 7.2 Functional Block Diagram Feedforward Path CM1 CM2 +IN Input Stage Gain Stage Output Stage OUT -IN 7.3 Feature Description 7.3.1 Phase Reversal Protection The OPA165x have internal phase-reversal protection. Many op amps exhibit phase reversal when the input is driven beyond the linear common-mode range. This condition is most often encountered in noninverting circuits when the input is driven beyond the specified common-mode voltage range, causing the output to reverse into the opposite rail. The input of the OPA165x prevents phase reversal with excessive common-mode voltage. Instead, the appropriate rail limits the output voltage. This performance is shown in Figure 7-1. 20 15 Voltage (V) 10 5 0 -5 -10 -15 -20 VIN VOUT Time (125 s/div) C004 Figure 7-1. Output Waveform Devoid of Phase Reversal During an Input Overdrive Condition 7.3.2 Electrical Overstress Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress. These questions tend to focus on the device inputs, but can involve the supply voltage pins or even the output pin. Each of these different pin functions have electrical stress limits determined by the voltage breakdown characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin. Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect them from accidental ESD events both before and during product assembly. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 15 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 A good understanding of this basic ESD circuitry and the relevance to an electrical overstress event is helpful. Figure 7-2 illustrates the ESD circuits contained in the OPA165x (indicated by the dashed line area). The ESD protection circuitry involves several current-steering diodes connected from the input and output pins and routed back to the internal power-supply lines, where the diodes meet at an absorption device internal to the operational amplifier. This protection circuitry is intended to remain inactive during normal circuit operation. TVS + ± RF +VS R1 IN± 20 Ÿ RS IN+ 20 Ÿ + Power-Supply ESD Cell VIN RL + ± + ± ±VS TVS Figure 7-2. Equivalent Internal ESD Circuitry Relative to a Typical Circuit Application An ESD event produces a short-duration, high-voltage pulse that is transformed into a short-duration, highcurrent pulse when discharging through a semiconductor device. The ESD protection circuits are designed to provide a current path around the operational amplifier core to prevent damage. The energy absorbed by the protection circuitry is then dissipated as heat. When an ESD voltage develops across two or more amplifier device pins, current flows through one or more steering diodes. Depending on the path that the current takes, the absorption device can activate. The absorption device has a trigger, or threshold voltage, that is above the normal operating voltage of the OPA165x but below the device breakdown voltage level. When this threshold is exceeded, the absorption device quickly activates and clamps the voltage across the supply rails to a safe level. When the operational amplifier connects into a circuit, as shown in Figure 7-2, the ESD protection components are intended to remain inactive and do not become involved in the application circuit operation. However, circumstances may arise where an applied voltage exceeds the operating voltage range of a given pin. If this condition occurs, there is a risk that some internal ESD protection circuits can turn on and conduct current. Any such current flow occurs through steering-diode paths and rarely involves the absorption device. Figure 7-2 shows a specific example where the input voltage (VIN) exceeds the positive supply voltage (V+) by 500 mV or more. Much of what happens in the circuit depends on the supply characteristics. If V+ can sink the current, one of the upper input steering diodes conducts and directs current to V+. Excessively high current levels can flow with increasingly higher VIN. As a result, the data sheet specifications recommend that applications limit the input current to 10 mA. 16 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 If the supply is not capable of sinking the current, VIN can begin sourcing current to the operational amplifier and then take over as the source of positive supply voltage. The danger in this case is that the voltage can rise to levels that exceed the operational amplifier absolute maximum ratings. Another common question involves what happens to the amplifier if an input signal is applied to the input when the power supplies (V+ or V–) are at 0 V. Again, this question depends on the supply characteristic when at 0 V, or at a level below the input signal amplitude. If the supplies appear as high impedance, then the input source supplies the operational amplifier current through the current-steering diodes. This state is not a normal bias condition; most likely, the amplifier does not operate normally. If the supplies are low impedance, then the current through the steering diodes can become quite high. The current level depends on the ability of the input source to deliver current, and any resistance in the input path. If there is any uncertainty about the ability of the supply to absorb this current, add external Zener diodes to the supply pins; see Figure 7-2. Select the Zener voltage so that the diode does not turn on during normal operation. However, the Zener voltage must be low enough so that the Zener diode conducts if the supply pin begins to rise above the safe-operating, supply-voltage level. 7.3.3 EMI Rejection Ratio (EMIRR) The electromagnetic interference (EMI) rejection ratio, or EMIRR, describes the EMI immunity of operational amplifiers. An adverse effect that is common to many operational amplifiers is a change in the offset voltage as a result of RF signal rectification. An operational amplifier that is more efficient at rejecting this change in offset as a result of EMI has a higher EMIRR and is quantified by a decibel value. Measuring EMIRR can be performed in many ways, but this document provides the EMIRR IN+, which specifically describes the EMIRR performance when the RF signal is applied to the noninverting input pin of the operational amplifier. In general, only the noninverting input is tested for EMIRR for the following three reasons: • Operational amplifier input pins are known to be the most sensitive to EMI, and typically rectify RF signals better than the supply or output pins. • The noninverting and inverting operational amplifier inputs have symmetrical physical layouts and exhibit nearly matching EMIRR performance. • EMIRR is easier to measure on noninverting pins than on other pins because the noninverting input pin can be isolated on a printed-circuit-board (PCB). This isolation allows the RF signal to be applied directly to the noninverting input pin with no complex interactions from other components or connecting PCB traces. A more formal discussion of the EMIRR IN+ definition and test method is provided in the EMI Rejection Ratio of Operational Amplifiers application report, available for download at www.ti.com. The EMIRR IN+ of the OPA165x is plotted versus frequency in Figure 7-3. If available, any dual and quad operational amplifier device versions have nearly identical EMIRR IN+ performance. The OPA165x unity-gain bandwidth is 20 MHz. EMIRR performance below this frequency denotes interfering signals that fall within the operational amplifier bandwidth. 140 EMIRR IN+ (dB) 120 100 80 60 40 20 10M 100M 1G Frequency (Hz) 10G D115 Figure 7-3. OPA165x EMIRR vs Frequency Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 17 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 Table 7-1 lists the EMIRR IN+ values for the OPA165x at particular frequencies commonly encountered in realworld applications. Applications listed in Table 7-1 can be centered on or operated near the particular frequency shown. This information can be of special interest to designers working with these types of applications, or working in other fields likely to encounter RF interference from broad sources, such as the industrial, scientific, and medical (ISM) radio band. Table 7-1. OPA165x EMIRR IN+ for Frequencies of Interest FREQUENCY APPLICATION OR ALLOCATION EMIRR IN+ 400 MHz Mobile radio, mobile satellite, space operation, weather, radar, UHF 36 dB 900 MHz GSM, radio communication and navigation, GPS (to 1.6 GHz), ISM, aeronautical mobile, UHF 42 dB 1.8 GHz GSM, mobile personal comm. broadband, satellite, L-band 52 dB Bluetooth® 2.4 GHz 802.11b/g/n, 3.6 GHz Radiolocation, aero comm./nav., satellite, mobile, S-band 67 dB 802.11a/n, aero communication and navigation, mobile communication, space and satellite operation, C-band 77 dB 5 GHz mobile personal comm., ISM, amateur radio and satellite, S-band 64 dB 7.3.3.1 EMIRR IN+ Test Configuration Figure 7-4 shows the circuit configuration for testing the EMIRR IN+. An RF source is connected to the operational amplifier noninverting input pin using a transmission line. The operational amplifier is configured in a unity-gain buffer topology with the output connected to a low-pass filter (LPF) and a digital multimeter (DMM). A large impedance mismatch at the operational amplifier input causes a voltage reflection; however, this effect is characterized and accounted for when determining the EMIRR IN+. The resulting dc offset voltage is sampled and measured by the multimeter. The LPF isolates the multimeter from residual RF signals that can interfere with multimeter accuracy. See the EMI Rejection Ratio of Operational Amplifiers application report for more details. Ambient temperature: 25Û& +VS ± 50 Low-Pass Filter + RF source DC Bias: 0 V Modulation: None (CW) Frequency Sweep: 201 pt. Log -VS Not shown: 0.1 µF and 10 µF supply decoupling Sample / Averaging Digital Multimeter Figure 7-4. EMIRR IN+ Test Configuration Schematic 7.4 Device Functional Modes The OPA165x have a single functional mode and are operational when the power-supply voltage is greater than 4.5 V. The maximum specified power-supply voltage for the OPA165x is 36 V. In all cases, the common-mode voltage must be maintained within the specified range. In addition, key parameters are specified over the temperature range of TA = –40°C to +125°C. 18 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 8 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 8.1 Application Information 8.1.1 Basic Noise Calculations Low-noise circuit design requires careful analysis of all noise sources. External noise sources can dominate in many cases; consider the effect of source resistance on overall op amp noise performance. Total noise of the circuit is the root-sum-square combination of all noise components. Figure 8-1 shows noninverting (A) and inverting (B) op amp circuit configurations with gain. In circuit configurations with gain, the feedback network resistors contribute noise. In general, the current noise of the op amp reacts with the feedback resistors to create additional noise components. The selected feedback resistor values make these noise sources negligible. Low impedance feedback resistors load the output of the amplifier. The equations for total noise are shown for both configurations. (A) Noise in Noninverting Gain Configuration R1 Noise at the output is given as EO, where R2 GND ± EO + RS + ± VS Source GND '1 = l1 + :2; A5 = ¥4 „ G$ „ 6(-) „ 45 d :3; A41 æ42 = ¨4 „ G$ „ 6(-) „ d 8 41 „ 42 h d h 41 + 42 ¾*V Thermal noise of R1 || R2 :4; G$ = 1.38065 „ 10F23 Boltzmann Constant :5; , h - 6(-) = 237.15 + 6(°%) (B) Noise in Inverting Gain Configuration R1 RS R2 h >-? Thermal noise of RS Temperature in kelvins :45 + 41 ; „ 42 42 2 p „ ¨:A0 ;2 + kA41 +45 æ42 o + FE0 „ H IG 45 + 41 45 + 41 + 42 :6; '1 = l1 + + :7; :45 + 41 ; „ 42 8 I d A41 +45 æ42 = ¨4 „ G$ „ 6(-) „ H h 45 + 41 + 42 ¾*V Thermal noise of (R1 + RS) || R2 GND :8; G$ = 1.38065 „ 10F23 :9; 6(-) = 237.15 + 6(°%) ± + ± d 8 ¾*V > 84/5 ? Noise at the output is given as EO, where EO VS 42 41 „ 42 2 2 p „ ¨:A5 ;2 + :A0 ;2 + kA41 æ42 o + :E0 „ 45 ;2 + lE0 „ d hp 41 41 + 42 :1; Source GND d , h - >-? 2 > 84/5 ? Boltzmann Constant Temperature in kelvins Copyright © 2017, Texas Instruments Incorporated where • • eN is the voltage noise of the amplifier. For the OPA165x, eN = 4.3 nV/√Hz at 1 kHz. iN is the current noise of the amplifier. For the OPA165x, iN = 6 fA/√Hz at 1 kHz. Note: For additional resources on noise calculations, see TI's Precision Labs Series. Figure 8-1. Noise Calculation in Gain Configurations Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 19 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 8.2 Typical Applications 8.2.1 Preamplifier Circuit for Vinyl Record Playback With Moving-Magnet Phono Cartridges The noise and distortion performance of the OPA165x is exceptional in applications with high source impedances, which makes these devices an excellent choice in preamplifier circuits for moving magnet phono cartridges. The high source impedance of the cartridge, and high gain required by the RIAA playback curve at low frequency, requires an amplifier with both low input current noise and low input voltage noise. 15 V MM Phono Input +IN R1 47 k C1 150 pF
IN R2 118 k R4 127  C2 27 nF OPA165x + R5 100  VOUT – 15 V R3 10 k C5 100 F Output R6 100 k C3 7.5 nF C4 100 F Figure 8-2. Preamplifier Circuit for Vinyl Record Playback With Moving-Magnet Phono Cartridges (Single Channel Shown) 8.2.1.1 Design Requirements • • • 20 Gain: 40 dB (1 kHz) RIAA accuracy: ±0.5 dB (100 Hz to 20 kHz) Power supplies: ±15 V Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 8.2.1.2 Detailed Design Procedure Vinyl records are recorded using an equalization curve specified by the Recording Institute Association of America (RIAA). The purpose of this equalization curve is to decrease the amount of space occupied by a groove on the record and therefore maximize the amount of information able to be stored. Proper playback of music stored on the record requires a preamplifier circuit that applies the inverse transfer function of the recording equalization curve. The combination of the recording equalization and the playback equalization results in a flat frequency response over the audio range, as Figure 8-3 shows. 20 15 Playback Curve 10 Gain (dB) 5 0 Combined Response -5 -10 Recording Curve -15 -20 10 100 1000 10000 Frequency (Hz) C009 Figure 8-3. RIAA Recording and Playback Curves Normalized at 1 kHz The basic RIAA playback curve implements three time constants: 75 μs, 380 μs, and 3180 μs. An IEC amendment was later added to the playback curve and implements a pole in the curve at 20 Hz with the intent of protecting loudspeakers from excessive low frequency content. Rather than strictly adhering to the IEC amendment, this design moves this pole to a lower frequency to improve low frequency response and still provide protection for loudspeakers. Resistor R1 and capacitor C1 are selected to provide the proper input impedance for the moving magnet cartridge. Cartridge loading is specified by the manufacturer in the cartridge datasheet and is absolutely crucial for proper response at high frequency. 47 kΩ is a common value for the input resistor, and the capacitive loading is usually specified from 200 pF to 300 pF per channel. This capacitive loading specification includes the capacitance of the cable connecting the turntable to the preamplifier, as well as any additional parasitic capacitances at the preamplifier input. Therefore, the value of C1 must be less than the loading specification to account for these additional capacitances. The output network consisting of R5, R6, and C5 serves to ac couple the preamplifier circuit to any subsequent electronics in the signal path. 100-Ω resistor R5 limits in-rush current into coupling capacitor C5 and prevents parasitic capacitance from cabling from causing instability. R6 prevents charge accumulation on C5. Capacitor C5 is chosen to be the same value as C4; for simplicity however, the value of C5 must be large enough to avoid attenuating low-frequency information. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 21 OPA1655, OPA1656 SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 www.ti.com The feedback resistor elements must be selected to provide the correct response within the audio bandwidth. In order to achieve the correct frequency response, the passive components in Figure 8-2 must satisfy Equation 1, Equation 2, and Equation 3: R2 × C2 = 3180 μs (1) R3 × C3 = 75 μs R2  (2)  R3 × C2 + C3 = 318 μs (3) R2, R3, and R4 must also be selected to meet the design requirements for gain. The gain at 1 kHz is determined by subtracting 20 dB from gain of the circuit at very low-frequency (near dc), as shown in Equation 4: A1kHz = ALF − 20 dB (4) Therefore, the low frequency gain of the circuit must be 60 dB to meet the goal of 40 dB at 1 kHz and is determined by resistors R2, R3, and R4 as shown in Equation 5: R +R ALF = 1 + 3R 2 = 1000  60 dB 4 (5) Because there are multiple combinations of passive components that satisfy these equations, a spreadsheet or other software calculation tool is the easiest method to examine resistor and capacitor combinations. Capacitor C4 forces the gain of the circuit to unity at dc in order to limit the offset voltage at the output of the preamplifier circuit. The high-pass corner frequency created by this capacitor is calculated by Equation 6: FHP = 2πR1 C 4 4 (6) The circuit described in Figure 8-2 is constructed with 1% tolerance resistors and 5% tolerance NP0, C0G ceramic capacitors without any additional hand sorting. The large value of C4 typically requires an electrolytic type to be used. However, electrolytic capacitors have the potential to introduce distortion into the signal path. This circuit is constructed using a bipolar electrolytic capacitor specifically intended for audio applications. 22 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 8.2.1.3 Application Curves The deviation from the ideal RIAA transfer function curve is shown in Figure 8-4 and normalized to an ideal gain of 40 dB at 1 kHz. The measured gain at 1 kHz is 0.05 dB less than the design goal, and the maximum deviation from 100 Hz to 20 kHz is 0.18 dB. The deviation from the ideal curve can be improved by hand-sorting resistor and capacitor values to their ideal values. The value of C4 can also be increased to reduce the deviation at low frequency. A spectrum of the preamplifier output signal is shown in Figure 8-5 for a 10 mVRMS, 1-kHz input signal (1-VRMS output). All distortion harmonics are below the preamplifier noise floor. 1.5 Amplitude (dBV) Magnitude (dB) 1 0.5 0 -0.5 10 100 1k Frequency (Hz) 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 100 10k D202 Figure 8-4. Measured Deviation From Ideal RIAA Response 1k Frequency (Hz) 10k D201 Figure 8-5. Output Spectrum for a 10-mVRMS, 1‑kHz Input Signal Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 23 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 8.2.2 Composite Headphone Amplifier Figure 8-6 shows the BUF634A buffer inside the feedback loop of the OPA165x to increase the available output current for low-impedance headphones. If the BUF634A is used in wide-bandwidth mode, no additional components beyond the feedback resistors are required to maintain loop stability. 12 V 100 F 0.1 F 0.1 F + Input R1 100 k OPA165x Output BUF634A 0.1 F – 0.1 F RBW 100 F 12 V R3 R2 500
500 Figure 8-6. Composite Headphone Amplifier (Single-Channel Shown) 8.2.2.1 Application Curves -85 0 -30 Amplitude (dBc) -90 THD + N (dB) 249 : RL 249 : RL 32 : RL 16 : RL -95 -100 -105 -110 -90 -120 -150 20 Hz 100 Hz 1 kHz 20 kHz Frequency (Hz) -180 0 C051 Figure 8-7. THD+N vs Frequency for a 5‑VPP (1.77‑VRMS) Input Signal 24 -60 5000 10000 Frequency (Hz) 15000 20000 C052 Figure 8-8. FFT for a 5-VPP (1.77-VRMS), 1‑kHz Input Signal Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 8.2.3 Baxandall Tone Control Figure 8-9 gives an example of ultra-low noise and THD tone control. This circuit provides 20 dB of gain at the first stage, followed by two separate tone controls for bass and treble. The passive circuit is designed to yield a flat gain response with the potentiometers both set to 50%. 1.69 k 15.4 k 11 k Bass 100 k 10 nF 10 µF – Input 11 k 10 nF 11 k 15 V + – 1/2 OPA1656 10 µF + 4.7 nF 1.69 k 3.65 k 3.65 k 500 k Treble Output 1/2 OPA1656
15 V Figure 8-9. Dual Potentiometer Baxandall Tone Control 8.2.3.1 Application Curves 40 10% Bass / 90% Treble 50% Bass / 50% Treble 90% Bass / 10% Treble 36 32 Amplitude (dB) 28 24 20 16 12 8 4 0 100 1k Frequency (Hz) 10k D203 Figure 8-10. Amplitude vs Frequency for Various Tone-Control Settings Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 25 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 8.2.4 Guitar Input to XLR Output The OPA165x are an excellent choice for guitar input circuits as a result of the high input impedance and ultra-low noise performance. Figure 8-11 gives an example of a basic guitar input circuit to differential XLR schematic. The logarithmic taper potentiometer shown in this circuit provides 6 dB of gain at 0%, and 40 dB of gain at 100%. The rail-to-rail output swing of the OPA165x allows for a high amplitude swing at the outputs of the differentially configured amplifiers, while maintaining very low distortion performance. A 10-µF dc blocking capacitor is used in the feedback of the noninverting stage to remove any dc offset as a result of the amplifier offset voltage. However, this dc blocking capacitor can be eliminated for applications that are not sensitive to low dc offsets. 10 µF 100 k 1 k 1k ¼ Inch Jack 10 pF – 49  + 1/2 OPA1656 1 M XLR Output 1 k 1 k 10 pF 5V 49  – 1/2 OPA1656 +
5 V Figure 8-11. Guitar Input to XLR Output Schematic 0.1 0.08 0.06 0.04 0.02 0 -0.02 -0.04 -0.06 -0.08 -0.1 -0.12 -0.14 -0.16 -0.18 -0.2 0 0.4 0.8 1.2 1.6 2 2.4 3.3 Input Voltage 3 Output Voltage 1 2.7 Output Voltage 2 2.4 2.1 1.8 1.5 1.2 0.9 0.6 0.3 0 -0.3 -0.6 -0.9 -1.2 2.8 3.2 3.6 4 Output Voltage (V) Input Voltage (V) 8.2.4.1 Application Curves D200 Figure 8-12. 1-kHz Input Signal Transient Simulation 26 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 8.3 Power Supply Recommendations The OPA165x are specified for operation from 4.5 V to 36 V (±2.25 V to ±18 V); many specifications apply from –40°C to +125°C. Parameters that can exhibit significant variance with regard to operating voltage or temperature are presented in the Typical Characteristics section. The OPA165x operate with as little as 4.5 V between the supplies and with up to 36 V between the supplies. However, some applications do not require equal positive and negative output voltage swing. With the OPA165x, power-supply voltages are not required to be equal. For example, the positive supply can be set to 25 V with the negative supply at –5 V. 8.4 Layout 8.4.1 Layout Guidelines For best operational performance of the device, use good printed-circuit board (PCB) layout practices, including: • • • • • • • • Noise can propagate into analog circuitry through the power pins of the circuit as a whole and of op amp itself. Bypass capacitors are used to reduce the coupled noise by providing low-impedance power sources local to the analog circuitry. – Connect low-ESR, 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable for singlesupply applications. Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise pickup. Physically separate digital and analog grounds, observing the flow of the ground current. To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If these traces cannot be kept separate, crossing the sensitive trace perpendicular is much better as opposed to in parallel with the noisy trace. Place the external components as close to the device as possible. As illustrated in Figure 8-13, keeping RF and RG close to the inverting input minimizes parasitic capacitance. Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitive part of the circuit. Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce leakage currents from nearby traces that are at different potentials. Cleaning the PCB following board assembly is recommended for best performance. Any precision integrated circuit can experience performance shifts resulting from moisture ingress into the plastic package. Following any aqueous PCB cleaning process, baking the PCB assembly is recommended to remove moisture introduced into the device packaging during the cleaning process. A low-temperature, post-cleaning bake at 85°C for 30 minutes is sufficient for most circumstances. 8.4.1.1 Power Dissipation The OPA165x op amps are capable of driving 600-Ω loads with a power-supply voltage up to ±18 V and full operating temperature range. Internal power dissipation increases when operating at high supply voltages. Copper leadframe construction used in the OPA165x improves heat dissipation compared to conventional materials. Circuit board layout can also help minimize junction temperature rise. Wide copper traces help dissipate the heat by acting as an additional heat sink. Temperature rise can be further minimized by soldering the devices to the circuit board rather than using a socket. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 27 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 8.4.2 Layout Example + VIN A + VIN B VOUT A RG VOUT B RG RF RF (Schematic Representation) Place components close to device and to each other to reduce parasitic errors. Output A VS+ OUTPUT A Use low-ESR, ceramic bypass capacitor. Place as close to the device as possible. GND V+ RF Output B GND -IN A OUTPUT B +IN A -IN B RF RG VIN A GND RG V± Use low-ESR, ceramic bypass capacitor. Place as close to the device as possible. GND VS± +IN B Ground (GND) plane on another layer VIN B Keep input traces short and run the input traces as far away from the supply lines as possible. Figure 8-13. Operational Amplifier Board Layout for Noninverting Configuration 28 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 9 Device and Documentation Support 9.1 Device Support 9.1.1 Development Support 9.1.1.1 PSpice® for TI PSpice® for TI is a design and simulation environment that helps evaluate performance of analog circuits. Create subsystem designs and prototype solutions before committing to layout and fabrication, reducing development cost and time to market. 9.1.1.2 TINA-TI™ Simulation Software (Free Download) TINA-TI™ simulation software is a simple, powerful, and easy-to-use circuit simulation program based on a SPICE engine. TINA-TI simulation software is a free, fully-functional version of the TINA™ software, preloaded with a library of macromodels, in addition to a range of both passive and active models. TINA-TI simulation software provides all the conventional dc, transient, and frequency domain analysis of SPICE, as well as additional design capabilities. Available as a free download from the Design tools and simulation web page, TINA-TI simulation software offers extensive post-processing capability that allows users to format results in a variety of ways. Virtual instruments offer the ability to select input waveforms and probe circuit nodes, voltages, and waveforms, creating a dynamic quick-start tool. Note These files require that either the TINA software or TINA-TI software be installed. Download the free TINA-TI simulation software from the TINA-TI™ software folder. 9.1.1.3 DIP-Adapter-EVM Speed up your op amp prototyping and testing with the DIP-Adapter-EVM, which provides a fast, easy and inexpensive way to interface with small, surface-mount devices. Connect any supported op amp using the included Samtec terminal strips or wire them directly to existing circuits. The DIP-Adapter-EVM kit supports the following industry-standard packages: D or U (SOIC-8), PW (TSSOP-8), DGK (VSSOP-8), DBV (SOT-23-6, SOT-23-5 and SOT-23-3), DCK (SC70-6 and SC70-5), and DRL (SOT563-6). 9.1.1.4 DIYAMP-EVM The DIYAMP-EVM is a unique evaluation module (EVM) that provides real-world amplifier circuits, enabling the user to quickly evaluate design concepts and verify simulations. This EVM is available in three industry-standard packages (SC70, SOT23, and SOIC) and 12 popular amplifier configurations, including amplifiers, filters, stability compensation, and comparator configurations for both single and dual supplies. 9.1.1.5 TI Reference Designs TI reference designs are analog solutions created by TI’s precision analog applications experts. TI reference designs offer the theory of operation, component selection, simulation, complete PCB schematic and layout, bill of materials, and measured performance of many useful circuits. TI reference designs are available online at https://www.ti.com/reference-designs. 9.1.1.6 Filter Design Tool The filter design tool is a simple, powerful, and easy-to-use active filter design program. The filter design tool allows the user to create optimized filter designs using a selection of TI operational amplifiers and passive components from TI's vendor partners. Available as a web-based tool from the Design tools and simulation web page, the filter design tool allows the user to design, optimize, and simulate complete multistage active filter solutions within minutes. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 29 OPA1655, OPA1656 www.ti.com SBOS901C – MARCH 2019 – REVISED SEPTEMBER 2022 9.2 Documentation Support 9.2.1 Related Documentation The following documents are recommended for reference when using the OPA165x, and are available for download at www.ti.com. • • • • • • • Texas Instruments, Source Resistance and Noise Considerations in Amplifiers technical brief Texas Instruments, Single-Supply Operation of Operational Amplifiers application bulletin Texas Instruments, Op Amp Performance Analysis application bulletin Texas Instruments, Compensate Transimpedance Amplifiers Intuitively application report Texas Instruments, Tuning in Amplifiers application bulletin Texas Instruments, Feedback Plots Define Op Amp AC Performance application bulletin Texas Instruments, Active Volume Control for Professional Audio design guide 9.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 9.4 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 9.5 Trademarks Burr-Brown™, TINA-TI™, and TI E2E™ are trademarks of Texas Instruments. TINA™ is a trademark of DesignSoft, Inc. Bluetooth® is a registered trademark of Bluetooth SIG, Inc. PSpice® is a registered trademark of Cadence Design Systems, Inc. All trademarks are the property of their respective owners. 9.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 9.7 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 10 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 30 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: OPA1655 OPA1656 PACKAGE OPTION ADDENDUM www.ti.com 30-Sep-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) OPA1655DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 2R8Q Samples OPA1655DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 2R8Q Samples OPA1655DR ACTIVE SOIC D 8 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 OP1655 Samples OPA1656ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 OP1656 Samples OPA1656IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 OP1656 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of