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OPA1678, OPA1679
ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
OPA167x低
低失真音频运算放大器
1 特性
•
•
•
•
•
1
•
•
•
•
•
•
•
•
3 说明
低噪声：1kHz 时为 4.5nV/√Hz
低失真：1kHz 时为 0.0001%
高开环增益：114dB
高共模抑制：110dB
低静态电流：
– 每通道 2mA
低输入偏置电流：10pA（典型值）
压摆率：9V/μs
宽增益带宽：16MHz (G = 1)
单位增益稳定
轨至轨输出
宽电源电压范围：
– ±2.25V 至 ±18V 或 4.5V 至 36V
双通道和四通道版本
小封装尺寸：
– 双通道：SO-8、MSOP-8、SON-8
– 四通道：SO-14、TSSOP-14、QFN-16
OPA1678（双通道）和 OPA1679（四通道）运算放大
器较音频电路中常用的传统运算放大器而言，可提供更
高的系统级性能。OPA167x 放大器在 1kHz 时可实现
4.5nV/√Hz 的低噪声密度和 0.0001% 的低失真度，从
而提高了音频信号保真度。它们在 2kΩ 负载下还提供
800mV 范围内的轨至轨输出摆幅，从而增加余量并实
现动态范围最大化。
OPA1678 和 OPA1679 可在 ±2.25V 至 ±18V（或
4.5V 至 36V）的极宽电源电压范围内工作，电源电流
仅为 2mA，因此可适应许多类型的音频产品的电源限
制。这些运算放大器是单位增益稳定型放大器，且可在
各种负载条件下实现出色的动态行为，因此能够用于许
多音频电路中。
OPA167x 放大器使用完全独立的内部电路，可将串扰
降到最低，即便在过驱动或过载时也不受通道间相互作
用的影响。
OPA167x 额定温度范围为 –40°C 至 +85°C。
2 应用
•
•
•
•
•
器件信息(1)
模拟信号调节
模拟和数字混频器
音频效果踏板
A/V 接收器
车载音频系统
器件型号
OPA1678
OPA1679
封装
封装尺寸（标称值）
SOIC (8)
4.90mm × 3.91mm
VSSOP (8)
3.00mm × 3.00mm
SON (8)
3.00mm × 3.00mm
SOIC (14)
8.65mm × 3.91mm
TSSOP (14)
5.00mm × 4.40mm
QFN (16)
4.00mm x 4.00mm
(1) 如需了解所有可用封装，请参阅数据表末尾的封装选项附录。
THD+N 与频率（2kΩ 负载）
V
BIAS1
V +
IN
V
Class AB
Control
Circuitry
IN
V
V
BIAS2
V
O
Total Harmonic Distortion +Noise (%)
Tail
Current
0.1
-60
Gain = 10 V/V
Gain = 1 V/V
Gain = -1 V/V
0.01
-80
0.001
-100
0.0001
-120
Total Harmonic Distortion + Noise (dB)
简化内部原理图
V+
-140
0.00001
10
100
1k
Frequency (Hz)
10k
C002
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SBOS855
OPA1678, OPA1679
ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
www.ti.com.cn
目录
1
2
3
4
5
6
特性 ..........................................................................
应用 ..........................................................................
说明 ..........................................................................
修订历史记录 ...........................................................
Pin Configuration and Functions .........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
7
1
1
1
2
3
6
Absolute Maximum Ratings ...................................... 6
ESD Ratings.............................................................. 6
Recommended Operating Conditions....................... 6
Thermal Information: OPA1678 ................................ 7
Thermal Information: OPA1679 ................................ 7
Electrical Characteristics: VS = ±15 V....................... 8
Typical Characteristics ............................................ 10
Detailed Description ............................................ 15
7.1
7.2
7.3
7.4
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
15
15
15
19
8
Application and Implementation ........................ 20
8.1 Application Information............................................ 20
8.2 Typical Application .................................................. 21
9 Power Supply Recommendations...................... 27
10 Layout................................................................... 27
10.1 Layout Guidelines ................................................. 27
10.2 Layout Example .................................................... 28
10.3 Power Dissipation ................................................. 28
11 器件和文档支持 ..................................................... 29
11.1
11.2
11.3
11.4
11.5
11.6
11.7
11.8
器件支持................................................................
文档支持................................................................
相关链接................................................................
接收文档更新通知 .................................................
社区资源................................................................
商标 .......................................................................
静电放电警告.........................................................
Glossary ................................................................
29
29
30
30
30
30
30
30
12 机械、封装和可订购信息 ....................................... 30
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Revision B (June 2018) to Revision C
Page
•
已更改 将 OPA1679 QFN 封装的状态变更为生产数据 .......................................................................................................... 1
•
Updated GPN BUF634A in 图 40 ........................................................................................................................................ 25
Changes from Revision A (May 2018) to Revision B
•
Page
添加了内容：预览 QFN (RUM) 封装.................................................................................................................. .................... 1
Changes from Original (February 2017) to Revision A
Page
•
已添加 在特性 列表中添加了 SON-8 封装 .............................................................................................................................. 1
•
已添加 向器件信息 表中添加了 DRG (SON) 8 引脚封装 ........................................................................................................ 1
•
Added DRG (SON) 8-pin pinout drawing to Pin Configuration and Functions section .......................................................... 3
•
Added thermal pad information to Pin Functions: OPA1678 table......................................................................................... 3
•
Added DRG (SON) thermal information to Thermal Information: OPA1678 table ................................................................. 7
2
Copyright © 2017–2019, Texas Instruments Incorporated
OPA1678, OPA1679
www.ti.com.cn
ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
5 Pin Configuration and Functions
OPA1678 D and DGK Packages
8-Pin SOIC and VSSOP
Top View
OPA1678 DRG Package
8-Pin SON With Exposed Thermal Pad
Top View
OUT A
1
8
V+
±IN A
2
7
OUT B
+IN A
3
6
±IN B
V±
4
5
+IN B
OUT A
1
±IN A
2
+IN A
3
V±
4
Thermal
Pad
8
V+
7
OUT B
6
±IN B
5
+IN B
Not to scale
Not to scale
Pin Functions: OPA1678
PIN
I/O
DESCRIPTION
NAME
NO.
–IN A
2
I
Inverting input, channel A
+IN A
3
I
Noninverting input, channel A
–IN B
6
I
Inverting input, channel B
+IN B
5
I
Noninverting input, channel B
OUT A
1
O
Output, channel A
OUT B
7
O
Output, channel B
V–
4
—
Negative (lowest) power supply
V+
8
—
Positive (highest) power supply
Thermal pad
Exposed thermal die pad on underside; connect thermal die pad to V–. Soldering the thermal
pad improves heat dissipation and provides specified performance.
Copyright © 2017–2019, Texas Instruments Incorporated
3
OPA1678, OPA1679
ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
www.ti.com.cn
OPA1679 D and PW Packages
14-Pin SOIC and TSSOP
Top View
OUT A
1
14
OUT D
±IN A
2
13
±IN D
+IN A
3
12
+IN D
V+
4
11
V±
+IN B
5
10
+IN C
±IN B
6
9
±IN C
OUT B
7
8
OUT C
Not to scale
Pin Functions: OPA1679
PIN
I/O
DESCRIPTION
NAME
NO.
–IN A
2
I
Inverting input, channel A
+IN A
3
I
Noninverting input, channel A
–IN B
6
I
Inverting input, channel B
+IN B
5
I
Noninverting input, channel B
–IN C
9
I
Inverting input, channel C
+IN D
10
I
Noninverting input, channel C
–IN D
13
I
Inverting input, channel D
+IN D
12
I
Noninverting input, channel D
OUT A
1
O
Output, channel A
OUT B
7
O
Output, channel B
OUT C
8
O
Output, channel C
OUT D
14
O
Output, channel D
V+
4
—
Positive (highest) power supply
V–
11
—
Negative (lowest) power supply
4
Copyright © 2017–2019, Texas Instruments Incorporated
OPA1678, OPA1679
www.ti.com.cn
ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
OPA1679 RUM Package
16-Pin QFN With Exposed Thermal Pad
Top View
Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
–IN A
1
I
Inverting input, channel A
+IN A
2
I
Noninverting input, channel A
–IN B
5
I
Inverting input, channel B
+IN B
4
I
Noninverting input, channel B
–IN C
8
I
Inverting input, channel C
+IN C
9
I
Noninverting input, channel C
–IN D
12
I
Inverting input, channel D
+IN D
11
I
Noninverting input, channel D
NC
13
—
No connect
NC
16
—
No connect
OUT A
15
O
Output, channel A
OUT B
6
O
Output, channel B
OUT C
7
O
Output, channel C
OUT D
14
O
Output, channel D
V+
3
—
Positive (highest) power supply
V–
10
—
Negative (lowest) power supply
Copyright © 2017–2019, Texas Instruments Incorporated
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OPA1678, OPA1679
ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
Voltage
Input
Input (all pins except power-supply pins)
Current
Operating, TA
V
(V+) + 0.5
V
–10
10
mA
125
°C
200
°C
150
°C
Continuous
–55
Junction, TJ
Storage, Tstg
(2)
UNIT
40
(V–) – 0.5
Output short-circuit (2)
Temperature
(1)
MAX
Supply voltage, VS = (V+) – (V–)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Short-circuit to VS / 2 (ground in symmetrical dual-supply setups), one amplifier per package.
6.2 ESD Ratings
VALUE
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
V(ESD)
(1)
(2)
(3)
Electrostatic discharge
(1)
UNIT
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
Machine model (MM) (3)
±200
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Machine Model was not measured on OPA1679IRUM.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
Supply voltage
TA
6
Operating temperature
NOM
MAX
UNIT
4.5 (±2.25)
36 (±18)
V
–40
85
°C
Copyright © 2017–2019, Texas Instruments Incorporated
OPA1678, OPA1679
www.ti.com.cn
ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
6.4 Thermal Information: OPA1678
OPA1678
THERMAL METRIC (1)
D (SOIC)
DGK (VSSOP)
DRG (SON)
8 PINS
8 PINS
8 PINS
UNIT
219
66.9
°C/W
RθJA
Junction-to-ambient thermal resistance
144
RθJC(top)
Junction-to-case (top) thermal resistance
77
79
54.5
°C/W
RθJB
Junction-to-board thermal resistance
62
104
40.4
°C/W
ψJT
Junction-to-top characterization parameter
28
15
1.9
°C/W
ψJB
Junction-to-board characterization parameter
61
102
40.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
10.8
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Thermal Information: OPA1679
OPA1679
THERMAL METRIC
(1)
D (SOIC)
PW (TSSOP)
RUM (QFN)
14 PINS
14 PINS
16 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
90
127
38.5
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
55
47
34.4
°C/W
RθJB
Junction-to-board thermal resistance
44
59
17.4
°C/W
ψJT
Junction-to-top characterization parameter
20
5.5
0.6
°C/W
ψJB
Junction-to-board characterization parameter
44
58
17.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
7.1
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Copyright © 2017–2019, Texas Instruments Incorporated
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ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
www.ti.com.cn
6.6 Electrical Characteristics: VS = ±15 V
at TA = 25°C, RL = 2 kΩ, and VCM = VOUT = midsupply, unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
AUDIO PERFORMANCE
0.0001%
THD+N
IMD
Total harmonic distortion + noise
Intermodulation distortion
G=1
RL = 600 Ω
f = 1 kHz
VO = 3 VRMS
G=1
VO = 3 VRMS
–120
SMPTE/DIN Two-Tone, 4:1
(60 Hz and 7 kHz)
0.0001%
DIM 30 (3-kHz square wave
and 15-kHz sine wave)
0.0001%
CCIF Twin-Tone
(19 kHz and 20 kHz)
0.0001%
dB
–120
dB
–120
dB
–120
dB
FREQUENCY RESPONSE
GBW
Gain-bandwidth product
G=1
16
SR
Slew rate
G = –1
9
MHz
V/µs
Full power bandwidth (1)
VO = 1 VP
1.4
MHz
Overload recovery time
G = –10
Channel separation (dual and quad)
f = 1 kHz
1
µs
–130
dB
NOISE
en
Input voltage noise
In
f = 20 Hz to 20 kHz
5.4
f = 0.1 Hz to 10 Hz
1.74
µVPP
Input voltage noise density
f = 1 kHz
4.5
nV/√Hz
Input current noise density
f = 1 kHz
3
fA/√Hz
OFFSET VOLTAGE
VS = ±2.25 V to ±18 V
±0.5
VOS
Input offset voltage
VS = ±2.25 V to ±18 V
TA = –40°C to +85°C (2)
2
PSRR
Power-supply rejection ratio
VS = ±2.25 V to ±18 V
3
±2
mV
µV/°C
8
µV/V
INPUT BIAS CURRENT
IB
Input bias current
VCM = 0 V
±10
pA
IOS
Input offset current
VCM = 0 V
±10
pA
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
(V–) + 0.5
CMRR
Common-mode rejection ratio
100
(V+) – 2
110
V
dB
INPUT IMPEDANCE
Differential
Common-mode
100 || 6
MΩ || pF
6000 || 2
GΩ || pF
OPEN-LOOP GAIN
Open-loop voltage gain
(V–) + 0.8 V ≤ VO ≤ (V+) – 0.8 V
RL = 2 kΩ
VOUT
Voltage output
RL = 2 kΩ
IOUT
Output current
ZO
Open-loop output impedance
ISC
Short-circuit current (3)
CLOAD
Capacitive load drive
AOL
106
114
dB
OUTPUT
(1)
(2)
(3)
8
(V–) + 0.8
(V+) – 0.8
See Typical Characteristics curves
f = 1 MHz
See Typical Characteristics curves
V
mA
Ω
50/–50
mA
100
pF
Full-power bandwidth = SR / (2π × VP), where SR = slew rate.
Specified by design and characterization
One channel at a time
Copyright © 2017–2019, Texas Instruments Incorporated
OPA1678, OPA1679
www.ti.com.cn
ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
Electrical Characteristics: VS = ±15 V (continued)
at TA = 25°C, RL = 2 kΩ, and VCM = VOUT = midsupply, unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLY
VS
IQ
Specified voltage
Quiescent current
(per channel)
±2.25
IOUT = 0 A
2
IOUT = 0 A
TA = –40°C to +85°C (2)
±18
V
2.5
mA
2.8
mA
TEMPERATURE
Specified range
–40
85
°C
Operating range
–55
125
°C
版权 © 2017–2019, Texas Instruments Incorporated
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OPA1678, OPA1679
ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
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6.7 Typical Characteristics
at TA = 25°C, VS = ±15 V, and RL = 2 kΩ, (unless otherwise noted)
Voltage (200nV/div)
9ROWDJH 1RLVH 6SHFWUDO 'HQVLW\ Q9 ¥+]
1000
100
10
1
1
10
100
1k
10k
Time (1s/div)
100k
Frequency (Hz)
C003
C001
图 1. Input Voltage Noise Density vs Frequency
2XWSXW 9ROWDJH 1RLVH Q9 ¥+]
10000
图 2. 0.1-Hz to 10-Hz Noise
20
Resistor Noise Contribution
Voltage Noise Contribution
Current Noise Contribution
Total Noise
16
Output Voltage (V)
1000
100
10
14
12
10
8
6
4
1
2
0.1
0
10
100
1k
10k
100k
1M
10M
100M 1000M
Source Resistance (O)
10k
Gain
Phase
120
10
Gain (dB)
Phase (s)
Gain (dB)
20
40
0
±10
±20
45
±30
0
±20
100
1k
10k
100k
1M
10M
C015
图 4. Maximum Output Voltage vs Frequency
90
20
10M
30
180
80
60
1M
Frequency (Hz)
135
100
10
100k
C001
图 3. Voltage Noise vs Source Resistance
140
0
100M
Frequency (Hz)
CL = 10 pF
图 5. Open-Loop Gain and Phase vs Frequency
10
VS = +/- 18 V
VS = +/- 5 V
VS = +/- 2.25 V
18
±40
100k
C006
Gain = -1 V/V
Gain = 1 V/V
Gain = 10 V/V
1M
10M
Frequency (Hz)
100M
C002
CL = 10 pF
图 6. Closed-Loop Gain vs Frequency
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ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
Typical Characteristics (接
接下页)
0.01
-80
0.001
-100
0.0001
-120
-140
10
100
1k
0.01
-80
0.001
-100
0.0001
-120
-140
0.00001
10k
10
Frequency (Hz)
VOUT = 3 VRMS
100
Bandwidth = 80 kHz
0.001
-100
-120
0.01
-140
0.1
1
RL = 2 kΩ
-60
0.01
-80
0.001
-100
-120
0.0001
Gain = 1 V/V
Gain = -1 V/V
Gain = 10 V/V
0.01
-140
0.1
1
10
Output Amplitude (VRMS)
C002
Bandwidth = 80 kHz
f = 1 kHz
图 9. THD+N Ratio vs Output Amplitude
RL = 600 Ω
C002
Bandwidth = 80 kHz
图 10. THD+N Ratio vs Output Amplitude
140
±60
±70
120
±80
CMRR, PSRR (dB)
Channel Separation (dB)
Bandwidth = 80 kHz
0.1
0.00001
0.001
10
Output Amplitude (VRMS)
f = 1 kHz
Total Harmonic Distortion +Noise (%)
-80
Total Harmonic Distortion + Noise (dB)
Total Harmonic Distortion +Noise (%)
0.01
Gain = 1 V/V
Gain = -1 V/V
Gain = 10 V/V
C002
RL = 600 Ω
图 8. THD+N Ratio vs Frequency
-60
0.0001
10k
Frequency (Hz)
VOUT = 3 VRMS
图 7. THD+N Ratio vs Frequency
0.1
0.00001
0.001
1k
C002
RL = 2 kΩ
-60
Gain = 10 V/V
Gain = 1 V/V
Gain = -1 V/V
Total Harmonic Distortion + Noise (dB)
0.00001
0.1
Total Harmonic Distortion + Noise (dB)
-60
Gain = 10 V/V
Gain = 1 V/V
Gain = -1 V/V
Total Harmonic Distortion +Noise (%)
Total Harmonic Distortion +Noise (%)
0.1
Total Harmonic Distortion + Noise (dB)
at TA = 25°C, VS = ±15 V, and RL = 2 kΩ, (unless otherwise noted)
±90
±100
±110
±120
±130
±140
100
80
60
40
CMRR
PSRR(+)
PSRR(-)
20
±150
0
±160
10
100
1k
10k
100k
1M
Frequency (Hz)
VOUT = 3 VRMS
10M
C006
10
100
1k
10k
100k
1M
Frequency (Hz)
10M
C006
Gain = 1 V/V
图 11. Channel Separation vs Frequency
版权 © 2017–2019, Texas Instruments Incorporated
图 12. CMRR and PSRR vs Frequency
(Referred to Input)
11
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Typical Characteristics (接
接下页)
at TA = 25°C, VS = ±15 V, and RL = 2 kΩ, (unless otherwise noted)
Voltage (25 mV/div)
VIN
VOUT
Voltage (25 mV/div)
VIN
VOUT
Time (0.2 s/div)
Time (0.2 s/div)
C009
Gain = 1 V/V
CL = 100 pF
C009
Gain = –1 V/V
图 13. Small-Signal Step Response (100 mV)
CL = 100 pF
图 14. Small-Signal Step Response (100 mV)
Voltage (2.5 V/div)
VIN
VOUT
Voltage (2.5 V/div)
VIN
VOUT
Time (1 s/div)
Time (1 s/div)
C009
Gain = +1 V/V
RF = 2 kΩ
CL = 100 pF
C009
Gain = –1 V/V
图 15. Large-Signal Step Response
CL = 100 pF
图 16. Large-Signal Step Response
1000
145
140
Input Bias Current (pA)
Open-Loop Gain (dB)
500
135
130
125
120
115
110
0
-500
-1000
IB(N)
-1500
IB(P)
105
100
±15
10
35
60
85
Temperature (ƒC)
图 17. Open-Loop Gain vs Temperature
12
I(OS)
-2000
±40
110
C008
±40
±15
10
35
60
Temperature (ƒC)
85
110
C008
图 18. IB and IOS vs Temperature
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Typical Characteristics (接
接下页)
at TA = 25°C, VS = ±15 V, and RL = 2 kΩ, (unless otherwise noted)
8
3
6
2.8
2.6
Supply Current (mA)
Input Bias Current (pA)
4
2
0
-2
-4
-8
±18 ±15 ±12 ±9
±6
±3
0
3
6
9
12
15
Common-Mode Voltage (V)
2.2
2
1.8
1.6
1.4
IB(N)
IB(P)
I(OS)
-6
2.4
1.2
1
18
±40
10
±15
35
60
85
110
Temperature (ƒC)
C008
图 19. IB and IOS vs Common-Mode Voltage
C008
图 20. Supply Current vs Temperature
20
3
18
Output Voltage Swing (V)
Supply Current (mA)
2.5
2
1.5
1
0.5
14
12
10
8
6
-40°C
4
0°C
2
25°C
85°C
0
0
0
5
10
15
20
25
30
35
Supply Voltage (V)
0
40
0
85°C
20
25
30
35
40
45
50
55
60
C004
80
ISC (+)
Short-Circuit Current (mA)
25°C
-6
15
图 22. Output Voltage vs Output Current (Sourcing)
0°C
-4
10
C008
-40°C
-2
5
Output Current (mA)
图 21. Supply Current vs Supply Voltage
Output Voltage Swing (V)
16
-8
-10
-12
-14
-16
60
ISC (-)
40
20
0
±20
±40
-18
-20
±60
0
5
10
15
20
25
30
Output Current (mA)
35
40
45
50
C004
图 23. Output Voltage vs Output Current (Sinking)
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±40
±15
10
35
60
85
110
Temperature (sC)
135
C003
图 24. Short-Circuit Current vs Temperature
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Typical Characteristics (接
接下页)
at TA = 25°C, VS = ±15 V, and RL = 2 kΩ, (unless otherwise noted)
70
60
50
50
Overshoot (%)
Phase Margin (s)
60
40
30
20
40
30
20
10
10
0
VS = +/- 18 V
VS = +/- 2.25 V
0
0
100
200
300
400
500
600
Capacitive Load (pF)
0
200
300
400
500
600
Capacitive Load (pF)
C002
G=1
C001
G=1
图 25. Phase Margin vs Capacitive Load
图 26. Percent Overshoot vs Capacitive Load
10
20
5
15
0
10
Voltage (V)
Voltage (V)
100
-5
-10
5
0
-15
-5
VIN
VOUT
-20
-10
Time (500 ns/div)
VIN
VOUT
Time (500 ns/div)
C004
C004
Gain = –10 V/V
Gain = –10 V/V
图 27. Negative Overload Recovery
图 28. Positive Overload Recovery
10000
20
15
10
Voltage (V)
Impedance (O)
1000
100
10
5
0
-5
-10
-15
1
-20
10
100
1k
10k
100k
Frequency (Hz)
1M
10M
100M
VIN
VOUT
Time (125 s/div)
C015
C004
Gain = 1 V/V
图 29. Open-Loop Output Impedance vs Frequency
14
图 30. No Phase Reversal
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7 Detailed Description
7.1 Overview
The OPA167x devices are unity-gain stable, dual– and quad-channel op amps with low noise and distortion. The
Functional Block Diagram shows a simplified schematic of the OPA167x (one channel shown). The device
consists of a low noise input stage with a folded cascode and a rail-to-rail output stage. This topology exhibits
superior noise and distortion performance across a wide range of supply voltages that are not delivered by
legacy commodity audio operational amplifiers.
7.2 Functional Block Diagram
V+
Tail
Current
V
BIAS1
V +
IN
V
Class AB
Control
Circuitry
V
O
IN
V
BIAS2
V
7.3 Feature Description
7.3.1 Phase Reversal Protection
The OPA167x family has internal phase-reversal protection. Many op amps exhibit phase reversal when the
input is driven beyond the linear common-mode range. This condition is most often encountered in noninverting
circuits when the input is driven beyond the specified common-mode voltage range, causing the output to
reverse into the opposite rail. The input of the OPA167x prevents phase reversal with excessive common-mode
voltage. Instead, the appropriate rail limits the output voltage. This performance is shown in 图 31.
20
15
10
Voltage (V)
5
0
-5
-10
-15
-20
VIN
VOUT
Time (125 s/div)
C004
图 31. Output Waveform Devoid of Phase Reversal During an Input Overdrive Condition
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Feature Description (接
接下页)
7.3.2 Electrical Overstress
Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress.
These questions tend to focus on the device inputs, but can involve the supply voltage pins or even the output
pin. Each of these different pin functions have electrical stress limits determined by the voltage breakdown
characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin.
Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect them from
accidental ESD events both before and during product assembly.
A good understanding of this basic ESD circuitry and the relevance to an electrical overstress event is helpful. 图
32 illustrates the ESD circuits contained in the OPA167x (indicated by the dashed line area). The ESD
protection circuitry involves several current-steering diodes connected from the input and output pins and routed
back to the internal power-supply lines, where the diodes meet at an absorption device internal to the operational
amplifier. This protection circuitry is intended to remain inactive during normal circuit operation.
TVS
+
±
RF
+VS
R1
IN±
250 Ÿ
RS
IN+
250 Ÿ
+
Power-Supply
ESD Cell
ID
VIN
RL
+
±
+
±
±VS
TVS
图 32. Equivalent Internal ESD Circuitry Relative to a Typical Circuit Application
An ESD event produces a short-duration, high-voltage pulse that is transformed into a short-duration, highcurrent pulse when discharging through a semiconductor device. The ESD protection circuits are designed to
provide a current path around the operational amplifier core to prevent damage. The energy absorbed by the
protection circuitry is then dissipated as heat.
When an ESD voltage develops across two or more amplifier device pins, current flows through one or more
steering diodes. Depending on the path that the current takes, the absorption device can activate. The absorption
device has a trigger, or threshold voltage, that is above the normal operating voltage of the OPA167x but below
the device breakdown voltage level. When this threshold is exceeded, the absorption device quickly activates
and clamps the voltage across the supply rails to a safe level.
When the operational amplifier connects into a circuit (see 图 32), the ESD protection components are intended
to remain inactive and do not become involved in the application circuit operation. However, circumstances may
arise where an applied voltage exceeds the operating voltage range of a given pin. If this condition occurs, there
is a risk that some internal ESD protection circuits can turn on and conduct current. Any such current flow occurs
through steering-diode paths and rarely involves the absorption device.
16
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Feature Description (接
接下页)
图 32 shows a specific example where the input voltage (VIN) exceeds the positive supply voltage (V+) by 500
mV or more. Much of what happens in the circuit depends on the supply characteristics. If V+ can sink the
current, one of the upper input steering diodes conducts and directs current to V+. Excessively high current
levels can flow with increasingly higher VIN. As a result, the data sheet specifications recommend that
applications limit the input current to 10 mA.
If the supply is not capable of sinking the current, VIN can begin sourcing current to the operational amplifier and
then take over as the source of positive supply voltage. The danger in this case is that the voltage can rise to
levels that exceed the operational amplifier absolute maximum ratings.
Another common question involves what happens to the amplifier if an input signal is applied to the input when
the power supplies (V+ or V–) are at 0 V. Again, this question depends on the supply characteristic when at 0 V,
or at a level below the input signal amplitude. If the supplies appear as high impedance, then the input source
supplies the operational amplifier current through the current-steering diodes. This state is not a normal bias
condition; most likely, the amplifier does not operate normally. If the supplies are low impedance, then the current
through the steering diodes can become quite high. The current level depends on the ability of the input source
to deliver current, and any resistance in the input path.
If there is any uncertainty about the ability of the supply to absorb this current, add external Zener diodes to the
supply pins; see 图 32. Select the Zener voltage so that the diode does not turn on during normal operation.
However, the Zener voltage must be low enough so that the Zener diode conducts if the supply pin begins to rise
above the safe-operating, supply-voltage level.
7.3.3 EMI Rejection Ratio (EMIRR)
The electromagnetic interference (EMI) rejection ratio, or EMIRR, describes the EMI immunity of operational
amplifiers. An adverse effect that is common to many operational amplifiers is a change in the offset voltage as a
result of RF signal rectification. An operational amplifier that is more efficient at rejecting this change in offset as
a result of EMI has a higher EMIRR and is quantified by a decibel value. Measuring EMIRR can be performed in
many ways, but this document provides the EMIRR IN+, which specifically describes the EMIRR performance
when the RF signal is applied to the noninverting input pin of the operational amplifier. In general, only the
noninverting input is tested for EMIRR for the following three reasons:
• Operational amplifier input pins are known to be the most sensitive to EMI, and typically rectify RF signals
better than the supply or output pins.
• The noninverting and inverting operational amplifier inputs have symmetrical physical layouts and exhibit
nearly matching EMIRR performance.
• EMIRR is easier to measure on noninverting pins than on other pins because the noninverting input pin can
be isolated on a printed-circuit-board (PCB). This isolation allows the RF signal to be applied directly to the
noninverting input pin with no complex interactions from other components or connecting PCB traces.
A more formal discussion of the EMIRR IN+ definition and test method is shown in the EMI Rejection Ratio of
Operational Amplifiers application report, available for download at www.ti.com.
The EMIRR IN+ of the OPA167x is plotted versus frequency in 图 33. If available, any dual and quad operational
amplifier device versions have approximately identical EMIRR IN+ performance. The OPA167x unity-gain
bandwidth is 16 MHz. EMIRR performance below this frequency denotes interfering signals that fall within the
operational amplifier bandwidth.
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Feature Description (接
接下页)
100
90
EMIRR IN+ (dB)
80
70
60
50
40
30
20
10
0
10
100
1000
10000
Frequency (MHz)
C001
图 33. OPA167x EMIRR vs Frequency
表 1 lists the EMIRR IN+ values for the OPA167x at particular frequencies commonly encountered in real-world
applications. Applications listed in 表 1 can be centered on or operated near the particular frequency shown. This
information can be of special interest to designers working with these types of applications, or working in other
fields likely to encounter RF interference from broad sources, such as the industrial, scientific, and medical (ISM)
radio band.
表 1. OPA167x EMIRR IN+ for Frequencies of Interest
18
FREQUENCY
APPLICATION OR ALLOCATION
EMIRR IN+
400 MHz
Mobile radio, mobile satellite, space operation, weather, radar, UHF
36 dB
900 MHz
GSM, radio communication and navigation, GPS (to 1.6 GHz), ISM,
aeronautical mobile, UHF
42 dB
1.8 GHz
GSM, mobile personal comm. broadband, satellite, L-band
52 dB
2.4 GHz
802.11b/g/n, Bluetooth™, mobile personal comm., ISM, amateur radio and satellite, S-band
64 dB
3.6 GHz
Radiolocation, aero comm./nav., satellite, mobile, S-band
67 dB
5 GHz
802.11a/n, aero communication and navigation, mobile communication,
space and satellite operation, C-band
77 dB
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7.3.3.1 EMIRR IN+ Test Configuration
图 34 shows the circuit configuration for testing the EMIRR IN+. An RF source is connected to the operational
amplifier noninverting input pin using a transmission line. The operational amplifier is configured in a unity-gain
buffer topology with the output connected to a low-pass filter (LPF) and a digital multimeter (DMM). A large
impedance mismatch at the operational amplifier input causes a voltage reflection; however, this effect is
characterized and accounted for when determining the EMIRR IN+. The resulting dc offset voltage is sampled
and measured by the multimeter. The LPF isolates the multimeter from residual RF signals that can interfere with
multimeter accuracy. See the EMI Rejection Ratio of Operational Amplifiers application report for more details.
Ambient temperature: 25Û&
+VS
±
50
Low-Pass Filter
+
RF source
DC Bias: 0 V
Modulation: None (CW)
Frequency Sweep: 201 pt. Log
-VS
Not shown: 0.1 µF and 10 µF
supply decoupling
Sample /
Averaging
Digital Multimeter
图 34. EMIRR IN+ Test Configuration Schematic
7.4 Device Functional Modes
7.4.1 Operating Voltage
The OPA167x series op amps operate from ±2.25 V to ±18 V supplies while maintaining excellent performance.
The OPA167x series can operate with as little as 4.5 V between the supplies and with up to 36 V between the
supplies. However, some applications do not require equal positive and negative output voltage swing. With the
OPA167x series, power-supply voltages are not required to be equal. For example, the positive supply can be
set to 25 V with the negative supply at –5 V.
In all cases, the common-mode voltage must be maintained within the specified range. In addition, key
parameters are ensured over the specified temperature range of TA = –40°C to +85°C. Parameters that vary
significantly with operating voltage or temperature are shown in the Typical Characteristics section.
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8 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Capacitive Loads
The dynamic characteristics of the OPA167x series are optimized for commonly encountered gains, loads, and
operating conditions. The combination of low closed-loop gain and high capacitive loads decreases the phase
margin of the amplifier and can lead to gain peaking or oscillations. As a result, heavier capacitive loads must be
isolated from the output. The simplest way to achieve this isolation is to add a small resistor (RS equal to 50 Ω,
for example) in series with the output.
This small series resistor also prevents excess power dissipation if the output of the device becomes shorted.
For more details about analysis techniques and application circuits, see the Feedback Plots Define Op Amp AC
Performance application report, available for download from the TI website (www.ti.com).
20
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8.2 Typical Application
Contact microphones are useful for amplifying the sound of musical instruments which do not contain electrical
pickups, such as acoustic guitars and violins. Most contact microphones use a piezo element to convert
vibrations in the body of the musical instrument to a voltage which may be amplified or recorded. The low noise
and low input bias current of the OPA1678 make the device an excellent choice for high impedance preamplifiers
for piezo elements. This preamplifier circuit provides high input impedance for the piezo element but has low
output impedance for driving long cable runs. The circuit is also designed to be powered from 48-V phantom
power which is commonly available in professional microphone preamplifiers and recording consoles.
A TINA-TI™ simulation schematic of the circuit below is available in the Tools and Software section of the
OPA167x product folder.
R1
1.2 k
C2
0.1 F
R14
100
C1
22 F +
ZD1
24 V
½ OPA1678
+
±
VS+
VOUT
VS±
R7 2 k
C5
22 F
+
R10
100
R3
1M
R2
1.2 k
R12
100 k
R5
100 k
TPD1E1B04
Piezo
Contact
Microphone
R8
442
C3 390 pF
C4 390 pF
R6
100 k
R11
100
R15
100
+
R13
100 k
R9 2 k
R4
1M
To
Microphone
Preamplifier
C6
22 F
±
+
½ OPA1678
图 35. Phantom-Powered Preamplifier for Piezo Contact Microphones
8.2.1 Design Requirements
• –3-dB Bandwidth: 20 Hz to 20 kHz
• Gain: 20 dB (10 V/V)
• Piezo Element Capacitance: 8 nF (9-kHz resonance)
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Typical Application (接
接下页)
8.2.2 Detailed Design Procedure
8.2.2.1 Power Supply
In professional audio systems, phantom power is applied to the two signal lines that carry a differential audio
signal from the microphone. 图 36 is a diagram of the system showing 48-V phantom power applied to the
differential signal lines between the piezo preamplifier output and the input of a professional microphone
preamplifier.
R2
6.8 k
R1
6.8 k
48 V
Phantom
Power
+
+
Piezo
Contact
Microphone
Differential
Signal Cable
±
±
Piezo
Preamplifier
Microphone
Preamplifier
图 36. System Diagram Showing the Application of Phantom Power to the Audio Signal Lines
A voltage divider is used to extract the common-mode phantom power from the differential audio signal in this
type of system. The voltage at center point of the voltage divider formed by R1 and R2 does not change when
audio signals are present on the signal lines (assuming R1 and R2 are matched). A Zener diode forces the
voltage at the center point of R1 and R2 to a regulated voltage. The values of R1 and R2 are determined by the
allowable voltage drop across these resistors from the current delivered to both op amp channels and the Zener
diode. There are two power supply current pathways in parallel, each sharing half the total current of the op amp
and Zener diode. Resistors R1 and R2 can be calculated using Equation 1:
R1 R2 RPS
VZD
I
§ OPA IZD ·
¨ 2
2 ¸¹
©
6.8 k:
RPS
(1)
A 24-V Zener diode is selected for this design, and 1 mA of current flows through the diode at idle conditions to
maintain the reverse-biased condition of the Zener. The maximum idle power supply current of both op amp
channels is 5 mA. Inserting these values into 公式 1 gives the values for R1 and R2 shown in Equation 2.
24V
24V
6.8 k:
6.8 k: 1.2 k: RPS
§ IOPA IZD ·
§ 5.0 mA 1.0 mA ·
¨
¸
¨ 2
2
2
2 ¸¹
©
¹
©
(2)
Using a value of 1.2 kΩ for resistors R1 and R2 establishes a 1-mA current through the Zener diode and properly
regulate the node to 24 V. Capacitor C1 forms a low-pass filter with resistors R1 and R2 to filter the Zener diode
noise and any residual differential audio signals. Mismatch in the values of R1 and R2 causes a portion of the
audio signal to appear at the voltage divider center point. The corner frequency of the low-pass filter must be set
below the audio band, as shown in Equation 3.
1
1
t
t 13 PF o 22 PF
C1 t
2 ˜ S ˜ R1 || R2 ˜ f 3dB 2 ˜ S ˜ 600 : ˜ 20 Hz
(3)
A 22-μF capacitor is selected because the capacitor meets the requirements for power supply filtering and is a
widely available denomination. A 0.1-µF capacitor (C2) is added in parallel with C1 as a high-frequency bypass
capacitor.
22
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Typical Application (接
接下页)
8.2.2.2 Input Network
Resistors R3 and R4 provide a pathway for the input bias current of the OPA1678 while maintaining the high
input impedance of the circuit. The contact microphone capacitance and the required
low-frequency response determine the values of R3 and R4. The –3-dB frequency formed by the microphone
capacitance and amplifier input impedance is shown in Equation 4:
1
d 20 Hz
F 3dB
2 ˜ S ˜ (R3 R4 ) ˜ CMIC
(4)
A piezo element with 8 nF of capacitance was selected for this design because the 9-kHz resonance is towards
the upper end of the audible bandwidth, and is less likely to affect the frequency response of many musical
instruments. The minimum value for resistors R3 and R4 is then calculated with Equation 5:
R3 R 4 RIN
RIN t
1
4 ˜ S ˜F
t
3dB ˜ CMIC
1
t 497.4 k:
4 ˜ S ˜ 20 Hz ˜ 8 nF
(5)
1-MΩ resistors are selected for R3 and R4 to ensure the circuit meets the design requirements for –3-dB
bandwidth. The center point of resistors R3 and R4 is biased to half the supply voltage through the voltage
divider formed by R5 and R6. This sets the input common-mode voltage of the circuit to a value within the input
voltage range of the OPA1678. Piezo elements can produce very large voltages if the elements are struck with
sufficient force. To prevent damage, the input of the OPA1678 is protected by a transient voltage suppressor
(TVS) diode placed across the preamplifier inputs. The TPD1E1B04 TVS was selected due to low capacitance
and the 6.4-V clamping voltage does not clamp the desired low amplitude vibration signals. Resistors R14 and
R15 limit current flow into the amplifier inputs in the event that the internal protection diodes of the amplifier are
forward-biased.
8.2.2.3 Gain
R7, R8, and R9 determines the gain of the preamplifier circuit. The gain of the circuit is shown in Equation 6:
R7 R9
AV 1
10 V/V
R8
(6)
Resistors R7 and R9 are selected with a value of 2 kΩ to avoid loading the output of the OPA1678 and
producing distortion. The value of R8 is then calculated in Equation 7:
R7 R9 2 k: 2 k:
R8
444.4 : o 442 :
AV 1
10 1
(7)
Capacitors C3 and C4 limit the bandwidth of the circuit so that signals outside the audio bandwidth are not
amplified. The corner frequency produced by capacitors C3 and C4 is shown in Equation 8. This corner
frequency must be above the desired –3-dB bandwidth point to avoid attenuating high frequency audio signals.
C3 C4 CFB
CFB d
1
2 ˜ S ˜ F 3dB ˜ R7/9
d
1
d 3.98 nF
2 ˜ S ˜ 20 kHz ˜ 2 k:
(8)
390-pF capacitors are selected for C3 and C4, which places the corner frequency approximately 1 decade above
the desired –3-dB bandwidth point . Capacitors C3 and C4 must be NP0 or C0G type ceramic capacitors or film
capacitors. Other ceramic dielectrics, such as X7R, are not suitable for these capacitors and produces distortion.
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Typical Application (接
接下页)
8.2.2.4 Output Network
The audio signal is AC-coupled onto the microphone signal lines through capacitors C5 and C6. The value of
capacitors C5 and C6 are determined by the low-frequency design requirements and the input impedance of the
microphone preamplifier that connect to the output of the circuit. 公式 9 shows an approximation of the capacitor
value requirements, and neglects the effects of R10, R11, R12, and R13 on the frequency response. The
microphone preamplifier input impedance (RIN_MIC) uses a typical value of 4.4 kΩ for the calculation.
C5 C6 COUT
COUT t
2
2 ˜ S ˜ RIN _ MIC ˜ 20 Hz
t
2
t 3.6 PF
2 ˜ S ˜ 4.4 k: ˜ 20 Hz
(9)
For simplicity, the same 22-μF capacitors selected for the power supply filtering are selected for C5 and C6 to
satisfy 公式 9. At least 50-V rated capacitors must be used for C5 and C6. If polarized capacitors are used, the
positive terminal must be oriented towards the microphone preamplifier. Resistors R10 and R11 isolate the op
amp outputs from the capacitances of long cables which may cause instability. R12 and R13 discharge ACcoupling capacitors C4 and C5 when phantom power is removed.
8.2.3 Application Curves
The frequency response of the preamplifier circuit is shown in 图 37. The –3-dB frequencies are 15.87 Hz and
181.1 kHz which meet the design requirements. The gain within the passband of the circuit is 18.9 dB, slightly
below the design goal of 20 dB. The reduction in gain is a result of the voltage division between the output
resistors of the piezo preamplifier circuit and the input impedance of the microphone preamplifier. The Aweighted noise of the circuit (referred to the input) is 842.2 nVRMS or –119.27 dBu.
20
19
18
17
Gain (dB)
16
15
14
13
12
11
10
10
100
1k
10k
100k
1M
Frequency (Hz)
C001
图 37. Frequency Response of the Preamplifier Circuit for a 8-nF Piezo Element
8.2.4 Other Applications
The low noise and distortion of the OPA167x series make the devices designed for a variety of applications in
professional and consumer audio products. The examples shown here are possible applications where the
OPA167x provides exceptional performance.
24
版权 © 2017–2019, Texas Instruments Incorporated
OPA1678, OPA1679
www.ti.com.cn
ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
Typical Application (接
接下页)
8.2.4.1 Phono Preamplifier for Moving Magnet Cartridges
The noise and distortion performance of the OPA167x family of amplifiers is exceptional in applications with high
source impedances, which makes these devices a viable choice in preamplifier circuits for moving magnet (MM)
phono cartridges. 图 38 shows a preamplifier circuit for MM cartridges with 40 dB of gain at 1 kHz.
15 V
MM Phono Input
R1
47 k
V+
C1
150 pF
V±
R2
118 k
R4
127
C2
27 nF
+
½ OPA1678
±
VOUT
-15 V
R3
10 k
R5
100
C5
100 F
Output
R6
100 k
C3
7.5 nF
C4
100 F
图 38. Phono Preamplifier for Moving Magnet Cartridges
(Single-Channel Shown)
8.2.4.2 Single-Supply Electret Microphone Preamplifier
The preamplifier circuit shown in 图 39 operates the OPA1678 as a transimpedance amplifier that converts the
output current from the electret microphone's internal JFET into a voltage. Resistor R4 determines the gain of the
circuit. Resistors R2 and R3 bias the input voltage to half the power supply voltage for proper functionality on a
single-supply.
C3
9V
16 pF
R4
R1
13.7 k
61.9 k
9V
C1
0.1 F
2.2 F
Electret
Microphone
9V
R2
100 k
±
Output
+
R3
100 k
½ OPA1678
C2
2.2 F
图 39. Single-Supply Electret Microphone Preamplifier
8.2.4.3 Composite Headphone Amplifier
图 40 shows the BUF634A buffer inside the feedback loop of the OPA1678 to increase the available output
current for low-impedance headphones. If the BUF634A is used in wide-bandwidth mode, no additional
components besides the feedback resistors are required to maintain loop stability.
版权 © 2017–2019, Texas Instruments Incorporated
25
OPA1678, OPA1679
ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
www.ti.com.cn
Typical Application (接
接下页)
12 V
100 F
0.1 F
0.1 F
+
Input
½
OPA1678
Output
R1
100 k
BUF634A
0.1 F
±
RBW
0.1 F
100 F
-12 V
R3
R2
200
200
图 40. Composite Headphone Amplifier (Single-Channel Shown)
8.2.4.4 Differential Line Receiver With AC-Coupled Outputs
图 41 shows the OPA1678 used as an integrator that drives the reference pin of the INA1650, which forces the
output DC voltage to 0 V. This configuration is an alternative to large AC-coupling capacitors which can distort at
high output levels. The low input bias current and low input offset voltage of the OPA1678 make the device
designed for integrator applications.
18 V
-18 V
C5 1 F
C7 1 F
R7
1M
Input Differential
Audio Signals
C1 10 F
C6 0.1 F
C8 0.1 F
18 V
R2
100 k
XLR Connector
R4
100 k
3
2
1
2 IN+ A
OUT A 13
3 COM A
REF A 12
C2 10 F
4 IN- A
VMID(IN) 11
C3 10 F
5 IN- B
VMID(OUT) 10
6 COM B
REF B 9
7 IN+ B
OUT B 8
½
OPA1678
-18 V
R6 1 M
R5
100 k
INA1650
C9
100 nF
Output Single-Ended
Audio Signals
½
OPA1678
±
1
R3 1 M
+
3
VEE 14
±
2
1 VCC
+
R1
100 k
C10
100 nF
XLR Connector
C4 10 F
R8
1M
图 41. Differential Line Receiver With AC-Coupled Outputs
26
版权 © 2017–2019, Texas Instruments Incorporated
OPA1678, OPA1679
www.ti.com.cn
ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
9 Power Supply Recommendations
The OPA167x devices are specified for operation from 4.5 V to 36 V (±2.25 V to ±18 V); many specifications
apply from –40°C to +85°C. Parameters that can exhibit significant variance with regard to operating voltage or
temperature are shown in the Typical Characteristics section. Applications with noisy or high-impedance power
supplies require decoupling capacitors close to the device pins. In most cases, 0.1-µF capacitors are adequate.
10 Layout
10.1 Layout Guidelines
For best operational performance of the device, use good printed-circuit board (PCB) layout practices, including:
• Noise can propagate into analog circuitry through the power pins of the circuit as a whole and of op amp
itself. Bypass capacitors are used to reduce the coupled noise by providing low-impedance power sources
local to the analog circuitry.
– Connect low-ESR, 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed as
close to the device as possible. A single bypass capacitor from V+ to ground is applicable for singlesupply applications.
• Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective
methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes.
A ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise pickup. Physically
separate digital and analog grounds, observing the flow of the ground current.
• To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If
these traces cannot be kept separate, crossing the sensitive trace perpendicular is much better as opposed to
in parallel with the noisy trace.
• Place the external components as close to the device as possible. As shown in 图 42, keeping RF and RG
close to the inverting input minimizes parasitic capacitance.
• Keep the length of input traces as short as possible. Always remember that the input traces are the most
sensitive part of the circuit.
• Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce
leakage currents from nearby traces that are at different potentials.
• Cleaning the PCB following board assembly is recommended for best performance.
• Any precision integrated circuit can experience performance shifts resulting from moisture ingress into the
plastic package. Following any aqueous PCB cleaning process, TI recommends baking the PCB assembly to
remove moisture introduced into the device packaging during the cleaning process. A low temperature, postcleaning bake at 85°C for 30 minutes is sufficient for most circumstances.
版权 © 2017–2019, Texas Instruments Incorporated
27
OPA1678, OPA1679
ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
www.ti.com.cn
10.2 Layout Example
+
VIN A
+
VIN B
VOUT A
RG
VOUT B
RG
RF
RF
(Schematic Representation)
Place components
close to device and to
each other to reduce
parasitic errors.
Output A
VS+
OUTPUT A
Use low-ESR,
ceramic bypass
capacitor. Place as
close to the device
as possible.
GND
V+
RF
Output B
GND
-IN A
OUTPUT B
+IN A
-IN B
RF
RG
VIN A
GND
RG
V±
Use low-ESR,
ceramic bypass
capacitor. Place as
close to the device
as possible.
GND
VS±
+IN B
Ground (GND) plane on another layer
VIN B
Keep input traces short
and run the input traces
as far away from
the supply lines
as possible.
图 42. Operational Amplifier Board Layout for Noninverting Configuration
10.3 Power Dissipation
The OPA167x series op amps are capable of driving 2-kΩ loads with a power-supply voltage up to ±18 V and full
operating temperature range. Internal power dissipation increases when operating at high supply voltages.
Copper leadframe construction used in the OPA167x series op amps improves heat dissipation compared to
conventional materials. Circuit board layout can also help minimize junction temperature rise. Wide copper traces
help dissipate the heat by acting as an additional heat sink. Temperature rise can be further minimized by
soldering the devices to the circuit board rather than using a socket.
28
版权 © 2017–2019, Texas Instruments Incorporated
OPA1678, OPA1679
www.ti.com.cn
ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
11 器件和文档支持
11.1 器件支持
11.1.1 开发支持
11.1.1.1 TINA-TI™（免费软件下载）
TINA™是一款简单、功能强大且易于使用的电路仿真程序，此程序基于 SPICE 引擎。 TINA-TI™ 是 TINA 软件的
一款免费全功能版本，除了一系列无源和有源模型外，此版本软件还预先载入了一个宏模型库。TINA-TI 提供所有
传统的 SPICE 直流、瞬态和频域分析以及其他设计功能。
TINA-TI 可供免费下载（位于 WEBENCH®设计中心），并且可提供广泛的后处理功能，允许用户以各种方式设置
结果的格式。虚拟仪器提供选择输入波形和探测电路节点、电压和波形的功能，从而创建一个动态的快速入门工
具。
注
这些文件需要安装 TINA 软件（由 DesignSoft™提供）或者 TINA-TI 软件。请从 TINA-TI 文
件夹 中下载免费的 TINA-TI 软件。
11.1.1.2 DIP 适配器 EVM
DIP 适配器 EVM 工具提供了一种针对小型表面贴装器件进行原型设计的简易低成本方法。该评估工具适用于以下
TI 封装：D 或 U (SOIC-8)、PW (TSSOP-8)、DGK (VSSOP-8)、DBV（SOT-23-6、SOT-23-5 和 SOT-23-3）、
DCK（SC70-6 和 SC70-5）和 DRL (SOT563-6)。DIP 适配器 EVM 也可搭配引脚排使用或直接与现有电路相连。
11.1.1.3 通用运算放大器评估模块 (EVM)
通用运放 EVM 是一系列通用空白电路板，可简化采用各种器件封装类型的电路板原型设计。借助评估模块电路板
设计，可以轻松快速地构造多种不同电路。共有 5 个模型可供选用，每个模型都对应一种特定封装类型。支持
PDIP、SOIC、VSSOP、TSSOP 和 SOT-23 封装。
注
这些电路板均为空白电路板，用户必须自行提供相关器件。TI 建议您在订购通用运算放大器
EVM 时申请几个运算放大器器件样品。
11.1.1.4 TI 高精度设计
TI 高精度设计的模拟设计方案是由 TI 公司高精度模拟实验室设计 应用 专家创建的模拟解决方案，提供了许多实用
电路的工作原理、组件选择、仿真、完整印刷电路板 (PCB) 电路原理图和布局布线、物料清单以及性能测量结果。
欲获取 TI 高精度设计，请访问 http://www.ti.com.cn/ww/analog/precision-designs/。
11.1.1.5 WEBENCH®滤波器设计器
WEBENCH® 滤波器设计器是一款简单、功能强大且便于使用的有源滤波器设计程序。WEBENCH 滤波设计器，
用户可使用精选 TI 运算放大器和 TI 供应商合作伙伴提供的无源组件来打造最佳滤波器设计方案。
WEBENCH® 设计中心以基于网络的工具形式提供 WEBENCH® 滤波器设计器。用户通过该工具可在短时间内完
成多级有源滤波器解决方案的设计、优化和仿真。
11.2 文档支持
11.2.1 相关文档
使用 OPA167x 时，建议参考下列相关文档。所有这些文档都可从 www.ti.com.cn 上下载（除非另有说明）。
• 德州仪器 (TI)，《放大器源电阻和噪声注意事项》 技术简介
• Burr Brown，《运算放大器的单电源运行》 应用简报
• Burr Brown，《运算放大器性能分析》 应用简报
• 德州仪器 (TI)，《用直观方式补偿跨阻放大器》 应用报告
版权 © 2017–2019, Texas Instruments Incorporated
29
OPA1678, OPA1679
ZHCSG25C – FEBRUARY 2017 – REVISED JUNE 2019
www.ti.com.cn
文档支持 (接
接下页)
•
•
•
Burr Brown，《放大器调优》 应用简报
Burr Brown，《反馈曲线图定义运算放大器交流性能》 应用简报
德州仪器 (TI)，《适用于专业音频的有源音量控制》 精密设计
11.3 相关链接
下表列出了快速访问链接。类别包括技术文档、支持和社区资源、工具和软件，以及立即订购快速访问。
表 2. 相关链接
器件
产品文件夹
立即订购
技术文档
工具与软件
支持和社区
OPA1678
单击此处
单击此处
单击此处
单击此处
单击此处
OPA1679
单击此处
单击此处
单击此处
单击此处
单击此处
11.4 接收文档更新通知
如需接收文档更新通知，请访问 TI.com.cn 上的器件产品文件夹。单击右上角的通知我 进行注册，即可每周接收产
品信息更改摘要。有关更改的详细信息，请查阅已修订文档中包含的修订历史记录。
11.5 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.6 商标
TINA-TI, E2E are trademarks of Texas Instruments.
WEBENCH is a registered trademark of Texas Instruments.
TINA, DesignSoft are trademarks of DesignSoft, Inc.
All other trademarks are the property of their respective owners.
11.7 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
11.8 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。
30
版权 © 2017–2019, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
28-Sep-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
OPA1678IDGKR
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 85
1AW7
OPA1678IDGKT
ACTIVE
VSSOP
DGK
8
250
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 85
1AW7
OPA1678IDR
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OP1678
OPA1678IDRGR
ACTIVE
SON
DRG
8
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OP1678
OPA1678IDRGT
ACTIVE
SON
DRG
8
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OP1678
OPA1679IDR
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA1679
OPA1679IPWR
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OPA1679
OPA1679IRUMR
ACTIVE
WQFN
RUM
16
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
OPA
1679
OPA1679IRUMT
ACTIVE
WQFN
RUM
16
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
OPA
1679
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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